Balasubramanian, S.; Panchanathan, A.; Chokkalingam, B.; Padmanaban, S.; Leonowicz, Z.
Module Based Floorplanning Methodology to Satisfy Voltage Island and Fixed Outline Constraints. Electronics 2018, 7, 325.
https://doi.org/10.3390/electronics7110325
AMA Style
Balasubramanian S, Panchanathan A, Chokkalingam B, Padmanaban S, Leonowicz Z.
Module Based Floorplanning Methodology to Satisfy Voltage Island and Fixed Outline Constraints. Electronics. 2018; 7(11):325.
https://doi.org/10.3390/electronics7110325
Chicago/Turabian Style
Balasubramanian, Srinath, Arunapriya Panchanathan, Bharatiraja Chokkalingam, Sanjeevikumar Padmanaban, and Zbigniew Leonowicz.
2018. "Module Based Floorplanning Methodology to Satisfy Voltage Island and Fixed Outline Constraints" Electronics 7, no. 11: 325.
https://doi.org/10.3390/electronics7110325
APA Style
Balasubramanian, S., Panchanathan, A., Chokkalingam, B., Padmanaban, S., & Leonowicz, Z.
(2018). Module Based Floorplanning Methodology to Satisfy Voltage Island and Fixed Outline Constraints. Electronics, 7(11), 325.
https://doi.org/10.3390/electronics7110325