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Article

Multi-Cell Extended Equalization Circuit and Dual Closed-Loop Control Method Based on the Boost–LC Architecture

1
College of Electrical and Electronic Engineering, Hubei University of Technology, Wuhan 430068, China
2
Hubei Collaborative Innovation Center for High-Efficiency Utilization of Solar Energy, Hubei University of Technology, Wuhan 430068, China
*
Author to whom correspondence should be addressed.
Electronics 2026, 15(7), 1518; https://doi.org/10.3390/electronics15071518
Submission received: 5 March 2026 / Revised: 29 March 2026 / Accepted: 30 March 2026 / Published: 4 April 2026

Abstract

To address the limitations of conventional LC resonant battery equalization circuits, including slow balancing speed under small voltage differences, limited scalability in multi-cell configurations, and the risk of over-equalization, this paper proposes a dual-layer LC resonant equalization topology integrated with a Boost-assisted mechanism and a state-of-charge (SOC)-based dual closed-loop current control strategy. In the proposed topology, a Boost converter is introduced to actively enhance the effective voltage difference between cells, thereby improving the equalization current amplitude and accelerating the balancing process. A switched-inductor structure is further adopted to enable scalable inter-group energy transfer in multi-cell battery systems. To improve control accuracy, SOC is selected as the balancing variable, and a dual closed-loop control framework is designed, where the outer loop regulates SOC deviation, and the inner loop controls the equalization current via proportional–integral (PI) controllers. A MATLAB/Simulink model is established to evaluate the proposed method under multiple operating conditions, including idle, charging, and discharging states. The results show that the proposed topology significantly reduces the equalization time compared with conventional LC resonant circuits and improves balancing speed by approximately 49% under the dual closed-loop control strategy. In addition, the system maintains stable performance across different operating conditions. It should be noted that this study focuses on topology design and control strategy validation through simulation. Due to the focus on topology validation and control mechanism analysis, this study is limited to simulation-based verification. Experimental implementation will be conducted in future work.

1. Introduction

With the rapid advancement of electric vehicles, renewable energy storage systems, and related applications, lithium-ion batteries have become one of the dominant energy storage technologies because of their high energy density and long cycle life [1]. To satisfy practical requirements for voltage and capacity, numerous individual cells are typically connected in series to form battery packs. However, due to manufacturing tolerances, heterogeneous operating conditions, and varying aging rates, intrinsic disparities in voltage, capacity, and internal resistance inevitably arise among cells within a pack [2]. Such inconsistencies significantly reduce the available capacity of the battery pack, accelerate performance degradation, and may even induce overcharge or over-discharge conditions, thereby compromising overall system safety and reliability [3]. As a critical function of the battery management system (BMS), balancing technology plays a decisive role in maintaining pack safety, extending service life, and improving energy utilization efficiency. Consequently, effective balancing strategies have become a fundamental prerequisite for the large-scale commercialization of electric vehicle energy storage systems [4].
Among active balancing techniques, LC resonant equalization circuits have attracted considerable attention due to their soft-switching capability, low switching losses, and relatively simple structure [5]. Nevertheless, conventional LC resonant topologies still exhibit several inherent limitations in practical applications.
First, the balancing speed strongly depends on the voltage difference between cells. When the voltage deviation is small, the equalization current decreases substantially, resulting in prolonged balancing time and reduced efficiency under dynamic operating conditions, such as those encountered in electric vehicle applications [6]. Second, when extended to multi-cell series battery systems, the circuit complexity increases significantly, giving rise to challenges including magnetic coupling interference, parameter mismatch, and implementation difficulty. These factors constrain the scalability of conventional LC resonant structures in high-capacity battery packs [7]. Third, the absence of precise current regulation mechanisms may lead to over-equalization, aggravating cell stress and accelerating inconsistency propagation within the pack [8]. Collectively, these limitations restrict the engineering feasibility and practical deployment of traditional LC resonant balancing circuits, thereby necessitating structural innovation and advanced control strategy optimization.
In recent years, substantial efforts have been devoted to improving battery equalization performance. Ghaeminezhad et al. provided a comprehensive review of active battery pack equalization topologies, systematically clarifying their technical characteristics and application boundaries. Their analysis indicates that resonant equalization circuits offer notable efficiency advantages; however, limitations in balancing speed and scalability remain unresolved [9]. Shang et al. optimized a star-connected switched-capacitor equalizer to enhance voltage balancing efficiency in series-connected battery packs, yet the intrinsic dependence of balancing current on small voltage differentials was not fundamentally mitigated [10]. Wang et al. proposed a multi-mode balancing topology that improves structural flexibility for series battery systems; nevertheless, parameter matching and scalability challenges persist during topology expansion [11]. Izadi et al. further reviewed voltage equalization circuits for batteries and supercapacitors, highlighting common constraints in resonant-type equalizers, including limited scalability and insufficient control precision [12]. In terms of control strategies, Xiang et al. introduced a lightweight explicit model predictive control method based on artificial neural networks, providing valuable insights into high-precision current regulation for equalization circuits [13]. Moreover, Zhang et al. proposed a refined calculation approach for electric motor winding losses in electric vehicles, offering methodological references for loss optimization in balancing circuit design [14]. Although these studies have advanced topology development and control algorithm design, existing approaches have not simultaneously addressed the three fundamental challenges associated with conventional LC resonant balancing circuits: constrained balancing speed under small voltage deviations, limited scalability for multi-cell configurations, and susceptibility to over-equalization.
To overcome these limitations, a dual-layer LC resonant equalization topology integrated with an SOC-based dual closed-loop current control strategy is proposed in this paper. At the intra-group level, a Boost-assisted LC resonant structure is introduced to increase the effective voltage difference between adjacent cells, thereby improving the equalization current under small voltage deviations and accelerating the balancing process. At the inter-group level, a switched-inductor circuit is employed to simplify topology extension in multi-cell series battery packs and improve scalability. In addition, SOC is adopted as the equalization variable to reduce the risk of false balancing, and a dual closed-loop current regulation framework is designed for both intra-group and inter-group balancing. In this framework, the outer loop generates the reference equalization current according to the SOC difference, while the inner loop regulates the actual equalization current through PI control. A MATLAB/Simulink model was established using MATLAB R2023b to verify the proposed method under idle, charging, and discharging conditions. The results show that the proposed topology significantly improves balancing speed and maintains stable equalization performance under different operating conditions. Therefore, the proposed method provides a scalable and control-enhanced solution for overcoming the low speed, poor scalability, and weak regulation capability of conventional LC resonant equalization circuits.

2. Research on Equalization Circuits Based on LC Resonance

2.1. Traditional LC Resonant Equalization Circuit

2.1.1. Topology of the LC Resonant Equalization Circuit

The fundamental architecture of the traditional LC resonant balancing circuit investigated in this study is depicted in Figure 1. The configuration primarily comprises two battery cells, four MOSFET switches, a resonant inductor L r , a resonant capacitor C r , and an equivalent resonant resistor R .
The operational principle of the conventional LC resonant circuit is characterized by its simplicity and high energy-transfer efficiency. Based on the potential difference between battery B1 and B2, the four MOSFET switches are categorized into two groups for complementary operation: Q1 and Q3 constitute the first group, while Q2 and Q4 form the second. These two groups operate in a complementary conduction mode at the pre-defined resonant frequency fr with a constant duty cycle of 0.5. Under these specific conditions, resonance is induced between the inductor L r and the capacitor C r , effectively causing the LC branch to exhibit purely resistive characteristics. Driven by the inter-cell voltage difference, energy is periodically exchanged between B1 and B2, with the balancing current experiencing a logarithmic decay over time as equilibrium is approached. Assuming a scenario where the terminal voltage of B1 exceeds that of B2, the sequential energy transfer mechanism is illustrated in Figure 2.
As shown in Figure 2a, when MOSFET switches Q1 and Q3 are turned on, battery B1 discharges into the LC resonant circuit. As shown in Figure 2b, when MOSFET switches Q2 and Q3 are turned on, the resonant current reverses direction and charges battery B2.

2.1.2. Analysis of the Equalization Principle in LC Resonant Equalization Circuits

The switching sequence, along with the inductor current and capacitor voltage waveforms, is illustrated in Figure 3.
Taking the case where battery B1 voltage is greater than battery B2 voltage, when t 0 < t < t 1 , the inductor current and capacitor voltage are given by Equations (1) and (2):
i L ( t ) = i C ( t ) = V B 1 V C min 2 ω r L r e β t t 0 sin ω r t t 0
V C ( t ) = V B 1 V B 1 V C min ω r e β t t 0 × β sin ω r t t 0 + ω r cos ω r t t 0
In Equation (1), i L ( t ) represents the real-time current through the inductor, i C ( t ) denotes the real-time current through the capacitor, V B 1 indicates the voltage value of battery B1, V C m i n signifies the minimum voltage of the resonant capacitor C r , ω r denotes the resonant angular frequency, L r represents the inductance value of the resonant inductor L r . The specific values of the resonant angular frequency and damping coefficient are shown in Equations (3) and (4):
ω r = 2 π f r
β = r L C / 2 L r
In Equation (4), r L C denotes the equivalent resistance of the LC resonant branch. The damping coefficient β characterizes the attenuation rate of the resonant current and reflects the energy dissipation effect introduced by the circuit resistance. A larger β value indicates a faster decay of the resonant current, while the oscillatory behavior of the resonant process is jointly determined by the resonant angular frequency and the damping term. In the formula, e β ( t t 0 ) reflects the attenuation characteristics of resonant currents, with periodic variation characteristics determined by s i n ω ( t t 0 ) embodied.
When t 1 < t < t 2 , the inductor current and capacitor voltage are given by Equations (5) and (6):
i L ( t ) = i C ( t ) = V B 2 V C max 2 ω r L r e β t t 1 sin ω r t t 1
V C ( t ) = V B 2 V B 2 V C max ω r e β t t 1 × β sin ω r t t 1 + ω r cos ω r t t 1
In Equation (5), V B 2 represents the voltage value of battery B2. Based on Equations (2) and (6), the maximum capacitor voltage and minimum capacitor voltage can be derived, as shown in Equations (7) and (8), respectively:
V C max   = V B 1 + V B 1 V C min e β π ω r
V C min = V B 2 + V B 2 V C max e β π ω r
This leads to the derivation of Equations (9) and (10):
V C max   = V B 1 μ V B 2 1 μ
V C min = V B 2 μ V B 1 1 μ
where μ = e β π ω r , the capacitor voltage ripple is:
Δ V C = V C max V C min = 1 + μ 1 μ V B 1 V B 2
Through calculation, it can be determined that the voltage ripple is related to μ and the voltage difference between the two battery cells. Furthermore, when other circuit parameters remain unchanged, the voltage drop can significantly affect the amplitude of the resonant current.

2.1.3. Analysis of Equalization Issues in LC Resonant Equalization Circuits

The simulated equalization current flowing through the inductor of the two battery cells is shown in Figure 4.
As illustrated in Figure 4, the equalization current through the resonant inductor L r exhibits periodic oscillation with a gradually decreasing amplitude. When the equalization current is in the positive half-cycle, MOSFET switches Q1 and Q3 are turned on, and battery B1 discharges. When the current enters the negative half-cycle, MOSFET switches Q2 and Q4 are turned on, and battery B2 is charged. In this manner, one complete energy transfer cycle is accomplished. The local voltage and current waveforms of the inductor and capacitor are shown in Figure 5.
As illustrated in Figure 5a, under resonant conditions, the LC circuit exhibits resistive characteristics, meaning that the currents flowing through the resonant capacitor C r and the resonant inductor L r are equal in both magnitude and phase. Additionally, when the switches Q1 to Q4 are about to turn on, the current through the LC branch is intentionally made to decrease to zero. This transition allows zero-current switching (ZCS), where the switch operates at a moment when no current is flowing through it. By achieving ZCS, switching losses are effectively reduced, as there is no power dissipation during the switching event.
The overall balancing results, shown in Figure 6, indicate that the equalization time for batteries B1 and B2 is approximately 7122 s. This delay occurs because, as the voltage difference between the two batteries decreases, the resonant current amplitude also diminishes, causing the balancing speed to progressively slow down.

2.2. Dual-Layer LC Resonant Balancing Circuit

To address the issue of prolonged equalization times caused by insufficient voltage differentials in traditional LC equalization, this paper introduces a boost circuit integrated with the LC equalizer. This boost circuit elevates the voltage of discharged cells, increasing the voltage differential without altering circuit parameters. Consequently, it amplifies the equalization current amplitude and accelerates the equalization process. Furthermore, to extend the applicability to multi-cell batteries and enhance the scalability of the LC equalization circuit, this paper proposes a dual-layer LC resonant equalization circuit. Within each battery group, a Boost-LC resonant equalization circuit operates, while inter-group equalization is achieved via a switching inductor circuit. This dual-layer approach significantly accelerates equalization speed while simultaneously extending the application scope of LC equalization circuits.

2.2.1. Topology of the Dual-Layer LC Resonant Balancing Circuit

As shown in Figure 7, the proposed dual-layer LC balancing topology consists of three parts. The first part allows each individual battery cell to be connected to a Boost step-up circuit to increase its terminal voltage. The second part is the intra-group LC resonant balancing circuit, which is composed of two battery cells, four MOSFET switches, a resonant inductor L n , a resonant capacitor C n , and a resonant resistor R n . The third part is the inter-group switched-inductor balancing circuit, consisting of an energy storage inductor L m and two MOSFET switches, which enhances the scalability of the overall topology.
The equalization principle of the intra-group Boost-LC resonant circuit is consistent with that analyzed in Section 2.1.2. However, to accelerate the balancing process, a Boost step-up circuit is introduced across the higher-voltage battery to enlarge the voltage difference. By actively increasing the voltage difference, the amplitude of the resonant current in the resonant inductor and capacitor is increased, thereby effectively accelerating the equalization speed.
Taking the intra-group Boost-LC balancing of two battery cells as an example, the specific circuit configuration is shown in Figure 8.
Assuming that when the voltage of battery B1 exceeds that of battery B2, a boost circuit is connected across the terminals of battery B1. At this point, switches K1 and K4 open, while switches K2 and K3 close. The voltage of battery B1 is then boosted to U o u t by the boost circuit.
As shown in Figure 9, the operating principle of the Boost-LC circuit is fundamentally consistent with that of the conventional LC resonant balancing circuit. The primary difference lies in the fact that the high-voltage side in the Boost-LC circuit corresponds to the stepped-up voltage U o u t , which participates in the LC resonant equalization process with battery B2.
For inter-group balancing, a switched-inductor equalization circuit is adopted. By considering the two intra-group battery cells as an equivalent single battery, the equivalent inter-group balancing circuit can be obtained. Specifically, batteries B1 and B2 are regarded as a new equivalent battery M1, while batteries B3 and B4 are regarded as another equivalent battery M2. When the average voltage of M1 is higher than that of M2, the balancing process is illustrated in Figure 10.
The inter-group switched-inductor balancing process is relatively straightforward. When battery M1 discharges, MOSFET switch S1 is turned on, and battery M1 transfers energy to the energy storage inductor L. When battery M2 is charged, switch S1 is turned off, and the inductor L m freewheels through the antiparallel diode of switch S2, thereby transferring energy to battery M2. This process is repeated until voltage equalization is achieved.

2.2.2. Analysis of the Equalization Principle in Double-Layer LC Resonant Equalization Circuits

Based on the topology described above, the operating principle is further analyzed as follows. The underlying principle of Boost-LC resonant equalization is similar to the LC resonance principle described in Section 2.1.2, as shown in Figure 11.
The calculation of inductor current and capacitor voltage follows a similar approach, with the only difference being that the voltage across battery B1 is replaced by U o u t instead of V B 1 . The capacitor voltage ripple at this point is given by Equation (12):
Δ V C = V C max V C min = 1 + μ 1 μ U o u t V B 2
Here, U o u t represents the voltage value after the boost conversion. The specific calculation formula is
U o u t = V B 1 1 D
Consequently, the capacitor voltage ripple magnitude can be further converted into an expression related to the duty cycle, as shown in Equation (14):
Δ V C = V C max V C min = 1 + μ 1 μ V B 1 1 D V B 2
Furthermore, by combining Equations (1) and (5) with Equation (13), the relationship between the capacitive current peak I C _ p e a k and the Boost circuit duty cycle can be derived, as shown in Equation (15):
I C _ p e a k = Δ V C μ 2 ( 1 + μ ) ω r L r = 1 + μ 1 μ μ 2 ( 1 + μ ) ω r L r V B 1 1 D V B 2
The relationship between the peak value of the balanced current and the duty cycle D can be plotted as shown in Figure 12.
As shown in Figure 12, the peak capacitor current increases monotonically with the Boost duty cycle. This indicates that the equalization speed can be enhanced by properly increasing the Boost duty cycle. However, an excessively large duty cycle may lead to excessive current stress and larger transient fluctuations. Therefore, the duty cycle should be regulated within a reasonable range so that the Boost converter can enhance the balancing speed while maintaining safe operation of the circuit.
The timing diagram of the top-level switch-mode inductor balancing circuit is shown in Figure 13:
As shown in Figure 13, this depicts the switching timing state when the average value of battery M1 exceeds that of battery M2. Here, switch S1 operates in PWM waveform mode, while switch S2 remains continuously open.
When t 0 < t < t 1 , battery M1 discharges to charge the inductor. Neglecting the parasitic resistance across the inductor, the expression for the inductor’s current is given by Equation (16):
i ( t ) = V M 1 L t
In Equation (16), V M 1 is the voltage across battery M1, and L is the inductance value.
When t 1 < t < t 2 , the inductor L charges the battery M2 through the freewheeling diode. Similarly, neglecting the parasitic resistance across the inductor, the current through the inductor can be expressed as shown in Equation (17):
i ( t ) = i 0 V M 2 L t
In Equation (17), i 0 represents the maximum current value flowing through the inductor, while V M 2 denotes the voltage of battery M2. By deriving the equalization current, it becomes clear that an increase in V M 1 further amplifies the equalization current, which in turn accelerates the balancing speed between the battery modules.

3. Research on Equilibrium Strategies and Development of Equilibrium Simulation Systems

3.1. Equalization Variable

Currently, the primary variables for battery balancing include voltage, State of Charge (SOC), and capacity. Each variable exhibits distinct characteristics and applicability in practical scenarios. Capacity balancing relies on the battery’s actual capacity, but its effectiveness is constrained by the accuracy of SOC and State of Health (SOH) estimation. Due to the complexity of the estimation process and interference from multiple factors, capacity balancing offers limited feasibility and precision, resulting in its infrequent adoption. Voltage balancing is widely used due to its ease of measurement. However, lithium-ion batteries exhibit a “voltage plateau” between 20% and 80% SOC. Minor voltage differences may correspond to significant SOC deviations, potentially leading to “false balancing.” Furthermore, measured voltages typically represent terminal voltages. The lag in internal reaction rates prevents the terminal voltage from accurately reflecting the true open-circuit voltage, exacerbating measurement errors. SOC balancing accounts for both intrinsic battery characteristics and external conditions. It provides a deeper characterization of internal consistency issues within the battery pack, effectively avoiding false balancing phenomena. This approach improves overall consistency, extends service life, and enhances system reliability. Therefore, selecting SOC as the balancing variable is more reasonable.

3.2. Equalization Control Strategy

The proposed equalization control strategy consists of three parts: SOC acquisition, equalization decision, and equalization current regulation. In this study, SOC is treated as an available control variable so that the analysis can focus on the topology and current regulation mechanism of the proposed equalizer. This assumption is adopted for simulation-based mechanism verification, while the influence of SOC estimation error in practical battery management systems is discussed as a limitation of the present work. An equalization threshold of 0.02 is introduced according to the SOC distribution of the battery pack and the pairwise SOC differences within and between groups. This threshold represents a compromise between control sensitivity and switching stability: it is sufficiently small to detect meaningful imbalance in time, while also avoiding unnecessary equalization actions caused by very small SOC fluctuations. On this basis, dual closed-loop regulation of the equalization current is implemented for both intra-group and inter-group balancing. The outer loop determines the reference equalization current according to the SOC deviation, whereas the inner loop regulates the actual equalization current to track the reference value. Through this cascaded structure, the balancing process can be accelerated when the inconsistency is large and can be moderated when the cells approach equilibrium, thereby improving both balancing speed and operational safety.

3.2.1. Overall Equalization Flowchart

As shown in Figure 14, the equalization process of the dual-layer LC resonant balancing circuit starts with the acquisition of battery voltages and SOC values. The overall SOC range of the battery pack, the SOC differences between adjacent battery groups, and the SOC differences between cells within each group are then calculated. Based on these quantities, the controller determines whether inter-group or intra-group equalization should be activated. For inter-group balancing, the average SOC difference between adjacent battery groups is evaluated, and equalization is enabled only when the corresponding difference exceeds the preset threshold of 0.02. For intra-group balancing, the duty cycle of the Boost converter is adjusted according to the SOC deviation. When the SOC difference is large, the controller increases the duty cycle to enhance the equalization current and shorten the balancing time. When the SOC difference becomes small, the duty cycle is reduced to suppress excessive current, thereby mitigating thermal stress and lowering the risk of over-equalization.

3.2.2. Intra-Group Boost–LC Resonant Equalization Current Control

As described in Section 2.2.2, the switching pattern of the LC resonant circuit in the intra-group Boost–LC equalization scheme is fixed: Q1, Q3, as well as Q2, Q4, operate in complementary conduction with a duty cycle of 0.5, and the switching frequency is set equal to the resonant frequency fr. Therefore, the primary control objective focuses on the Boost step-up circuit. By exploiting the relationship between the duty cycle and the peak capacitor current, a dual closed-loop SOC-based equalization current control strategy is designed. The outer loop is the SOC loop, in which the input is the SOC difference between battery B1 and battery B2, and the output is the reference value of the equalization current. The inner loop is the current loop, where the input is the deviation between the reference equalization current and the measured RMS value of the capacitor current, and the output is the duty cycle of the Boost converter. Through dual proportional–integral (PI) controllers, the equalization current—and thus the balancing speed of the battery pack—can be rapidly and accurately regulated. This control strategy effectively enhances operational safety during the equalization process and prevents the issue of excessively slow or even negligible current attenuation caused by the voltage boosting effect of the Boost–LC resonant circuit, thereby avoiding the persistence of equalization current after over-equalization has occurred.
The parameters of the PI controllers in this study are determined based on a combination of analytical insight and simulation-based tuning. Specifically, the inner current loop is designed to achieve a fast dynamic response with sufficient damping, while ensuring stability of the LC resonant system. The outer SOC loop is tuned to operate at a slower time scale to avoid interaction with the inner loop and to ensure smooth convergence of the equalization process.
In practice, the PI parameters are adjusted iteratively in MATLAB/Simulink to achieve a compromise between response speed, overshoot, and system stability under different operating conditions. This approach is widely adopted in power electronics applications where the system exhibits nonlinear and time-varying characteristics.
From a control perspective, the inner current loop behaves similarly to a type-1 system due to the integral action of the PI controller, while the outer SOC loop provides additional integral regulation to eliminate steady-state SOC error. However, due to the nonlinear characteristics of the Boost–LC system, the controller parameters are primarily tuned based on dynamic performance requirements rather than strict analytical design.
The detailed block diagram of the SOC-based dual closed-loop equalization current control for the Boost–LC resonant balancing circuit is shown in Figure 15.
As shown in Figure 15, the SOC-based dual closed-loop control block diagram for the Boost–LC resonant balancing circuit is presented. By utilizing the SOC difference and the current error as control inputs, the equalization current is precisely regulated, enabling adaptive equalization of the Boost–LC resonant circuit. This strategy enhances balancing speed while further improving the operational safety of the Boost–LC resonant equalization system.

3.2.3. Inter-Group Switched-Inductor Equalization Current Control

The control of the inter-group switched-inductor balancing circuit is relatively simpler than that of the Boost–LC resonant balancing circuit. This is primarily because the relationship between the duty cycle and the equalization current is straightforward. When the duty cycle, voltage, and switching period are fixed, the equalization current in discontinuous conduction mode (DCM) exhibits an approximately linear relationship with the duty cycle. Therefore, the SOC-based dual closed-loop current control strategy developed for the Boost–LC resonant circuit can also be applied to the switched-inductor balancing circuit, although the corresponding PI parameters require further tuning.
The block diagram of the SOC-based dual closed-loop equalization current control for the switched-inductor balancing circuit is shown in Figure 16.
As shown in Figure 16, the SOC-based dual closed-loop equalization current control for the switched-inductor balancing circuit differs from that of the Boost–LC resonant balancing circuit primarily in the control object. By appropriately adjusting the PI parameters, the SOC-based dual closed-loop equalization current control can be implemented for both inter-group and intra-group balancing.

4. Battery Pack Equalization Simulation and Analysis

4.1. Simulation Model Parameter Settings

To verify the superiority of the proposed dual-layer LC resonant balancing circuit and the effectiveness of the equalization control strategy, a simulation model of the dual-layer LC resonant balancing circuit is established in MATLAB/Simulink. The model parameters are categorized into two groups: circuit parameters and control parameters.

4.1.1. Circuit Parameter Settings

As shown in Table 1, these are the battery model parameters. The voltage exponential region refers to the area during battery discharge where voltage changes exponentially with SOC. Since the voltage drop in the exponential region is greater than that in the voltage plateau phase, it better reflects battery differentiation. Therefore, when the battery voltage drops to 3.2 V, the consumed battery capacity is set to 1.5 Ah.
As shown in Table 2, these are the parameters for the dual-layer LC resonant equalization circuit. The selection of parameters is primarily aimed at reducing the resonant frequency to enhance simulation observability, while maintaining the consistency of the system’s dynamic characteristics. To improve simulation speed, the resonant frequency was lowered by increasing the resonant inductance. Under the current LC circuit parameters, the calculated resonant frequency is 22.5 Hz. Similarly, the Boost circuit also increases the switching frequency of the boost switch by raising the boost inductor. Ultimately, under the current Boost circuit parameters, the boost frequency is 225 Hz. By setting the Boost frequency to an integer multiple of the resonant frequency, the original resonant circuit’s Zero Current Switching (ZCS) can be maintained.

4.1.2. Control Parameter Settings

As shown in Table 3, these are the fundamental parameters of the control circuit. The frequencies listed are simplified for simulation purposes, enabling extended simulation runs. Consequently, they deviate slightly from actual values. However, the operating frequency can be increased by adjusting capacitance and inductance parameters. The overall balancing effect remains consistent. Therefore, this simulation is conceptual in nature and should only serve as a reference for designing actual circuit parameters.

4.2. Simulation Results and Analysis

4.2.1. Analysis of Battery Equalization Results Under Fixed Duty Cycle

As shown in Figure 17, the equalization results under a fixed duty cycle in the idle state of the battery pack are presented. It can be observed that the overall equalization time is approximately 420 s, which represents a significant improvement compared with the 7000 s required by the conventional LC resonant equalization circuit. To verify whether zero-current switching (ZCS) is achieved in the Boost–LC configuration, the equalization current waveform is examined. Taking the current waveform of switch Q1 as an example, the corresponding results are shown in Figure 18.
As shown in Figure 18, the current waveform of switch Q1 is presented. In the initial stage, due to the transient response of the Boost step-up circuit, a certain period is required for voltage buildup, resulting in temporary reverse current flowing back to battery B1 and overshoot caused by over-modulation, which leads to current spikes. However, as the output voltage of the Boost converter stabilizes, the peak equalization current remains above 2A, significantly enhancing the balancing speed compared with conventional LC equalization.
The comparison results between the Boost step-up voltage and the non-boosted battery are shown in Figure 19.
As shown in Figure 19, the causes of the reverse current and current spikes observed in switch Q1 can be clearly identified. Further analysis indicates that this phenomenon results from the relatively low switching frequency of the Boost converter, which is set at 225 Hz. At this frequency, the capacitor voltage cannot rapidly stabilize to the desired level, leading to transient voltage fluctuations and associated current distortion. Therefore, this initial-stage issue can be considered a temporary transient effect. In practical applications, it can be mitigated by increasing the switching frequency and optimizing circuit parameters.
As shown in Figure 20, the equalization results under a fixed duty cycle during 1 A discharge of the battery pack are presented. The overall equalization time differs from that of the idle condition by only 3 s, corresponding to a relative error of approximately 0.7%. This demonstrates the stability of the dual-layer LC resonant equalization circuit, indicating that the balancing speed is not significantly affected by external charge–discharge currents.
Similarly, as shown in Figure 21, the equalization results under a fixed duty cycle during 1A charging are provided. The difference in equalization time compared with the idle condition is approximately 1 s, and the difference compared with the discharging condition is about 4 s, yielding an average relative error of approximately 0.6%. These results further verify that the proposed balancing circuit achieves consistent equalization performance under multiple operating conditions, highlighting the superiority and robustness of the dual-layer LC resonant topology.

4.2.2. Analysis of Battery Equalization Results Under Dual Closed-Loop Control

As shown in Figure 22, the dual closed-loop equalization results under the idle state of the battery pack are presented. It can be clearly observed that, compared with fixed duty cycle control, the equalization speed under dual closed-loop control is significantly improved, with the equalization time reduced from 420 s to 213 s, a decrease of 207 s, corresponding to an approximate 50.7% increase in balancing speed.
As shown in Figure 23, the dual closed-loop equalization results during 1 A discharge of the battery pack are presented. The equalization time is 212 s, differing by only 1 s from that under the idle condition. This indicates that the dual closed-loop control not only significantly enhances the battery equalization speed but also further stabilizes the balancing process.
As shown in Figure 24, the dual closed-loop equalization results during 1 A charging of the battery pack are presented. It is evident that the battery equalization remains stable under both charging and discharging conditions, and the equalization speed is significantly higher compared with the fixed duty cycle strategy, demonstrating the effectiveness of the proposed equalization control approach.
As shown in Table 4, the dual-layer LC resonant balancing circuit demonstrates stable equalization performance under idle, charging, and discharging conditions. Moreover, the dual closed-loop equalization current control effectively enhances the balancing speed, achieving an average improvement of approximately 49%.

5. Conclusions

The present study addresses the limitations of traditional LC resonant battery equalization circuits, namely, slow balancing speed constrained by individual cell voltage differences, poor scalability for multi-cell systems, and susceptibility to over-equalization. A dual-layer LC resonant balancing circuit combined with an SOC-based dual closed-loop control strategy is proposed. Within each battery group, a Boost–LC resonant architecture actively increases the effective voltage differential while maintaining the soft-switching, low-loss characteristics. Between groups, a switched-inductor structure is introduced to enable flexible expansion for large-capacity battery packs. SOC is selected as the equalization variable, and a coordinated dual closed-loop control strategy is designed, with the SOC difference forming the outer loop and the current deviation forming the inner loop. Dual PI controllers adaptively regulate the equalization current, effectively mitigating false equalization and over-equalization.
A MATLAB/Simulink model is established to validate the proposed approach under idle, 1 A charging, and 1 A discharging conditions. Simulation results demonstrate that the proposed topology reduces the equalization time from 7000 s in conventional circuits to 420 s under fixed duty cycle control. The dual closed-loop control further increases the average equalization speed by 49%, compressing the total equalization time to approximately 210 s. Moreover, the relative error of equalization time across the three operating conditions is below 1%, indicating excellent adaptability and stability. The approach also preserves zero-current switching (ZCS) characteristics, achieving high efficiency and low losses.
This study successfully enhances the speed, scalability, and control precision of LC resonant balancing circuits simultaneously. Further improvements remain possible, such as optimizing the Boost converter parameters to mitigate initial current spikes and reverse currents, developing a dual-variable equalization scheme incorporating SOH, and constructing a hardware platform for experimental validation. Overall, the proposed approach effectively addresses the core limitations of traditional LC resonant equalization circuits, significantly improves battery pack balancing performance, and offers strong engineering value for applications in electric vehicles, renewable energy storage, and other fields, providing theoretical and technical support for the advancement of battery management system equalization technology.

Author Contributions

Y.Z.: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Investigation (equal); Methodology (equal); Resources (equal). Y.X.: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Methodology (equal); Resources (supporting); Software (equal); Writing—original draft (equal); Writing—review & editing (equal). J.W.: Methodology (equal); Writing—review & editing (equal). H.H.: Methodology (supporting); Software (supporting). All authors have read and agreed to the published version of the manuscript.

Funding

This work is supported by the National Natural Science Foundation of China (Grant No.52377207).

Data Availability Statement

The data that support the findings of this study are available from the corresponding author upon reasonable request.

Conflicts of Interest

The authors declare no conflicts of interest.

References

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Figure 1. LC Resonant Equalization Circuit.
Figure 1. LC Resonant Equalization Circuit.
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Figure 2. Operational phases of the LC resonance equalization process.
Figure 2. Operational phases of the LC resonance equalization process.
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Figure 3. LC Resonance Timing Diagram.
Figure 3. LC Resonance Timing Diagram.
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Figure 4. Equalization current of the LC resonant circuit.
Figure 4. Equalization current of the LC resonant circuit.
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Figure 5. Local voltage and current waveforms of the LC resonant capacitor and inductor.
Figure 5. Local voltage and current waveforms of the LC resonant capacitor and inductor.
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Figure 6. LC resonant equalization results.
Figure 6. LC resonant equalization results.
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Figure 7. Topology of the Dual-Layer LC Balancing Circuit.
Figure 7. Topology of the Dual-Layer LC Balancing Circuit.
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Figure 8. Boost-LC balancing circuit.
Figure 8. Boost-LC balancing circuit.
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Figure 9. Operating process of the Boost-LC balancing circuit.
Figure 9. Operating process of the Boost-LC balancing circuit.
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Figure 10. Operating process of the switched-inductor balancing circuit.
Figure 10. Operating process of the switched-inductor balancing circuit.
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Figure 11. Boost-LC Resonance Timing Diagram.
Figure 11. Boost-LC Resonance Timing Diagram.
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Figure 12. Relationship between Boost Duty Cycle and Peak Capacitor Current in Boost-LC.
Figure 12. Relationship between Boost Duty Cycle and Peak Capacitor Current in Boost-LC.
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Figure 13. Switching Inductor Circuit Balancing Timing Diagram.
Figure 13. Switching Inductor Circuit Balancing Timing Diagram.
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Figure 14. Dual-Layer LC Resonant Equalization Circuit Equalization Flowchart.
Figure 14. Dual-Layer LC Resonant Equalization Circuit Equalization Flowchart.
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Figure 15. Block Diagram of the SOC-Based Dual Closed-Loop Equalization Current Control for the Boost–LC Resonant Balancing Circuit.
Figure 15. Block Diagram of the SOC-Based Dual Closed-Loop Equalization Current Control for the Boost–LC Resonant Balancing Circuit.
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Figure 16. Block Diagram of the SOC-Based Dual Closed-Loop Equalization Current Control for the Switched-Inductor Balancing Circuit.
Figure 16. Block Diagram of the SOC-Based Dual Closed-Loop Equalization Current Control for the Switched-Inductor Balancing Circuit.
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Figure 17. Equalization Results under Fixed Duty Cycle in the Idle State of the Battery Pack.
Figure 17. Equalization Results under Fixed Duty Cycle in the Idle State of the Battery Pack.
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Figure 18. Current Waveform of Switch Q1.
Figure 18. Current Waveform of Switch Q1.
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Figure 19. Comparison of Boost Step-Up Results and Non-Boosted Battery Voltage.
Figure 19. Comparison of Boost Step-Up Results and Non-Boosted Battery Voltage.
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Figure 20. Equalization Results under Fixed Duty Cycle during 1 A Discharge of the Battery Pack.
Figure 20. Equalization Results under Fixed Duty Cycle during 1 A Discharge of the Battery Pack.
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Figure 21. Equalization Results under Fixed Duty Cycle during 1 A Charging of the Battery Pack.
Figure 21. Equalization Results under Fixed Duty Cycle during 1 A Charging of the Battery Pack.
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Figure 22. Dual Closed-Loop Equalization Results in the Idle State of the Battery Pack.
Figure 22. Dual Closed-Loop Equalization Results in the Idle State of the Battery Pack.
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Figure 23. Dual Closed-Loop Equalization Results during 1 A Discharge of the Battery Pack.
Figure 23. Dual Closed-Loop Equalization Results during 1 A Discharge of the Battery Pack.
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Figure 24. Dual Closed-Loop Equalization Results during 1 A Charging of the Battery Pack.
Figure 24. Dual Closed-Loop Equalization Results during 1 A Charging of the Battery Pack.
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Table 1. Battery Model Parameters.
Table 1. Battery Model Parameters.
Model Name/UnitNumerical Value
Battery TypeTernary lithium-ion battery
Battery Rated Voltage/V3.7
Battery Rated Capacity/Ah2
Initial Battery SOC (%)65~90
Battery internal resistance/Ω0.00818
Voltage Index Range [V Ah][3.2 1.5]
Battery response time/s1 × 10−3
Table 2. Parameters of Double-Layer LC Resonant Equalization Circuit.
Table 2. Parameters of Double-Layer LC Resonant Equalization Circuit.
Model Name/UnitNumerical Value
Resonant Inductor/H 1 × 10 2
Resonant Capacitor/F 5 × 10 3
Resonant resistance/Ω 1 × 10 1
Boost inductor/H 1.97 × 10 2
Boost capacitor/F 1.48 × 10 4
Energy storage inductor/H 1 × 10 2
Table 3. Control Circuit Parameters.
Table 3. Control Circuit Parameters.
Model Name/UnitNumerical Value
Resonant Switching Frequency/Hz22.5
Resonant Switching Duty Cycle/%50
Boost Switching Frequency/Hz225
Boost Switching Duty Cycle/%10
Switching Inductor Circuit Switching Frequency/Hz200
Switching Inductor Circuit Switching Duty Cycle/%49
Table 4. Comparison of Equilibrium Results.
Table 4. Comparison of Equilibrium Results.
Balancing StrategyBalancing StateBalancing Time (s)Speed Increase
Fixed Duty CycleIdle420-
Fixed Duty Cycle1A Discharge417-
Fixed Duty Cycle1A Discharge416-
Dual Closed LoopIdle21349.3%
Dual Closed Loop1A Discharge21249.1%
Dual Closed Loop1A Discharge21448.5%
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MDPI and ACS Style

Zhang, Y.; Xu, Y.; Wang, J.; Hong, H. Multi-Cell Extended Equalization Circuit and Dual Closed-Loop Control Method Based on the Boost–LC Architecture. Electronics 2026, 15, 1518. https://doi.org/10.3390/electronics15071518

AMA Style

Zhang Y, Xu Y, Wang J, Hong H. Multi-Cell Extended Equalization Circuit and Dual Closed-Loop Control Method Based on the Boost–LC Architecture. Electronics. 2026; 15(7):1518. https://doi.org/10.3390/electronics15071518

Chicago/Turabian Style

Zhang, Yu, Yi Xu, Jun Wang, and Haiqiang Hong. 2026. "Multi-Cell Extended Equalization Circuit and Dual Closed-Loop Control Method Based on the Boost–LC Architecture" Electronics 15, no. 7: 1518. https://doi.org/10.3390/electronics15071518

APA Style

Zhang, Y., Xu, Y., Wang, J., & Hong, H. (2026). Multi-Cell Extended Equalization Circuit and Dual Closed-Loop Control Method Based on the Boost–LC Architecture. Electronics, 15(7), 1518. https://doi.org/10.3390/electronics15071518

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