Comparative Analysis of Sliding-Mode Control Techniques in Five-Level Active Neutral Point Clamped Flying Capacitor Inverter

Abstract

This paper presents a systematic experimental comparison of three sliding-mode-based current control strategies—traditional sliding mode control (SMC), fast terminal sliding mode control (FTSMC), and super-twisting sliding mode control (STSMC)—applied to a grid-connected five-level active neutral point clamped flying capacitor (5L-ANPC-FC) inverter. Unlike existing studies that typically investigate a single controller or topology, this work provides a fair, hardware-validated benchmark under identical operating conditions, enabling a clear assessment of convergence speed, harmonic performance, robustness, and implementation complexity. All controllers are designed within a unified framework and their stability is rigorously analyzed using Lyapunov theory. Experimental evaluations are conducted under steady-state operation, step changes in reference current, grid-voltage sag/swell, and DC-link voltage variations. The results demonstrate that while all three controllers ensure robust current tracking and inherent DC-side capacitor voltage balancing without additional control loops, FTSMC achieves the lowest grid-current total harmonic distortion (THD) and fastest convergence. STSMC effectively suppresses chattering, and traditional SMC offers a simple yet reliable baseline solution. The presented findings provide practical design guidelines for selecting appropriate sliding-mode controllers in high-performance multilevel inverter applications. Among the assessed control techniques, FTSMC has the most rapid dynamic response, characterized by a rise time of 0.1 ms and a minimal grid-current THD of 1.95%, indicating exceptional steady-state and transient performance. STSMC markedly diminishes chattering and ripple, attaining a THD of 2.04% with enhanced waveform smoothness relative to traditional SMC. Conversely, traditional SMC offers a more straightforward implementation but demonstrates elevated ripple and THD levels of around 2.29%, along with a peak current inaccuracy of 6–8%. The results underscore the trade-offs between implementation simplicity, dynamic responsiveness, and harmonic performance of the evaluated control techniques.

1. Introduction

Today, power electronic systems are constantly improving to meet increasing energy needs more efficiently, reliably, and with higher quality. Inverters are crucial in this progress, transforming direct current (DC) into alternating current (AC) for uses like renewable energy, motor drives, uninterruptible power supplies (UPS), and electric vehicles. Unlike traditional inverters, multilevel inverters generate low-harmonic voltage and current waveforms, reduce dv/dt stress, and minimize switching losses, while also subjecting power switches to less voltage stress, thus improving efficiency and reducing costs. Due to these advantages, multilevel inverter architectures are commonly selected for medium and high-power applications [1,2]. Among the prominent multilevel inverter designs, neutral point clamped (NPC), flying capacitor (FC), and cascaded H-bridge (CHB) inverters are well studied in the literature [3,4,5].

Although each topology has benefits, it also has inherent limitations. In high-voltage applications, NPC and FC inverters encounter issues such as increased component count, capacitor voltage imbalance, and circuit complexity. Meanwhile, CHB inverters require multiple isolated DC sources, which can raise system costs and complexity. To address these challenges, the interest in hybrid multilevel inverter topologies have increased [6]. For instance, the active neutral point clamped flying capacitor (ANPC-FC) inverter combines NPC and FC structures to produce a five-level output voltage [7]. Using fewer flying capacitors, the ANPC-FC reduces passive components and enables more compact filter designs compared to traditional NPC and FC inverters [8]. However, the success of these advanced topologies largely depends on the control strategy employed. Techniques like model predictive control (MPC) and sliding mode control (SMC) have become prominent in multilevel inverter applications. MPC offers a quick dynamic response and handles constraints effectively but has variable switching frequency, high computational requirements, and is sensitive to parameter changes [9,10,11]. Conversely, SMC provides robust performance with accurate tracking and high resistance to uncertainties and external disturbances, making it especially suitable for complex multilevel converter structures [12,13]. SMC is a nonlinear control technique that directs system behavior onto a predefined sliding surface and maintains stability along it. Its key advantages are its fast dynamic response, robustness to parameter uncertainties, and less dependence on exact system models [14,15,16]. However, traditional SMC often causes chattering, which can impair control accuracy and increase switching losses. To mitigate this issue, various improved SMC methods have been introduced, including higher-order sliding mode control, super-twisting algorithms, and finite control set approaches, all designed to reduce chattering and improve transient response [15,17,18].

In this context, super-twisting algorithm-based sliding mode control (STSMC) is specifically designed to minimize chattering and provide a smoother control response. By eliminating the use of derivatives, STSMC generates a continuous, low-frequency control signal that improves robustness against disturbances and measurement noise compared to conventional SMC [19]. Owing to its continuous control action, STSMC can be effectively integrated with carrier-based modulation techniques and is therefore suitable for applications requiring high switching frequencies. Several experimental studies have demonstrated the effectiveness of STSMC in power electronic converters. For instance, its application in a single-stage on-board charger achieved fast and accurate grid-current tracking without overshoot during sudden reference changes, while reducing the grid-current THD to 2.38%, satisfying international power quality standards [20]. Similarly, STSMC applied to input-series–output-parallel current-source converter topologies provided millisecond-level recovery times under reference current and input voltage variations, along with inherent current and voltage sharing between cells [21]. These results indicate that STSMC can simultaneously achieve fast transient response, low ripple, and constant switching frequency operation, making it a suitable control strategy for multilevel inverters and renewable-energy-based power converters [22,23,24].

Another significant form of SMC-based controllers includes terminal sliding mode control (TSMC) and its advanced version, fast terminal sliding mode control (FTSMC). TSMC ensures finite-time convergence by directing system states to a specific terminal sliding surface, offering high robustness and better steady-state accuracy [25]. However, its convergence speed may slow down when the system is far from equilibrium [26]. FTSMC overcomes this by incorporating additional nonlinear terms into the sliding surface, enabling faster convergence during both transient and near-equilibrium phases [27,28,29]. Consequently, FTSMC has become a promising option for high-performance power electronic applications requiring rapid dynamic responses. Recent studies have demonstrated the effectiveness of advanced sliding-mode control strategies in grid-connected inverter applications. In particular, fast non-singular terminal sliding mode (FNTSM) control has been extensively investigated due to its ability to ensure finite-time convergence through nonlinear sliding surfaces and Lyapunov-based design. While conventional SMC offers structural simplicity and robustness, it suffers from chattering, which may degrade waveform quality. To overcome this limitation, fast terminal sliding mode control (FTSMC) introduces nonlinear terms that enable finite-time convergence and improved transient performance. However, most existing studies focus on individual control methods or rely primarily on simulations, limiting fair and direct comparisons under identical operating conditions [30,31]. In addition, recent developments in non-singular terminal sliding mode control have further strengthened the theoretical foundation of finite-time sliding-mode-based designs. In particular, ref. [32] presents a comprehensive analysis of non-singular terminal sliding mode control with a variable-gain design, demonstrating enhanced robustness against parameter perturbations and improved dynamic performance. These findings provide strong theoretical support for the use of advanced terminal sliding-mode-based control strategies, such as FTSMC, in power electronic applications requiring fast convergence and high robustness. Despite extensive research on sliding-mode control strategies, a comprehensive experimental comparison between conventional SMC, STSMC, and FTSMC on the same five-level ANPC-FC inverter under identical conditions is still lacking in the literature. Most studies mainly focus on a single control approach, predominantly relying on simulations, or analyze different converter topologies, making direct performance comparisons challenging.

The common feature of the three SMC methods mentioned above is that they ensure system stability in the face of parameter uncertainties, sudden load changes, and external disturbances. It has been found that these advanced sliding-mode control techniques smooth the output waveform and shorten the transient period, particularly in complex topologies such as multilevel inverters. In conclusion, SMC, FTSMC, and STA-SMC each offer various advantages, and selecting the most appropriate control strategy for the application affects system performance.

Although sliding-mode-based control strategies have been extensively investigated for multilevel inverters, a comprehensive experimental comparison of different SMC variants applied to the same five-level ANPC-FC topology is still missing in the literature. Existing works typically focus on a single controller structure, rely heavily on simulation results, or address different inverter topologies and operating conditions, making direct performance comparison difficult.

Conventional current control methods, such as PI controllers combined with PWM strategies (e.g., SPWM and SVPWM), are widely used in grid-connected inverter applications due to their simple structure and satisfactory steady-state performance. However, their dynamic response and robustness may degrade under parameter uncertainties and grid disturbances unless additional compensation mechanisms are employed [33]. In contrast, sliding-mode control techniques have been shown to provide enhanced robustness, improved dynamic performance, and better harmonic characteristics in power electronic systems [34,35].

This paper fills this gap by providing a hardware-validated, side-by-side evaluation of traditional SMC, FTSMC, and STSMC for grid-current control of a 5L-ANPC-FC inverter with an LCL filter. This study provides a systematic and experimentally validated benchmark framework for evaluating advanced sliding-mode control strategies. The main contributions of this paper can be summarized as follows:

• A fair and systematic experimental benchmark of three sliding-mode-based current controllers—traditional SMC, FTSMC, and STSMC—applied to a grid-connected five-level ANPC-FC inverter, conducted under identical hardware and operating conditions.
• Unified controller design and stability analysis, where all three control strategies are formulated within a consistent framework and their stability is rigorously guaranteed using Lyapunov-based analysis, enabling an objective comparison.
• Comprehensive experimental validation under both steady-state and dynamic scenarios, including reference current steps, grid-voltage sag and swell, and DC-link voltage variations, reflecting realistic grid-connected operating conditions.
• Quantitative comparison of performance trade-offs, highlighting the relative advantages of each controller in terms of convergence speed, grid-current THD, chattering suppression, and implementation complexity.
• Demonstration of inherent DC-side capacitor voltage balancing without introducing DC-side control variables or additional balancing loops, significantly simplifying the controller structure for practical multilevel inverter applications.
• Practical design insights that guide the selection of appropriate sliding-mode control strategies for high-performance multilevel inverters, particularly in grid-connected systems requiring robustness against disturbances and parameter uncertainties.

To the best of the author’s knowledge, most existing studies on sliding-mode control techniques either focus on a single control strategy or evaluate different methods under non-identical system configurations. As a result, performing a fair and direct comparison between different SMC variants remains challenging. The present study provides a systematic and experimentally validated benchmark of SMC, FTSMC, and STSMC applied to the same 5L-ANPC-FC inverter under identical hardware and operating conditions. In addition, all controllers are developed within a unified design framework and tuned according to consistent performance criteria. This unified and hardware-based comparison enables a more objective evaluation of the relative advantages and limitations of each control strategy, which constitutes the main novelty of this work.

2. Mathematical Model of the ANPC-FC Inverter

Figure 1 illustrates the topology of a grid-connected five-level active neutral point clamped–flying capacitor (5L-ANPC-FC) inverter. This design features a hybrid structure that converts energy from a direct current (DC) source into alternating current (AC) output using suitable switching strategies. The neutral point is formed by splitting the DC bus voltage in half with capacitors C₁ and C₂, so each reach V_DC/2 when the total voltage is V_DC. The flying capacitors (C_f1 and C_f2) are crucial for generating the five-level output voltage waveform by setting intermediate voltage levels.

The switching states listed in

Table 1. Switching states of 5L-ANPC-FC inverter.

Switching States	Sx	Tx	Ty	vab	Cf1–Cf2
1	0	0	0	−VDC	↔
2	0	0	1	−VDC/2	↑
3	0	1	0	−VDC/2	↓
4	1	1	1	VDC	↔
5	1	1	0	VDC/2	↑
6	1	0	1	VDC/2	↓
7	1	0	0	0	↔
8	0	1	1	0	↔

Symbol notation: ↓: Discharging, ↑: Charging, ↔: No charge/discharge.

are used to synthesize a sinusoidal output waveform [36]. The inverter output is connected to the grid through a LCL filter, which suppresses the high-frequency switching components and provides an almost pure sinusoidal waveform at the grid interface. Although the inverter produces five distinct voltage levels, eight switching states are available, as shown in Table 1. The output voltage v_ab is identical for the switching-state pairs (2 and 3) and (5 and 6); however, in each pair the flying capacitors C_f1 and C_f2 are either charged or discharged. By appropriately alternating between these redundant states, the charge balance of the flying capacitors can be maintained. The gate signals are generated using three independent switching commands: Sx (low-frequency, 50 Hz) and T_y (high-frequency PWM, 50 kHz), as summarized in Table 1 [3].

A brief explanation of how the switching states listed in Table 1 are utilized to synthesize the output waveform is presented below, while a more detailed description of the operating principle is provided in [36]. For the sake of simplifying the analysis, a unity power factor is assumed, meaning that the output voltage and current are considered to be in phase.

Switching state 1: In this state, the inverter output voltage (v_ab) is equal to the lower voltage level (−V_DC). During this interval, the inductor current decreases, and since the load current does not flow through the flying capacitors C_f1 and C_f2, they are neither charged nor discharged.

Switching state 2: In this interval, v_ab stays at −V_DC/2. The reverse inductor current decreases along with the load current, and due to this variation, the flying capacitors become charged.

Switching state 3: In this state, v_ab is equal to half of the DC-link voltage with opposite polarity. The reverse inductor current decreases together with the load current, and as a consequence of this change, the flying capacitors are discharged.

Switching state 4: In this state, v_ab is equal to the higher voltage level (V_DC), and the output inductor current increases. The flying capacitors (C_f1 and C_f2) are bypassed during this interval, and therefore they are not charged or discharged by the load current.

Switching state 5: During this switching interval, the flying capacitors C_f1 and C_f2 are introduced into the circuit and block one-fourth of the DC-link voltage, which results in the inverter output voltage becoming V_DC/2. As the load current increases, both the inductor current and the flying-capacitor current increase throughout this period.

Switching state 6: During this interval, v_ab stays at V_DC/2 while the flying capacitors C_f1 and C_f2 continue to block V_DC/4, similar to the previous case. However, as the inductor current decreases together with the load current, both flying capacitors are discharged.

Switching state 7: In this switching period, the flying capacitors are bypassed because the inverter output voltage is equal to 0. The decrease in the inductor current prevents the flying capacitors from being charged or discharged by the load current.

Switching state 8: The inverter output voltage remains at 0, and, similar to the previous switching state, the flying capacitors C_f1 and C_f2 are bypassed. In this case, although the inductor current increases, the flying capacitors are neither charged nor discharged by the load current.

Consequently, five voltage levels between a and b points can be achieved by applying the above switching states properly to 5L-ANPC-FC. The switching states can be defined in the control methods that are based on a finite control set; however, the SMC techniques in this paper have continuous output and require modulation schemes.

The modulation scheme used to generate the switching signals and balance the capacitor voltages is provided in Figure 2a [37]. A two-level switching strategy is used to produce five-level signals at the inverter output, with switches T₁–T₄ operating at high frequency and switches S₁–S₄ functioning at low frequency. This structure allows five different voltage levels to be generated at the output. A total of eight semiconductor switches are used for each phase. The command signal for the low-frequency switches S₁–S₄ is obtained by directly comparing the modulation signal with the zero reference and is defined as follows:

$$D_{LF}\left(\theta \right)=\{\begin{array}{cc}1,& 0\le \theta \le \pi \\ 0,& \pi \le \theta \le 2\pi \end{array}.$$

(1)

Similarly, the high-frequency switching signals T₁–T₄ can be described as follows:

$$m=m_a\sin \left(\omega t\right),$$

(2)

$$D_{HF}\left(\theta \right)=\{\begin{array}{cc}m,& 0\le \theta \le \pi \\ 1+m,& \pi \le \theta \le 2\pi \end{array}.$$

(3)

Here, m represents the modulation signal, and m_a is the modulation index. The modulation waveform (D_HF (θ)), as defined by Equation (3), is generated using the modulation scheme depicted in Figure 2b. D_HF (θ) is compared with the carrier signals (C_r1 and C_r2) to generate high-frequency switching signals [37]. Consequently, the proper operation of the 5L-ANPC-FC inverter and the provision of current/voltage control depend on the applied modulation signal.

The inverter output terminal (a-b) is connected to the grid through a LCL filter. As shown in Figure 1, the 5L-ANPC-FC inverter is interfaced with the grid by means of this LCL filtering stage. By applying Kirchhoff’s voltage and current laws to the circuit, the resulting differential equations can be expressed as follows [37,38]:

$$L_1{\displaystyle \frac{{di}_1}{dt}}=v_{ab}-v_C,$$

(4)

$$L_2{\displaystyle \frac{{di}_2}{dt}}=v_C-v_g,$$

(5)

$$C{\displaystyle \frac{{dv}_C}{dt}}=i_1-i_2.$$

(6)

It is worth noting that Equations (4)–(6) represent the averaged model of the LCL filter, which is a point of the grid current dynamics. In this formulation, the inverter is represented by its output voltage, while the detailed switching behavior of the ANPC-FC topology is not explicitly modeled. Since the control objective in this paper is the regulation of grid current, this modeling approach is sufficient for the design of the considered SMC methods.

Based on the mathematical model developed in this section, different sliding-mode control strategies can be systematically designed to regulate the grid current and ensure stable inverter operation. The next section presents the controller design methodologies.

3. Design of Sliding-Mode Control Techniques

This section presents the designs of conventional sliding mode control (SMC), fast terminal sliding mode control (FTSMC) and super-twisting sliding mode control (STSMC) methods for controlling the output current of the grid-connected 5L-ANPC-FC inverter shown in Figure 1. Since the output current (i₂) control of the grid-connected 5L-ANPC-FC inverter is performed, the error function can be defined as follows:

$$x=i_2^{*}-i_2,$$

(7)

where $i_2^{*}$ represents the reference inverter output current (grid current), and can be defined as follows:

$$i_2^{*}=I_2^{*}\sin \left(\omega t\right).$$

(8)

In this context, $I_2^{*}$ denotes the amplitude of the reference current. The grid angular velocity is obtained using a conventional PLL. The above error and reference functions are used in each controller’s design discussed in this section.

3.1. Design of Traditional Sliding Mode Control

The design of SMC methods is carried out in two stages: defining the sliding surface function and generating the control law [12]. The sliding surface function can be defined as follows, considering that a LCL filter is present at the output of the 5L-ANPC-FC inverter.

$${\sigma }_{SMC}={\lambda }_{1}x+{\lambda }_2\dot{x}+{\lambda }_3\ddot{x},$$

(9)

where ${\lambda }_1$, ${\lambda }_2$ and ${\lambda }_3$ are the controller gains. It is worth noting that the second-order derivative term is included to match the converter’s relative degree. The controller gains ${\lambda }_1$, ${\lambda }_2$ and ${\lambda }_3$ determine the shape and convergence characteristics of the sliding surface ($\sigma$). ${\lambda }_1$ is tuned considering the steady-state error, while λ₂ and λ₃ play an important role in the dynamic response. It is worth remarking that λ₂ and λ₃ are effective on the weight of the first and second time derivatives of the error term (x). These derivatives take large values due to the short sampling time. Therefore, λ₂ and λ₃ are selected to be relatively small compared to λ₁. In addition, the second derivative takes a larger value than the first derivative. Motivated by this fact, the selection criterion is taken to be λ₂ > λ₃.

The resulting sliding surface function is used as a modulation signal (m) directly, and switching signals are generated according to the modulation scheme in Figure 2. The block diagram of the proposed SMC method is shown in Figure 3.

The stability of the proposed SMC method can be analyzed by using the following Lyapunov stability criterion.

(1)

$V>0$ when ${\sigma }_{SMC}\ne 0$

(2)

$V\to \mathrm{\infty }$ when $\left|{\sigma }_{SMC}\right|\to \mathrm{\infty }$

(3)

$\dot{V}<0$

Lyapunov’s energy function can be written as follows:

$$V={\displaystyle \frac{1}{2}}{{\sigma }_{SMC}}^2.$$

(10)

The first and second Lyapunov conditions are satisfied. The derivative of the Lyapunov function in (10) can be written as follows:

$$\dot{V}={\sigma }_{SMC}\dot{{\sigma }_{SMC}}={\sigma }_{SMC}(-k{\sigma }_{SMC})=-k{{\sigma }_{SMC}}^2,$$

(11)

where k is a positive constant that does not appear explicitly in the control law, since the sliding surface output (${\sigma }_{SMC}$) is directly applied to the modulator. Thus, the third condition is satisfied.

3.2. Design of Fast Terminal Sliding Mode Control

A significant limitation of the terminal SMC (TSMC) method is the insufficient convergence speed when the system dynamics deviate from the equilibrium point. This can lead to undesirable results, especially in power electronics applications requiring fast transient performance. The fast terminal SMC (FTSMC) method was developed to reduce the dynamic response time and is proposed as a robust alternative for inverter-based systems by providing faster convergence both at initial conditions and near-equilibrium regions. In the FTSMC method, the convergence performance of the system is improved by adding a linear term to the sliding surface. The sliding surface functions for TSMC and FTSMC can be defined as follows:

$${\sigma }_{TSMC}=\delta x^{q/p}+\dot{x},$$

(12)

$${\sigma }_{FTSMC}=\gamma x+\delta x^{q/p}+\dot{x},$$

(13)

where $\gamma >0$ and $\delta >0$ constants. Also, $p$ and $q$ are the positive constants ($q/p<1$). Comparing both surface functions in (12) and (13), adding the linear term in (13) leads to faster convergence toward the equilibrium point. In regions far from the equilibrium point, the dynamics are reduced to $\dot{x}=-\gamma x$, which guarantees a high convergence rate. In regions close to the equilibrium point, the dynamics take the form $\dot{x}=-\delta x^{q/p}$, and reach a steady state in finite time [39]. As discussed in [39], this approach guarantees that the system reaches equilibrium in a finite time, even if the initial conditions are $x\left(\mathrm{t}\right)\ne 0$. After reaching the orbital slip surface, the system state propagates along the surface and tends towards the equilibrium point in the phase plane. The time required to reach equilibrium from the initial condition is analytically expressed by the following equation:

$$t_{FTSMC}={\displaystyle \frac{p}{\delta (p-q)}}\left[\ln \left(\gamma x{\left(t_0\right)}^{1-(q/p)}+\delta \right)-\ln \left(\delta \right)\right].$$

(14)

Clearly, the convergence time depends on the controller gains (γ and δ). In practice, γ is selected to ensure a sufficiently fast transient response during large-signal disturbances, whereas δ, p, and q are tuned to guarantee finite-time convergence with acceptable control effort and current ripple. FTSMC guarantees the stability of the access mode [15]. Consequently, the FTSMC structure provides an effective and reliable control strategy thanks to its ability to converge quickly at initial conditions and in regions close to equilibrium. The block diagram of the proposed FTSMC method is shown in Figure 4. Similar to the traditional SMC method, the output of the controller is directly applied to the modulator.

The stability of the FTSMC can also be investigated by using the Lyapunov function in (10). The Lyapunov function can be written for FTSMC as follows:

$$V={\displaystyle \frac{1}{2}}{{\sigma }_{FTSMC}}^2.$$

(15)

The first criterion is satisfied for ${\sigma }_{FTSMC}\ne 0$. Also, the second criterion is satisfied for ${\sigma }_{FTSMC}\to \mathrm{\infty }$. The derivative of (15) is as follows:

$$\dot{V}={\sigma }_{FTSMC}\dot{{\sigma }_{FTSMC}}=-\mathsf{\gamma }{{\sigma }_{FTSMC}}^2-\delta {\left|{\sigma }_{FTSMC}\right|}^{1+{\displaystyle \frac{q}{p}}}.$$

(16)

Since both terms $-\mathsf{\gamma }{{\sigma }_{FTSMC}}^2$ and $-\delta {\left|{\sigma }_{FTSMC}\right|}^{1+{\displaystyle \frac{q}{p}}}$ are negative definite, $\dot{V}<0$ is strictly negative for all ${\sigma }_{FTSMC}\ne 0$. Therefore, the closed-loop system satisfies all Lyapunov stability criteria, ensuring global finite-time convergence.

3.3. Design of Super-Twisting Sliding Mode Control

The chattering phenomenon is a well-known drawback of the SMC methods. Various second-order SMC approaches have been developed in the literature to solve this problem, one of the most effective of which is the combination of the super-twisting algorithm with the sliding mode control (STSMC) [21]. In this section, the STSMC method is designed to control the output current of the 5L-ANPC-FC inverter. The sliding surface for the STSMC is defined based on the current error in (7) as:

$${\sigma }_{STSMC}=x=i_2^{*}-i_2.$$

(17)

The error term of the sliding surface function may contain high-frequency oscillations (chattering). This leads to undesirable fluctuations in the controller output. Therefore, suppressing chattering is critical. The super-twisting algorithm is an effective solution due to its insensitive nature to disturbances [40] and its significantly lower chattering output compared to the first-order sliding mode [41]. The general form of the super-twisting algorithm integrated SMC method can be written as follows:

$$m=u_1+u_2,$$

(18)

$$u_1=\alpha {\left|{\sigma }_{STSMC}\right|}^{0.5}sign\left({\sigma }_{STSMC}\right),$$

(19)

$$u_2=\beta \int sign\left({\sigma }_{STSMC}\right)dt.$$

(20)

Here, α and β are positive coefficients that determine controller performance. α represents the dynamic response, and β is effective in eliminating the steady-state error. In practice, α is selected to guarantee sufficiently fast convergence during transient conditions, whereas β determines the disturbance-rejection capability and chattering level. The block diagram of the STSMC method is shown in Figure 5.

The Lyapunov function for the STSMC can be written as follows [43,44,45]:

$$V=2\beta {\left|{\sigma }_{STSMC}\right|+{\displaystyle \frac{1}{2}}{u_2}^2+{\displaystyle \frac{1}{2}}(\alpha \left|{\sigma }_{STSMC}\right|}^{1/2} sign\left({\sigma }_{STSMC}\right)-u_2{)}^2.$$

(21)

The Lyapunov function is positive definite for ${\sigma }_{FTSMC}\ne 0$ and $u_2\ne 0$, hence, the first criterion is satisfied. Also, the second criterion is also satisfied for ${\sigma }_{FTSMC}\to \mathrm{\infty }$. The Lyapunov function is positive definite and radially unbounded. Its time derivative along the trajectories of the super-twisting algorithm satisfies

$$\dot{V}\le -c_{s1}{\left|{\sigma }_{STSMC}\right|}^{3/2}-c_{s2}\left|u_2\right|,$$

(22)

where c_s1 and c_s2 are positive constants depending on the controller gains α and β. This inequality implies global finite-time convergence according to standard homogeneity-based stability arguments. Therefore, the proposed STSMC ensures second-order sliding motion with significantly reduced chattering.

In many grid-connected converter applications, current control is performed in the synchronous dq reference frame obtained through Clarke and Park transformations. This approach allows decoupled control of active and reactive power components and generally improves steady-state tracking performance.

In the present study, however, the reference current signal is directly defined in the stationary frame. This choice is made intentionally to simplify controller implementation and to enable a fair experimental comparison of different sliding mode control strategies under identical conditions. Since sliding-mode control inherently exhibits strong robustness against disturbances and parameter variations, acceptable tracking accuracy can still be achieved without coordinate transformation.

Nevertheless, dq-frame implementation may further improve control precision and harmonic performance. Extending the comparative analysis of sliding-mode control techniques to synchronous reference frame implementations is considered a promising direction for future research.

3.4. Theoretical Comparison of Sliding-Mode Control Strategies

Sliding-mode control strategies differ significantly in terms of sliding surface formulation, control law continuity, and convergence characteristics. These theoretical properties directly influence waveform quality, transient performance, and robustness in practical power electronic applications.

The conventional SMC employs a linear sliding surface and a discontinuous control law. While this ensures strong robustness and fast reaching dynamics, it inherently introduces high-frequency oscillations (chattering) around the sliding surface. These oscillations may increase current ripple and switching activity in steady-state operation.

The STSMC method extends the classical approach by introducing a second-order sliding-mode algorithm that generates a continuous control signal. This structural feature significantly reduces chattering and improves disturbance rejection capability. However, the convergence speed is mainly governed by integral dynamics within the super-twisting algorithm.

In contrast, the FTSMC strategy modifies the sliding surface using nonlinear terminal terms. This design guarantees finite-time convergence and enhances transient response performance, particularly under large-signal disturbances. Nevertheless, the nonlinear formulation increases controller tuning complexity and may lead to higher switching effort during rapid transients. To summarize these theoretical characteristics,

Table 2. Comparative analysis of Sliding-Mode Control strategies.

Feature	SMC	STSMC	FTSMC
Sliding surface type	Linear	Linear (second-order dynamics)	Nonlinear terminal
Control law	Discontinuous	Continuous	Discontinuous nonlinear
Convergence type	Asymptotic	Finite-time (second-order)	Finite-time (fast terminal)
Chattering tendency	High	Very low	Moderate
Sensitivity to noise	Higher	Lower	Medium
Dynamic response	Medium	Medium	Fast
Controller tuning difficulty	Low	Medium	High
Expected switching activity	High	Low	Medium
Implementation complexity	Low	Medium	High

provides a comparative overview of the three sliding-mode control strategies.

As a consequence of these sections, each SMC method has its own unique feature and surface function. Therefore, the computational burden of each controller is different. The traditional SMC has the lowest computational cost but requires multiple derivative terms. Since FTSMC includes fractional-power operation, its computational burden increases. Also, STSMC further includes an integral term and additional nonlinear functions, resulting in the highest implementation burden among these methods.

To evaluate the practical effectiveness of the proposed control strategies, experimental validation is carried out on a laboratory-scale grid-connected inverter prototype. The details of the experimental setup and implementation are presented in the following section.

4. Experimental Results

This section presents a comparative experimental evaluation of the proposed control strategies. The performance of the controllers is first analyzed under steady-state conditions, followed by dynamic tests involving reference current changes and grid disturbances. The effectiveness of the proposed three SMC methods (traditional SMC, FTSMC, and STSMC) is investigated through experimental studies conducted under steady-state and transient conditions. The performance of each controller is experimentally validated using a single-phase ANPC inverter prototype connected to the grid through a LCL filter, as illustrated in Figure 6.

The proposed control algorithms were implemented on an OPAL-RT OP5700 (OPAL-RT Technologies Inc., Montreal, QC, Canada) real-time simulation and control platform, which enables rapid prototyping and high-fidelity execution of power electronic control strategies. The control system was executed with a sampling time of 10 µs, synchronized with the carrier-based PWM switching frequency of 50 kHz to ensure accurate digital control realization.

Grid current and inverter current measurements were obtained using isolated Hall-effect current sensors with appropriate bandwidth to capture high-frequency switching ripple components. Grid voltage was measured through voltage divider circuits combined with isolation amplifiers to ensure safe signal conditioning and noise immunity.

All measured analog signals were filtered using anti-aliasing filters and then acquired through the OPAL-RT analog input modules (16-bit). The digital PWM signals generated by the real-time controller were transmitted to the gate-driver circuits through optically isolated digital output channels. The control algorithms were implemented using a real-time execution loop, including phase-locked loop (PLL) for grid synchronization, reference current generation, sliding-mode controller computation, modulation signal generation, carrier comparison and switching signal update. This OPAL-RT OP5700-based experimental framework ensures reliable validation of the proposed controllers under realistic operating conditions and facilitates reproducibility of the reported results.

All experimental results were obtained using the system parameters summarized in

Table 3. System and control parameters.

Parameters	Symbol	Value
Grid voltage	vg	220 Vrms
Input voltage	Vdc	500 V
Inductances	L1, L2	1 mH, 0.5 mH
Capacitance	C	4.7 µF
SMC gains	${\lambda }_1,{\lambda }_2, {\lambda }_3$	$3$, ${10}^{-6}$, $5\times {10}^{-13}$
FTSMC gains	$\gamma$, $\delta$, $q/p$	$0.1$, $1$, $0.5$
STSMC gains	α, β	$0.1$, $300$
Sampling time	Ts	10 µs
Switching frequency	fsw	50 KHz

.

The gains of each controller are tuned by following the guidelines in Section 3 under the most common scenarios in practice as steady-state and step-change in the grid current. The proposed control strategies were implemented on an OPAL-RT real-time platform together with its associated development tools. The single-phase ANPC inverter prototype is derived from a Texas Instruments (TI) reference design [46], where only two inverter legs are utilized to realize the single-phase configuration. The control algorithms were executed on the OPAL-RT controller, which provides a high-performance real-time development environment well suited for rapid control prototyping. The LCL filter used in the experimental setup follows the Texas Instruments reference design, and its parameters are listed in Table 3. Since the focus of this study is on the control performance, the detailed LCL filter design procedure is not further elaborated. A common methodology is used for implementing the controllers, as follows:

• Measuring the grid current and obtaining the control error in (7);
• Obtaining the modulation signal (m) by calculating the relevant surface functions of each controller in Equations (9), (13) and (18);
• Generating the switching signals of each switch based on applying m to the modulation strategy in Figure 2.

Figure 7 shows the steady-state responses of traditional SMC, STSMC, and FTSMC methods obtained under 220 V_rms grid voltage, 10 A reference grid current amplitude and 500 V input DC voltage conditions. The grid (i₂) and inverter (i₁) currents are regulated to 10 A amplitude by the traditional SMC method, as shown in Figure 7a. Also, the grid current is in phase with the grid voltage (v_g). The spectrums of grid current for traditional SMC are shown in Figure 8a. Total harmonic distortion (THD) in grid current was measured to be 2.29%. It is worth noting that the grid current contains high-frequency ripples, as shown in the waveform in Figure 7a. Figure 7b shows the voltage and current waveforms obtained with the STSMC method. Similar to traditional SMC, grid and inverter current controls are achieved. It can be observed that the high-frequency ripples in the traditional SMC are considerably eliminated in the STSMC method with the chattering elimination capability of the super-twisting algorithm. Because of this, THD is reduced to 2.04% with the STSMC method, as shown in Figure 8b. The results obtained with the FTSMC method are shown in Figure 7c. Similar to the other methods, the currents are regulated to 10 A reference amplitude. Also, the grid current is in phase with the grid voltage. The lowest THD is obtained with the FTSMC method, as shown in Figure 8c. It is worth remarking that the DC side capacitor voltages are balanced naturally, as shown in the results obtained by the three methods. As a result of steady-state responses, it can be concluded that grid current control was achieved with the three SMC methods, and that the FTSMC method has slightly lower THD.

Figure 9 shows the transient responses obtained under a step change in the grid-current reference from 5 A to 10 A. All controllers are tested under identical operating conditions. As shown in Figure 9a, the conventional SMC successfully regulates the grid current to its reference before and after the step change; however, the steady-state waveform exhibits noticeable high-frequency ripples due to chattering. The responses of the STSMC and FTSMC controllers are shown in Figure 9b and Figure 9c, respectively.

The experimental results indicate that all three controllers achieve fast transient tracking within approximately one fundamental grid cycle, and no overshoot is observed in the current response. Among the three methods, the FTSMC exhibits the fastest transient convergence, whereas the conventional SMC results in the largest steady-state ripple amplitude. The STSMC provides a smoother current waveform with reduced chattering compared to conventional SMC. In addition, the grid current is in phase with the grid voltage before and after the step change in the grid current, as seen in the responses of each controller in Figure 9. These results show that, although all controllers ensure accurate reference tracking during the step change, their dynamic behavior differs in terms of convergence speed and steady-state ripple characteristics.

The performance of three SMC methods is also investigated under sag and swell in grid-voltage conditions. The initial grid voltage is 220 V_rms, and is reduced or increased by 10% during the tests. It is worth noting that the reference grid current amplitude is 10 A for these tests. The 10% voltage sag results obtained with traditional SMC, STSMC, and FTSMC methods are shown in Figure 10a, Figure 10b and Figure 10c, respectively. Considering these three results, the grid current amplitude is regulated to 10 A before and after the voltage sag. The FTSMC method exhibits faster regulation performance during the transition period than that of traditional SMC and STSMC methods.

The responses of the controllers under 10% swell in grid voltage are shown in Figure 11. Similar to voltage sag results, FTSMC offers a fast dynamic response, whereas traditional SMC and STSMC exhibit similar performances. Similar to the previous results, the grid current is in phase with the grid voltage before and after sag and swell in the grid voltage, as seen in the responses of each controller in Figure 10 and Figure 11. It can be concluded that the three SMC methods are robust against the variations in the grid voltage.

The dynamic performances of three SMC methods are further investigated under a step change in the input DC voltage from 400 V to 600 V. It is worth noting that the controllers do not include DC-side variables, as can be seen in Section 3. Therefore, this test is realized to clarify whether the voltage regulation and capacitor voltage balancing of the DC side can be obtained naturally. The results obtained with traditional SMC, STSMC, and FTSMC methods are shown in Figure 12a, Figure 12b and Figure 12c, respectively. Initially, the input voltage is 400 V, and V_C1 and V_C2 are regulated to half of V_dc successfully using the three SMC methods. Also, V_Cf1 and V_Cf2 are regulated to 100 V, which is 1/4 of V_dc. V_C1 and V_C2 voltages were increased to 300 V while V_Cf1 and V_Cf2 were increased to 150 V after increasing the input voltage to 600 V. The results reveal that DC-side voltage regulation and capacitor voltage balancing are achieved without a DC-side variable in the controller. In addition, the grid current was in phase with the grid voltage during all operation conditions in the test.

As summarized in

Table 4. Consolidated comparison of the SMC, STSMC and FTSMC controllers under various operating conditions.

Performance Criterion	SMC	STSMC	FTSMC
Grid-current THD (steady-state)	2.29%	2.04%	1.95%
Peak current error	6–8%	3–4%	<3%
Rise time	0.2 ms	0.2 ms	0.1 ms
Chattering/ripple level	Highest ripple; pronounced HF content	Noticeably reduced ripple	Moderate ripple with fast transient decay
Number of controller gains to tune	3	2	3
Control complexity	Lowest (traditional SMC)	Moderate (second-order SMC)	Highest (terminal-based nonlinear structure)
Robustness to sag/swell in the grid voltage	Stable tracking maintained; ripple distortion increases	Improved disturbance rejection	Highest robustness
Response to DC-link voltage step	Capacitor voltage balancing is achieved naturally	Capacitor voltage balancing is achieved naturally	Capacitor voltage balancing is achieved naturally

, all three controllers are capable of maintaining stable grid-current regulation under steady-state operation, reference step changes, grid-voltage sag/swell conditions, and DC-link voltage variations. It is worth noting that all results were obtained under identical hardware and tuning conditions. Additionally, three methods sustain the inherent DC-side capacitor-voltage self-balancing capability of the topology without the need for auxiliary balancing loops. Nevertheless, their performance characteristics exhibit notable differences in terms of waveform quality and dynamic behavior. The total harmonic distortion in the grid current obtained by the three methods is below the limits recognized by international standards [47]. The FTSMC method achieves a lower grid current THD of 1.95%, whereas the traditional SMC yields a higher THD of 2.29%. The high distortions in traditional THD are caused by its chattering nature. The peak current errors that occurred during dynamic transitions are shown in Table 4. The results show that the FTSMC is more robust against the variations in operating conditions compared to traditional SMC and STSMC methods. The higher peak current error was obtained through controlling the traditional SMC that mainly causes chattering, and high frequency noises in the grid current. Traditional SMC and STSMC methods exhibit similar rise time performance during dynamic transitions. Among these methods, FTSMC exhibited a faster rise time with approximately 0.1 ms. Overall, the FTSMC method offered better performance. On the other hand, FTSMC and traditional SMC methods require tuning of three controller gains, which can be specified as a disadvantage for controller design.

Although all three sliding-mode control strategies successfully regulate the grid current under various operating conditions, their dynamic and steady-state behaviors differ due to their inherent control structures.

The conventional SMC method employs a discontinuous control law, which forces the system states to reach the sliding surface rapidly. However, the switching nature of the control signal results in high-frequency oscillations around the sliding surface. This phenomenon manifests as current ripple in steady-state operation and may increase sensitivity to measurement noise. Consequently, conventional SMC demonstrates acceptable tracking performance but exhibits the highest ripple level among the compared methods.

The STSMC strategy introduces a second-order sliding-mode structure that generates a continuous control signal. This reduces chattering significantly and results in smoother current waveforms. The improved disturbance rejection capability of STSMC also contributes to better robustness under grid-voltage variations. However, since its convergence mechanism is based on integral action within the super-twisting algorithm, its transient response speed is comparable to that of traditional SMC.

In contrast, the FTSMC method modifies the sliding surface by incorporating nonlinear terminal terms, enabling finite-time convergence. This structural property allows faster dynamic response during step changes in the reference current and grid disturbances. As observed experimentally, FTSMC achieves the shortest rise time and lowest THD among the three methods. However, the nonlinear design increases controller tuning complexity and may lead to increased switching effort during transient events.

In practical grid-connected applications, variations in transmission line impedance and harmonic distortion in the grid voltage may influence current control performance. Increased grid impedance can modify the resonance characteristics of the LCL filter and may affect controller stability margins. Similarly, low-order harmonic components such as the third and fifth harmonics can introduce tracking challenges and degrade current waveform quality. Sliding-mode control strategies are generally known for their strong robustness against parameter uncertainties and external disturbances. Therefore, it can be expected that the proposed SMC variants maintain stable operation under moderate grid impedance variations. In particular, higher-order sliding-mode techniques such as STSMC and nonlinear terminal approaches like FTSMC are expected to exhibit improved disturbance rejection capability compared to conventional SMC. Increased grid impedance effectively shifts the LCL resonance frequency. Since sliding mode control enforces system trajectories toward the sliding surface regardless of moderate parameter variation, closed-loop stability can still be maintained within practical impedance ranges.

To further quantify the robustness of the proposed control strategies, the variations in key performance indicators under disturbance conditions were examined based on the experimental results. During grid voltage sag and swell conditions, the total harmonic distortion (THD) variation remained within a narrow range (approximately ±0.2–0.3%), while the steady-state current tracking error was observed to remain below 3% for all control methods. Similarly, under DC-link voltage variations, the controllers maintained stable operation with minimal deviation in output current quality.

In addition, the sensitivity of the control performance to variations in controller gain parameters was evaluated qualitatively. It was observed that moderate variations in the control gains did not significantly affect system stability or steady-state performance, although excessive deviations may influence transient response characteristics. These observations indicate that the proposed sliding-mode control strategies exhibit strong robustness against parameter uncertainties and external disturbances, ensuring reliable operation under practical non-ideal grid conditions.

Overall, the experimental findings confirm that higher-order and terminal sliding-mode structures provide improved waveform quality and dynamic performance, while conventional SMC remains attractive due to its simplicity and ease of implementation. To further clarify and summarize these observations, the key control characteristics of the investigated methods are comparatively presented in

Table 5. Analytical comparison of control characteristics.

Feature	SMC	STSMC	FTSMC
Sliding surface type	Linear	Second-order	Nonlinear terminal
Convergence speed	Medium	Medium	Fast
Chattering level	High	Low	Medium
THD performance	Moderate	Good	Best
Robustness	Good	Very good	Excellent
Design complexity	Low	Medium	High

.

To further interpret the effectiveness of the proposed sliding-mode control strategies, it is useful to briefly compare the obtained results with conventional current control approaches, such as PI-based control combined with SPWM or SVPWM techniques [33,35]. In typical grid-connected inverter applications, PI-based controllers can provide satisfactory steady-state performance; however, their dynamic response and robustness may degrade under parameter variations, nonlinearities, and external disturbances unless additional compensation mechanisms are implemented [33]. In contrast, recent studies have demonstrated that sliding-mode-based controllers can significantly improve harmonic performance and robustness in grid-connected inverters [34,35]. The experimental results presented in this study further confirm that all three sliding-mode control strategies maintain stable current tracking and low THD under identical operating conditions. In particular, FTSMC achieves the lowest THD and the fastest transient response, while STSMC significantly reduces high-frequency oscillations and improves waveform smoothness. Moreover, all methods exhibit robust performance under grid voltage variations and DC-link disturbances, ensuring continuous and stable operation. Therefore, compared to conventional control approaches, the proposed SMC-based strategies provide enhanced robustness, improved dynamic response, and superior harmonic performance, making them strong candidates for high-performance grid-connected multilevel inverter applications. The reduction in high-frequency ripple is also evident from the smoother current waveform and the lower harmonic content observed in both time-domain and THD-based analyses. Additionally, all experimental results were obtained under operating conditions where the LCL filter inductors remained within their rated limits, and no performance degradation associated with magnetic saturation was observed.

5. Conclusions

In this paper, the performance of traditional sliding mode control (SMC), fast terminal sliding mode control (FTSMC), and super-twisting sliding mode control (STSMC) methods for controlling the output current of the grid-connected 5L-ANPC-FC was compared. The experimental results show that these three methods are capable of controlling the grid current under different operating conditions. It is observed in the experimental results that high-frequency ripples are visible on the grid current with the traditional SMC method. On the other hand, the FTSMC method offers slightly lower THD (1.95%) than that of traditional SMC and STSMC. Also, FTSMC exhibited slightly faster dynamic response, whereas traditional SMC and STSMC offered similar performance under step change in grid current, sag and swell in grid voltage, and step change in the input voltage. In addition, DC-side voltage balancing is achieved naturally, without an extra term in the controllers, simplifying controller design. It is investigated by a step change in the input voltage and observed that the capacitor voltages are balanced before and after the step change.

Although the primary focus of this study is the comparative dynamic and steady-state performance of different sliding-mode control strategies, the control method can also influence switching losses and overall inverter efficiency. In conventional SMC, the discontinuous nature of the control law introduces high-frequency chattering around the sliding surface. This behavior may increase switching activity and lead to additional switching losses in the semiconductor devices. The STSMC strategy generates a smoother control signal due to its second-order sliding-mode structure. As a result, high-frequency oscillations in the modulation signal are reduced, which is expected to decrease unnecessary switching transitions and associated switching losses. Therefore, STSMC can provide improved efficiency, particularly under steady-state operating conditions. On the other hand, FTSMC introduces nonlinear terminal terms that significantly improve transient convergence speed. While this feature enhances dynamic performance, it may temporarily increase switching effort during fast reference or disturbance changes. However, once steady-state operation is reached, the switching behavior becomes comparable to that of STSMC. Overall, it can be inferred that the smoother control characteristics of higher-order sliding-mode techniques may offer a favorable trade-off between dynamic performance and switching loss reduction. A detailed experimental efficiency analysis considering semiconductor loss models and thermal measurements is identified as an important direction for future work.

At the applied switching frequency of 50 kHz, the control strategy may influence switching losses through its effect on switching activity and high-frequency ripple. The traditional SMC exhibits pronounced chattering, which may result in increased switching losses. The STSMC produces a smoother control signal due to its second-order sliding-mode structure, which is expected to reduce unnecessary switching transitions and associated losses. The FTSMC achieves faster transient convergence through nonlinear terminal terms, which may increase switching activity during dynamic conditions; however, its steady-state switching behavior remains comparable to that of STSMC. While voltage magnitude variations were experimentally validated, frequency deviations, full grid-code compliance testing, a quantitative efficiency analysis and three-phase configuration are beyond the scope of this study and are left for future work.

From a practical application perspective, each control strategy offers distinct advantages depending on system requirements. FTSMC is particularly suitable for high-performance grid-connected power converters and power-quality-sensitive applications where fast dynamic response and low harmonic distortion are critical. STSMC is more appropriate for applications requiring reduced chattering, smoother waveform characteristics, and potentially lower switching stress, such as renewable energy systems and long-term operation scenarios. In contrast, conventional SMC provides a simple and cost-effective solution for applications where implementation simplicity and robustness are prioritized over high dynamic performance. Therefore, the selection of the control strategy should be guided by the specific performance requirements of the intended application.