An Advanced Control Strategy for a Grid-Connected Reduced Number of Switches T-Type Inverter-Based Photovoltaic System

Abstract

Grid-connected photovoltaic (PV) systems can serve not only as sources of active power but also as active power conditioners for improving power quality. This paper proposes an integrated control strategy for a single-phase grid-connected reduced-switch-count T-type inverter that simultaneously performs maximum power point tracking (MPPT) without a DC-DC conversion stage, compensates for nonlinear load harmonics, and minimises switching losses through a tailored multi-carrier pulse-width modulation (PWM) algorithm. A novel reference current derivation method based on a single-phase dq transformation framework unifies MPPT and active power filtering within a single control loop. The proposed system was validated through MATLAB/Simulink 2025b simulations for a 3500 W PV array supplying a nonlinear RL load with a full-bridge diode rectifier exhibiting a load current total harmonic distortion (THD) of approximately 46%. Simulation results demonstrate an MPPT efficiency of 99.8% at full irradiance (1000 W/m²), an overall system efficiency above 97%, and a grid current THD below 4% across the full irradiance operating range (0–1000 W/m²). Dynamic performance under step irradiance changes was also evaluated: the DC bus voltage deviation remains within 5 V for P&O step sizes between 0.00005 V and 0.0002 V, and the grid current THD recovers to below 5% within 2–6 grid cycles following each irradiance transition.

1. Introduction

The growing demand for clean energy has accelerated the development of renewable energy distribution systems worldwide. Among available technologies, photovoltaic (PV) systems have emerged as particularly promising due to their zero fuel cost, low maintenance requirements, silent operation, and the absence of corrosion from moving parts [1]. Distributed solar PV generation continues to expand rapidly across the globe [2]. Unlike conventional synchronous generators, however, PV systems possess no rotating masses and therefore cannot inherently contribute inertia to support grid frequency. Both grid-connected and standalone solar power plants are consequently subject to stringent reliability and responsiveness requirements [3,4,5,6].

A conventional PV system typically comprises two power conversion stages. The first stage employs a DC-DC converter to track the maximum power point (MPP) and step up the array voltage to a level suitable for grid connection. The second stage performs DC-to-AC conversion, maintaining grid synchronisation and optimising energy efficiency [7,8,9,10]. The inverter is the central component of the DC-AC stage, and multilevel inverter (MLI) topologies have attracted considerable research interest due to their ability to produce higher output voltage quality with reduced harmonic content [11,12,13,14].

Several studies have addressed the integration of MPPT with power quality improvement in grid-connected PV systems. Handoko et al. [15] proposed a single-phase on-grid PV inverter capable of simultaneous power injection and active power filtering; however, their system relies on a dedicated DC-DC boost converter for MPPT, introducing additional losses and increasing system cost and complexity. Yusof et al. [16] presented an improved control scheme based on modified PQ theory with a double-band hysteresis current controller (DBHCC) for a single-stage full-bridge inverter, achieving a grid current THD below 2% and a power conversion efficiency exceeding 97% under nonlinear load conditions. Although this work eliminates the DC-DC stage, it employs a conventional two-level full-bridge topology subject to higher switching losses and greater semiconductor voltage stress compared with multilevel alternatives.

Regarding inverter topology, the T-type MLI has attracted significant research interest owing to its compact structure, reduced component count relative to classical neutral-point-clamped (NPC) designs, and its compatibility with lower-voltage-rated switching devices [17]. Bhanuchandar and Murthy [18] demonstrated a reduced-switch-count single-phase five-level T-type grid-connected inverter with an LCL filter and validated its harmonic performance under multiple PWM schemes; however, their work addresses neither MPPT integration nor nonlinear load compensation. A comprehensive review by Sharma et al. [17] confirms that the simultaneous realisation of MPPT, active harmonic compensation, and reduced switching losses within a single-stage architecture remains an open research challenge.

The foregoing analysis reveals a clear research gap: existing works either achieve MPPT and power quality improvement at the cost of a DC-DC conversion stage, or they adopt reduced-switch multilevel topologies without integrating harmonic compensation and MPPT in a unified single-stage control framework. To address this gap, this paper proposes an integrated control strategy for a single-phase grid-connected reduced-switch T-type inverter that simultaneously performs MPPT without a DC-DC stage, compensates for nonlinear load harmonics, and minimises switching losses through a tailored multi-carrier PWM algorithm. The key contributions of the proposed system are as follows:

• A novel reference current derivation method that unifies MPPT and active power filtering within a single control loop, eliminating the need for a separate DC-DC conversion stage.
• A reduced-switch-count T-type inverter topology operating with only six switching states, reducing both hardware cost and conduction/switching losses.
• A customised APOD multi-carrier PWM strategy tailored to the proposed topology, ensuring DC-side capacitor voltage balance without additional snubber circuits while maintaining switching losses below 0.5 W per switch.
• Comprehensive MATLAB/Simulink simulation validation demonstrating a grid current THD below 4% across the full irradiance range (0–1000 W/m²), an MPPT efficiency exceeding 99%, an overall system efficiency above 97%, and dynamic performance results under step irradiance changes.

2. System Modeling

2.1. Maximum Power Point Tracking

P&O MPPT algorithms can be classified according to two criteria: the nature of the perturbation step and the tracking strategy employed. From the step-size perspective, P&O algorithms fall into fixed, variable, adaptive, and hybrid categories. From the strategy perspective, they are divided into conventional and modified categories, the latter encompassing power-curve segmentation, general objective function approaches, optimisation-integrated methods, and hybrid strategies [19].

In this work, the MPPT controller employs a fixed-step P&O algorithm whose primary function is to track the MPP and compute the DC bus voltage reference, V_MP, used in deriving the AC current reference as described in Section 2.2. The fixed-step approach is selected because the PV array terminal voltage varies relatively slowly under typical operating conditions.

The fixed voltage step size (ΔV) governs the trade-off between tracking speed and steady-state oscillation. To select an appropriate value, a sensitivity analysis was conducted under a multi-step irradiance profile (1000 → 750 → 500 W/m²) for five candidate values: ΔV = 0.00005, 0.0001, 0.00015, 0.0002, and 0.002 V. The results are summarised in

Table 1. P&O step-size sensitivity analysis.

ΔV (V)	DC Bus Voltage Deviation (V)	Tracking Behaviour
0.00005	~5	Slow response; minimal steady-state ripple
0.0001	~5	Balanced—selected for all simulations
0.00015	~5	Balanced; slightly faster transient response
0.0002	~5	Faster; acceptable steady-state ripple
0.002	~7	Fast but excessive DC bus oscillation

. For all values in the range 0.00005–0.0002 V, the DC bus voltage deviation remains approximately 5 V; increasing the step size to 0.002 V raises this to approximately 7 V, indicating deteriorated tracking precision. Accordingly, ΔV = 0.0001 V was selected for all subsequent simulations.

2.2. Reference Signal Calculation

To drive the power electronics switches so as to generate the required voltage and current waveforms, a precise reference signal must be calculated. This reference signal depends on the PV array operating condition, the load current, and the grid voltage. The d-axis component of the reference current is given by Equations (1) and (2) [20]:

Id,ref = Id^* − Id,Load

(1)

Id^* = Kp · (Vdc,mean − Vdc,ref)/Vdc + Ki ∫[(Vdc,mean − Vdc,ref)/Vdc] dt

(2)

where: Id,ref is the d-axis reference current; Id,Load is the d-axis load current; Id^* is the PV array DC current at the MPP; Vdc,mean is the mean DC bus voltage; Vdc,ref is the MPPT-computed MPP voltage; Kp and Ki are the PI controller proportional and integral gains; and Ts is the sampling period.

The PI gains for both regulators were determined by a frequency-domain loop-shaping procedure. For the DC bus voltage regulator, a target closed-loop bandwidth of approximately 20 Hz was selected to ensure that the DC bus voltage tracks the MPPT reference without amplifying switching-frequency ripple. The proportional gain Kp = 12 and integral gain Ki = 200 were obtained by placing the open-loop crossover frequency at 20 Hz with a phase margin of approximately 60°, verified through Bode analysis in MATLAB. For the current regulator, a higher bandwidth of approximately 1 kHz was targeted to achieve fast harmonic current tracking; the resulting gains Kp = 8 and Ki = 2 were confirmed to yield a phase margin exceeding 45° and a gain margin above 6 dB across the full operating range. Both sets of gains were validated under the simulation conditions described in Section 3, where stable operation and satisfactory transient response were observed for all irradiance levels tested.

To obtain the rotating reference frame for a single-phase current waveform, the dq transformation in Equation (3) is applied [21,22]:

[Id, Iq]^T = [cos(θ) sin(θ); −sin(θ) cos(θ)] · [Iα, Iβ]^T

(3)

In a single-phase system, only the α-axis component Iα is directly measurable, and is given by [23]:

Iα = Im cos(θ)

(4)

The orthogonal β-axis component Iβ is not physically available in a single-phase system and must be constructed artificially. Two equivalent methods are implemented and verified in MATLAB/Simulink 2025b. The first employs a discrete variable time delay of T/4 = 5 ms (at 50 Hz), introducing the required 90° phase shift. The second extracts the fundamental amplitude Im via a Fourier block and computes:

Iβ = Im sin(θ)

(5)

Both methods yield identical simulation results. The phase-locked loop (PLL) supplies the synchronisation angle θ used consistently throughout the dq transformation. Harmonic compensation is achieved through the load current decomposition described in Section 2.3, where Id,Load represents the fundamental active component of the load current extracted via the same transformation.

Substituting Equations (4) and (5) into Equation (3) gives:

Id = Im cos²(θ) + Im sin²(θ) = Im

(6)

Iq = −Im sin(θ)cos(θ) + Im sin(θ)cos(θ) = 0

(7)

Equations (6) and (7) confirm that, for a sinusoidal current synchronised with the PLL, Id equals the current amplitude Im and Iq equals zero. These results are used as grid current references in the control scheme.

The reference voltage d- and q-axis components are computed from Equations (8) and (9), respectively:

Vd = Kp(Id^* − Id) + Ki ∫(Id^* − Id)dt + Kd · Id^* − Kq · Iq^*

(8)

Vq = Kp(Iq^* − Iq) + Ki ∫(Iq^* − Iq)dt + Kd · Id^* + Kq · Iq^*

(9)

where Kd and Kq are the feed-forward gain factors for the d- and q-axis current components, respectively.

2.3. Inverter Switching Algorithm

The proposed system functional block diagram is shown in Figure 1. To achieve the required performance, the reference voltage signal is derived from Equations (1)–(9). The system continuously monitors the load current, grid voltage, grid current, DC bus voltage, PV array voltage, and PV array current. The algorithm computes the PV array MPP and determines the d-axis AC current component corresponding to the available MPP power. This component is compared with the load current d-axis component to obtain the grid current d-axis reference. This mechanism enables the inverter to share the real power between the PV array and the grid in proportion to the available PV output. Reactive and distortion power components are addressed by forcing the grid current q-axis component to zero, with the inverter and DC-side capacitors supplying the load reactive and distortion currents [24].

A key advantage of the proposed system is that MPPT is achieved without a DC-DC conversion stage, reducing system cost and power losses.

2.4. T-Type Inverter Modeling, Switching States, and Active Current Paths

The reduced-switch-count T-type inverter operates with only six switching states (a to f), so the switching sequence must be carefully selected. Figure 2 shows the active current paths for each state. An analysis of these paths reveals that the DC-side capacitors participate in the current path during all six switching states. In states b and e, charge redistribution between C1 and C2 occurs naturally through the circuit topology, maintaining voltage balance without requiring additional control action or snubber circuits. In the remaining states, the capacitor not in the active path retains its stored charge. The net effect over a complete switching cycle is balanced capacitor voltages, which ensures a symmetric AC output voltage [25,26,27,28].

From the switching states listed in

Table 2. Switching states, active switches, and output voltages.

Switching State	Active Switches	Output Voltage
a	Q2, Q4	0
b	Q4, Q5, Q6	Vdc/2
c	Q1, Q4	Vdc
d	Q1, Q3	0
e	Q3, Q5, Q6	−Vdc/2
f	Q3, Q2	−Vdc

, the maximum blocking voltage applied to switches Q1, Q2, Q3, and Q4 is Vdc/2, since each device blocks one capacitor voltage when off. As confirmed by KVL analysis of switching states b and e, switches Q5 and Q6 carry the same maximum blocking voltage of Vdc/2: in both states, Q5 and Q6 connect the capacitor midpoint (Vdc/2) to the output node, so each device must block exactly one capacitor voltage when off. However, since Q5 and Q6 are active only in the intermediate voltage level states (b and e), their total switching frequency and cumulative switching energy losses are lower than those of Q1–Q4, which contributes to the overall reduction in switching losses demonstrated in Section 3.

Table 2 lists the switching states with the corresponding active switches and output voltages.

The output voltage of the reduced-switch-count T-type inverter can be expressed as:

V = ((Q1 + 0.5Q6)Q4 − (Q2 + 0.5Q5)Q3)Vdc

(10)

The reduced switch count and the limited number of switching states together contribute to reductions in both hardware cost and power losses.

2.5. Multi-Carrier PWM Algorithm

Since the introduction of multilevel inverters, several PWM techniques have been proposed, including interleaved PWM, level-shifting PWM, phase disposition (PD) PWM, phase opposition and disposition (POD) PWM, and phase-shifting carrier PWM [29,30,31,32,33]. Multicarrier PWM extends the conventional sinusoidal PWM (SPWM) method and is divided into phase-shifted and level-shifted categories, as shown in Figure 3.

Table 3. Comparison of level-shifted PWM techniques.

Feature	APOD	POD	PD
Phase relationship	Adjacent carriers 180° phase-shifted	180° shift across zero reference	All carriers in phase
Harmonic performance	Best for higher-order harmonics	Good for specific harmonics	Sufficient for basic needs
Complexity	High	Medium	Low
Implementation	Complex control required	Relatively simple	Simple
Applications	High-performance inverters	General-purpose inverters	Basic multilevel inverters

compares the level-shifted PWM techniques with respect to carrier phase relationships, harmonic performance, implementation complexity, and typical applications [34,35,36].

In this work, the APOD PWM technique is selected for its superior harmonic performance. Figure 4 shows the APOD carrier and reference waveforms, and Figure 5 shows the resulting PWM switching signals.

3. Simulation Results

To ensure reproducibility, the key simulation parameters are summarised in

Table 4. Simulation system parameters.

Parameter	Value
PV Array (Trina Solar TSM-250PA05.08)
Maximum power per module (W)	249.86
Cells per module	60
Open-circuit voltage, VOC (V)	37.6
Short-circuit current, ISC (A)	8.55
Voltage at MPP, Vmp (V)	31
Current at MPP, Imp (A)	8.06
Series modules per string	14
Parallel strings	1
Total array power at MPP (W)	~3500
DC Bus Voltage Regulator (PI Controller)
Proportional gain, Kp	12
Integral gain, Ki	200
Current Regulator (PI Controller)
Proportional gain, Kp	8
Integral gain, Ki	2
L–L Filter
L1 — inverter to load (mH)	0.283
L2 — load to grid (mH)	20
Nonlinear Load (Full-Bridge Diode Rectifier + RL)
Load resistance, R (Ω)	30
Load inductance, L (mH)	1000
Diode on-resistance, Ron (Ω)	0.001
Diode forward voltage, Vf (V)	0.8
Diode snubber resistance, Rs (Ω)	500

. The PV array consists of 14 series-connected Trina Solar TSM-250PA05.08 modules rated at approximately 3500 W under standard test conditions (STCs). The DC bus voltage and current regulators are implemented as discrete-time PI controllers, and the grid interface uses a two-inductor (L–L) filter configuration.

The L–L filter inductances were selected based on harmonic attenuation requirements and switching-frequency current ripple constraints. The inverter-side inductor L1 = 0.283 mH was sized to limit the peak-to-peak switching-frequency current ripple to approximately 10% of the rated current amplitude, following the criterion in [20]. The grid-side inductor L2 = 20 mH was chosen to provide sufficient attenuation of the dominant switching-frequency harmonics at the point of common coupling (PCC). At the selected switching frequency, the combined L–L impedance achieves an attenuation ratio exceeding 40 dB for harmonics above the 20th order, ensuring compliance with the IEEE 519-2022 harmonic current limits [37]. The relatively large L2 value is consistent with the single-stage architecture, in which no DC-DC stage is present to pre-filter low-frequency current distortion; the grid-side inductor therefore carries the full burden of high-frequency attenuation.

The nonlinear load consists of a single-phase full-bridge diode rectifier feeding a series RL load (Figure 6), representative of practical power electronic loads such as rectifier-fed drives and switching power supplies. The large DC-side inductance (1000 mH) produces a quasi-trapezoidal AC current waveform with dominant odd harmonics (3rd, 5th, 7th) and a THD of approximately 46%, as confirmed by the FFT in Figure 7.

Before presenting the results,

Table 5. Comparison with related works in the literature.

Reference	Topology	DC-DC	MPPT	Harm. Comp.	Single Stage	THD	Efficiency
Handoko et al. [15]	Full-bridge (2L)	Required	P&O	Yes	No	N/R	N/R
Yusof et al. [16]	Full-bridge (2L)	Eliminated	VS-InCond	Yes	Yes	<2%	>97%
Bhanuchandar& Murthy [18]	T-type 5L (RSC)	Required	None	No	No	Low	N/R
Zorig et al. [1]	T-type 3L	Required	Yes	No	No	N/R	N/R
Amir et al. [38]	T-type H-bridge	Required	Yes	No	No	N/R	~90%
Proposed	T-type RSC (6-sw.)	Eliminated	P&O	Yes	Yes	<4%	>97%

Abbreviations N/R = not reported. 2L = 2-level; 3L = 3-level; 5L = 5-level; RSC = reduced switch count.

provides a comparative overview against related works, highlighting key differentiators in topology, DC-DC stage requirement, MPPT capability, harmonic compensation, and performance metrics.

The load exhibits a fundamental component of 0.3743 p.u. and a THD of 46.39%, as shown in Figure 7.

3.1. System Simulation with the PV Array Idle

When the PV array generates no real power, the system operates solely as an active power filter. Figure 8 shows the grid voltage and current waveforms, the load current, and the inverter current (all in per unit). The grid current is sinusoidal and flows from the grid to the load.

The FFT of the grid current is shown in Figure 9. The grid current THD is 0.77% (at 0.386 p.u.), reduced from the load current THD of 46.39%, demonstrating effective active filtering. The reference and actual dq current components are shown in Figure 10.

System efficiency for this case:

η = PLoad/Pgrid × 100 = 1316/1348 × 100 = 97%

(11)

3.2. System Simulation at Maximum PV Array Output

At maximum irradiance, the PV array produces 3498 W at a DC bus voltage of 434 V, as shown in Figure 11. The MPPT efficiency is:

ηMPP = Parray/PMPP × 100% = 3493/3498 × 100% = 99.8%

(12)

The overall system efficiency:

η = (Pgrid + PLoad)/PMPP × 100% = (2036 + 1414)/3498 × 100% = 98.6%

(13)

The grid current THD at the MPP is approximately 0.6%, as confirmed by Figure 12. The reference and actual dq current components are shown in Figure 13.

Table 6. Effect of irradiance on grid current THD.

Irradiance (W/m2)	Grid Current THD (%)
0	0.77
250	2.47
500	3.11
750	1.02
1000	0.58

summarises the grid current THD across the full irradiance range.

The system maintains a grid current THD below 4% across the entire irradiance range. The worst case occurs at 500 W/m², where the PV-generated real power approaches the load real power demand.

According to IEEE 519-2022, harmonic current limits at the point of common coupling (PCC) are specified in terms of Total Demand Distortion (TDD), defined as the RMS harmonic current expressed as a percentage of the maximum demand load current IL. For systems with a short-circuit ratio (SCR) greater than 20, the maximum allowable TDD is 5.0% [38]. Since the proposed system operates near the unity power factor with a predominantly active load, the reported THD values serve as conservative upper-bound estimates relative to the TDD limit. The worst-case value of 3.11% at 500 W/m² remains well within the 5.0% TDD limit under all simulated operating conditions.

The instantaneous switching loss curves for all six switches are shown in Figure 14. For all switches, the switching losses remain below 0.5 W, demonstrating the effectiveness of the proposed APOD strategy without snubber circuits.

3.3. Dynamic Performance Under Step Irradiance Changes

To evaluate the dynamic response of the proposed system, simulations were conducted under a multi-step irradiance profile: 1000 W/m² (0–0.5 s), 750 W/m² (0.5–1.0 s), and 500 W/m² (1.0 s onward). Figure 15, Figure 16, Figure 17, Figure 18 and Figure 19 show the irradiance, DC bus voltage, and output power for the five step-size values evaluated in Table 1.

The DC bus voltage deviation remains within approximately 5 V for step sizes of 0.00005–0.0002 V, confirming stable MPPT operation. At 0.002 V, the deviation increases to approximately 7 V, introducing excessive steady-state oscillation; this value was therefore excluded.

The effect of irradiance transients on the grid current THD is illustrated in Figure 20 and Figure 21. The THD temporarily exceeds 5% only at the instant of the irradiance change. The transient duration is approximately 2 grid cycles (0.04 s) for the 1000 → 750 W/m² step and approximately 6 grid cycles (0.12 s) for the 750 → 500 W/m² step, after which the THD returns to below 5% in all cases. The worst-case dynamic scenario occurs when the inverter current approaches the load current magnitude; even in this condition, recovery occurs within 6 grid cycles. These results confirm that the proposed system maintains IEEE 519-compliant power quality under dynamic conditions, with only brief and bounded transient excursions.

4. Discussion

The simulation results demonstrate that the proposed integrated control strategy achieves a favourable trade-off among MPPT performance, power quality improvement, and hardware simplicity. The unified reference current derivation method combines the MPPT voltage reference with load current dq decomposition within a single control loop, eliminating the dedicated DC-DC conversion stage while maintaining an MPPT efficiency of 99.8% and a grid current THD below 4% across the full irradiance range.

Compared with the full-bridge two-level topology of Yusof et al. [16], the proposed T-type reduced-switch topology reduces the active switching device count from eight to six. The intermediate output voltage levels (±Vdc/2) generated by Q5 and Q6 reduce the dv/dt stress on the filter inductors and contribute to lower switching losses without snubber circuits. The overall efficiency of 98.6% at full irradiance is comparable to the >97% reported in [16], while providing multilevel output voltage quality.

Limitations: Several limitations of the present work should be acknowledged. First, the validation is entirely simulation-based; experimental hardware validation under realistic conditions—including device non-idealities, dead time, gate-drive delays, capacitor ESR, and measurement noise—remains as future work. Second, the ideal grid voltage source assumption means that variations in grid impedance, which would shift the L–L filter resonance frequency and may degrade harmonic compensation for higher-order harmonics, are not considered. Third, the fixed-step P&O algorithm is susceptible to steady-state oscillation and potential misjudgement under rapid irradiance changes; adaptive-step methods could mitigate these effects. Fourth, extension to three-phase configurations introduces additional challenges, including neutral-point voltage balancing, sequence-component decomposition, and inter-phase coupling in the control loops, which will be addressed in future work.

5. Conclusions

This paper has presented an advanced integrated control strategy for a single-phase grid-connected reduced-switch-count T-type inverter-based PV system. The strategy simultaneously realises MPPT, active harmonic compensation, and reduced switching losses within a single-stage architecture, without a dedicated DC-DC conversion stage. The main findings from MATLAB/Simulink simulations for a 3500 W PV array under nonlinear load conditions (load current THD ≈ 46%) are as follows:

• The unified reference current method achieves an MPPT efficiency of 99.8% at 1000 W/m² and an overall system efficiency above 97% across all operating conditions.
• The reduced-switch T-type topology, operating with six switching states, achieves switching losses below 0.5 W per switch without snubber circuitry, demonstrating the effectiveness of the APOD PWM strategy.
• The grid current THD remains below 4% across the full irradiance range (0–1000 W/m²), with a worst-case value of 3.11% at 500 W/m².
• Compared with the T-type cascaded H-bridge inverter of Amir et al. [38], which uses twice the number of switches and achieves approximately 90% efficiency, the proposed system reduces the estimated energy cost from $0.0608/kWh to $0.0565/kWh.
• Dynamic simulations confirm IEEE 519-compliant THD recovery within 2–6 grid cycles under step irradiance changes, with DC bus voltage deviations not exceeding 5 V for the selected step size of ΔV = 0.0001 V.

Future work will focus on experimental hardware validation and extension of the proposed control strategy to three-phase grid-connected configurations.