Low Saturation Voltage and High Stability in Dual-Mode Schottky Barrier TFTs Using Bilayer IGZO

Abstract

Schottky barrier thin-film transistors (SBTFTs) are promising for low-power electronics due to advantages such as low saturation voltage and high stability. In this study, we developed a high-performance bilayer IGZO SBTFT by combining a 4.7 nm atomic layer deposition (ALD) IGZO layer with an 11.8 nm sputtering IGZO layer, using platinum (Pt) and molybdenum (Mo) electrodes. The device exhibits dual-mode operation. In Schottky barrier TFT (SB-TFT) mode (Pt as source), the bilayer structure reduces defect density, achieving a very low saturation voltage (~0.4 V), high field-effect mobility (up to 20 cm²/V·s), and enhanced stability under stress conditions, including positive/negative bias and negative illumination. In quasi-Ohmic TFT (QO-TFT) mode (Pt as drain), the device retains conventional saturation behavior in output characteristics while delivering similar mobility and robust stability. This work provides a novel bilayer SBTFT design with dual functionality, enabling a higher current drive, improved stability, and flexibility for energy-efficient applications.

1. Introduction

Schottky barrier thin-film transistors (SBTFTs) have emerged as a promising candidate for next-generation low-power electronics due to their unique advantages, including ultralow saturation voltage, flat saturation current, immunity to short-channel effects, and intrinsic operational stability [1,2,3,4]. These attributes enable SBTFTs to operate at significantly reduced power consumption while maintaining high current-driving capability, making them ideal for energy-sensitive applications such as wearable electronics [5,6] and active-matrix organic light-emitting diode (AMOLED) displays [7,8]. However, conventional IGZO-based TFTs often suffer from instability under light illumination and bias stress, limiting their practical adoption [9,10]. Recent studies on IGZO Schottky-gated transistors (SGTs) have demonstrated improved stability and high intrinsic gain by leveraging Schottky barrier engineering. For instance, Zhang et al. reported IGZO SGTs with exceptional bias stability [11], while Li et al. achieved hybrid Ohmic/Schottky contacts using Cu electrodes and AlO_x interlayers [12]. Despite these advances, critical challenges remain unresolved, particularly the trade-off between ultrathin IGZO film thickness and defect-related performance degradation in Schottky devices.

IGZO film fabrication methods—such as solution processing, magnetron sputtering, and atomic layer deposition (ALD)—each present distinct trade-off [13,14,15]. Sputtering IGZO films, while cost-effective, exhibit thickness-dependent defect densities, with thinner films (<10 nm) prone to oxygen vacancies and interfacial traps, leading to hysteresis and reduced saturation current [16]. ALD-grown IGZO, on the other hand, offers superior uniformity and lower defect density but has rarely been explored for Schottky barrier devices. Furthermore, the role of high-work-function electrodes (e.g., Pt) in modulating Schottky/Ohmic transitions and stability remains underexplored. Addressing these limitations requires innovative strategies to harmonize film quality, electrode design, and operational modes.

In this work, we propose a dual-mode Schottky barrier TFT architecture using a bilayer IGZO structure (ALD and sputtered IGZO) combined with platinum (Pt) and molybdenum (Mo) electrodes. By configuring the Pt electrode as either the source (SB-TFT mode) or drain (QO-TFT mode), we demonstrate a tunable transition between Schottky-dominated and Ohmic-dominated operation. The ALD layer mitigates defects in ultrathin sputtered IGZO, achieving a mobility up to 20 cm²/Vs, a low saturation voltage (V_DSAT ~ 0.4 V), and enhanced stability under bias and illumination stress. This dual-mode design not only resolves the thickness-defect trade-off but also provides a pathway to multifunctional TFTs for energy-efficient circuits.

2. Materials and Methods

As the substrates, heavily doped p-type Silicon with thermally grown 100 nm SiO₂ were sequentially cleaned in acetone and anhydrous ethanol. The IGZO films were deposited using ALD (MNT-D) for 16 cycles on substrates at 250 °C, employing trimethylindium, trimethyl gallium, and diethylzinc as the indium, gallium, and zinc sources (In: Ga: Zn = 10:4:5 at.%). IGZO films were patterned by photolithography (RZJ-390PG-30 photoresists) and wet acid etching in hydrochloric acid for 30 s. Subsequently, Pt electrode was sputtered, followed by a lift-off process. After annealing in air at 350 °C for 2 h, Mo electrode was sputtered to complete the fabrication of the ALD IGZO-based devices. In this work, the fabricated devices have two different channel width-to-length ratios: one is 2000 μm/450 μm, and the other one is 1000 μm/50 to 350 μm. The sputtering IGZO films (In: Ga: Zn = 1:1:1 at.%) were deposited (SYSKEY Technology) for different cycles on the substrates. During the sputtering process, the power is 700 W, and the oxygen argon ratio is 1.5:48.5. Except for annealing in air at 350 °C for 1 h, other processes of sputtering IGZO-based devices are consistent with above. For bilayer IGZO devices, sputtering IGZO films were deposited after patterning the ALD IGZO films and annealing in air at 350 °C for 1 h. The subsequent processes remained identical to the sputtering IGZO-based devices.

The electrical characteristics and stability of the devices were measured at RT using a semiconductor parameter analyzer (B1500A, Agilent Technologies, Santa Clara, CA, USA). The surface roughness of the films was measured using an Atomic Force Microscope (AFM, Bruker Dimension Icon, Cambridge, MA, USA). The oxygen vacancy content and band edge parameters of the IGZO films were analyzed by X-ray Photoelectron Spectroscopy (XPS) and Ultraviolet Photoelectron Spectroscopy (UPS). The transmission spectra of the films deposited on quartz substrates were characterized using a UV spectrophotometer. Capacitance–voltage (CV) curves were examined using the Agilent E4980A.

3. Results

Figure 1a–c illustrates the band diagrams of SB-TFT mode devices. Different work functions between the Pt metal and the IGZO film induce electron flow from the semiconductor to the metal when they contact, forming a high-resistance depletion region. When the Pt electrode serves as the source, electrons need to overcome the Schottky barrier to inject into the semiconductor. The primary mechanisms for electron transport across the Schottky barrier into the semiconductor layer are thermionic emission (TE) and thermionic field emission (TFE). In the linear region, the Schottky barrier is modulated by both drain voltage (V_D) and gate voltage (V_G). As V_D increases, the depletion region gradually shifts toward the interface between the semiconductor and the dielectric layer. In the saturation region, V_G modulates the barrier height by adjusting the built-in electric field within the depletion region and controls the saturation current [17,18,19]. The band diagrams of QO-TFT mode devices are shown in Figure 1d–f, and V_D will lower the Schottky barrier when the Pt electrode serves as the drain. It is worth noting that all band diagrams have been simulated by TCAD atlas at accurate voltage bias to compare the effect of V_D and V_G on the Schottky barrier.

Figure 2 shows the surface topography images and the thickness of the fabricated IGZO films. The scan area of each film is 5 μm × 5 μm. The RMS of different IGZO films indicates the smooth surface. The higher RMS of the bilayer film is caused by the ALD IGZO layer, which exhibits higher roughness in comparison to the P-Si/SiO₂ substrates. As shown in Figure 2d–f, the thickness of the sputtering IGZO layer, ALD IGZO layer, and bilayer IGZO are 11.8 nm, 4.7 nm, and 18.8 nm. The C-V curves of different IGZO films with Mo electrode are shown in Figure 3a, and the bilayer film forms the two-dimensional electron gas (2DEG) near V_G = 0 V. From the C-V curves in Figure 3b,c, the Schottky contact between Pt electrode and IGZO layer is stable after annealing for 60 min. When the Pt electrode is unannealed, it forms an ohmic contact. As the annealing time increases, a noticeable positive shift is observed. A similar trend was observed in the bilayer, where the 2DEG disappeared, and the curve shows a positive shift as the Pt annealing time increases. This can be explained by the depletion region with low carrier concentration. As the annealing time increases, the barrier height increases until Schottky contact remains stable [20,21]. The XPS measurements are shown in Figure 3d–f. The O1s XPS spectra are deconvoluted into three Gaussian peaks centered at 530.0 ± 0.4 eV, 531.5 ± 0.3 eV, and 532.3 ± 0.4 eV, corresponding to metal–oxygen bonds (M-O), oxygen vacancies (V_o), and specific chemisorbed oxygen impurity bonds (M-OH), respectively. Compared to the single-layer IGZO films, the M-O bonds and M-OH bonds concentration of the bilayer films increase to 65.3% and decrease to 16.85%, respectively. The area of V_o decreases to 17.15%, which is significantly lower than that in the single-layer films. Compared to the sputtering IGZO film, the bilayer film exhibits lower oxygen vacancy, which may be attributed to the discontinuity of the conduction band (formation of 2DEG) and less trapped electrons in the dielectric [22]. The valence band maximum (E_VBM) of sputtering IGZO and ALD IGZO films were extracted in Figure 3g, which were 2.23 eV and 2.43 eV. And the obtained E_g of sputtering IGZO and ALD IGZO were 3.63 eV and 3.53 eV, as shown in Figure 3h.

Figure 4 compares the transfer and output characteristic curve of SB-TFT mode devices fabricated with sputtering IGZO, ALD IGZO, and bilayer IGZO, and the channel width-to-length ratio is 2000 μm/450 μm. The transfer curve exhibited a noticeable hysteresis when the sputtering IGZO film was thin, which indicates high defect density in the film and electron trapping when applying V_G [23,24]. Compared to conventional TFT with Ohmic contact, the fabricated SBTFTs exhibit degraded subthreshold swing (SS), nearly 2 V/dec in this work, which has been observed in other Schottky barrier devices [11,12,25]. The output curve revealed a lower saturation voltage and a reduced output current. Due to a large number of defects at the channel/dielectric interface and the intrinsic defects in the material, conduction electrons have been trapped by the defects and gradually reduced when applying V_D and V_G, which corresponds to the large hysteresis and the forward shift in the transfer curves. The increased roughness and concentration of oxygen vacancy in the sputtering IGZO film, as shown in Figure 2a and Figure 3d, also prove that higher density of defects in the film. A similar phenomenon has been observed in the previous results of Schottky barrier transistors [12,26,27,28]. Although the thin sputtering IGZO films can form the Schottky contact with low V_DSAT, the thin films with a large number of defects degraded the device performance. In contrast, the ALD IGZO films have better quality, showing a smaller hysteresis and larger current. However, the Schottky contact in the output curve was not obvious. As shown in Figure 4d, the saturation voltage increased slowly with increasing V_G. Although ALD films generally exhibit better performance, they are more sensitive to changes at the surface. The Pt electrode was deposited onto the surface of the ALD films via sputtering, and the bombardment caused surface damage easily, leading to the formation of non-uniform Schottky contact. The non-uniform barrier results in part of the conduction current passing through low-barrier regions [11]. To address the above issues of the single-layer IGZO films, we fabricated the SBTFTs with bilayer IGZO films. The bilayer device exhibited nearly negligible hysteresis and a large current in Figure 4e. The calculated linear mobility was between that of the two single-layer films, approximately 20 cm²/V·s. More importantly, the bilayer device demonstrated superior Schottky contact and a flat output current, with a V_DSAT of 0.4 V and an output current of about 10 µA at V_G = 20 V, which indicates lower output power consumption and higher output resistance. Many studies have explained the improved performance of bilayer structures [29,30,31,32]. The front-channel ALD IGZO film provides a high carrier concentration, which not only provides a larger conduction current but also compensates for the defects of the back-channel layer. Compared to ALD IGZO, the sputtering IGZO film forms a more stable Schottky contact with Pt metal after annealing, thereby serving as the back-channel layer. To facilitate a more intuitive comparative analysis, critical parameters of sputtering IGZO, ALD IGZO, and bilayer IGZO devices are systematically listed in

Table 1. Performance comparison of sputtering IGZO, ALD IGZO, and bilayer IGZO devices.

Channel	μ (cm2/Vs)	IDSAT (μA)	VDSAT (V)	dVDSAT/dVG	Reference
Sputtering IGZO	10	13 @VG = 50 V	0.65 @VG = 50 V	~0.04	This work
ALD IGZO	45	60 @VG = 20 V	7.5 @VG = 20 V	~0.6	This work
Bilayer IGZO	20	11 @VG = 20 V	0.4 @VG = 20 V	~0.036	This work
Sputtering IGZO	-	34 @VG = 40 V	<3 @VG = 40 V	~0.1	[11]
Sputtering IGZO	-	0.7 @VG = −8.4 V	3 @VG = −8.4 V	0.12	[35]
Sputtering IGZO	-	2.7 @VG = 10 V	3 @VG = 10 V	~0.4	[36]
Sputtering IGZO	4.5	11 @VG = 20 V	2.7 @VG = 20 V	0.12	[37]
ALD IGZO	2.8	5.4 @VG = 10 V	-	-	[38]
ALD IGZO	-	23 @VG = 1 V	0.6 @VG = 1 V	-	[39]

. As shown in Table 1, the ratio of V_DSAT to V_G (R = dV_DSAT/dV_G) is 0.04, 0.6, and 0.036 for devices based on sputtering IGZO, ALD IGZO, and bilayer IGZO. The R value is less than 1 when forming a Schottky contact [33]. A smaller R implies a less effect of the gate voltage on the saturation voltage and a more significant manifestation of the Schottky barrier effect. Meanwhile, the saturation voltage V_DSAT ≈ (V_G − V_TH) × C_ox/(C_ox + C_s) for SBTFTs, where C_ox and C_s are insulator and semiconductor capacitances per unit area [28,34]. For SBTFTs, low saturation voltage means that the value of C_ox/(C_ox + C_s) should be much less than 1. Utilizing the measured capacitance data, the C_ox/(C_ox + C_s) value of sputtering, ALD, and bilayer IGZO devices are 0.24, 0.5, and 0.22. The larger calculated C_ox/(C_ox + C_s) and R of ALD IGZO-based device is considered due to the non-uniform Schottky barrier. Through a comparative analysis of sputtering and ALD IGZO-based devices in the literature, the bilayer IGZO devices fabricated in this article demonstrate superior performance characterized by higher mobility, lower saturation voltage, and enhanced Schottky contact, as evidenced by a smaller R value.

Utilizing the bilayer IGZO devices, we investigated the performance of the dual-mode devices with a channel width of 1000 µm and lengths ranging from 50 to 350 µm. The conduction current of SGT devices is primarily determined by source contact and barrier height rather than the channel because the semiconductor layer under the source would be fully depleted when applying enough V_D. Therefore, SGT devices are immune to the change in channel length [11,12,40]. Figure 5a,b show the transfer and output curve of SB-TFT mode devices with different channel lengths. The current exhibited minimal change to the channel length in Figure 5a. The current only increased from 6.68 µA to 9.19 µA as the channel length decreased from 350 µm to 50 µm, and the change in current was significantly smaller than the scale of the channel length. This behavior is attributed to the reverse current of the Schottky barrier, which primarily dominates the conduction current. As shown in Figure 5c,d, although the threshold voltage showed a negative shift due to the lowering of the barrier, the current of the QO-TFT mode device increased from 7.57 µA to 13 µA as the channel length decreased. The V_D applied at the barrier acts as a forward bias for the Schottky diode, reducing the barrier and increasing the device’s sensitivity to channel length. In Figure 5d, the device current significantly increases as V_D and V_G increase. As evidenced by the output curve, the QO-TFT mode device shows the absence of a low V_DSAT. In addition, the phenomenon of current blocking was observed at smaller V_D and V_G, which attenuates as the voltage increases in the inset of Figure 5d. Figure 5e,f extract the current for various channel lengths at V_D = 0.1 V, V_G = 20 V, and V_D = 20 V, V_G = 20 V. Notably, the QO-TFT mode devices demonstrate larger output currents and exhibit greater sensitivity to channel length.

Figure 6 illustrates the bias stability test results for SB-TFT mode, QO-TFT mode, and Mo-SD devices. During Negative Bias Stress (NBS) and Positive Bias Stress (PBS), the V_G was applied at −20 V and 20 V, respectively. As shown in Figure 6a,b, the threshold voltage shift (ΔV) of the SB-TFT mode under NBS and PBS were −0.72 V and 0.48 V, respectively. In comparison, the ΔV for QO-TFT mode devices were −0.72 V and 0.65 V. The PBS instability can be caused by the electron trapping at the dielectric–channel interface and ambient effect at the back-channel surface. The NBS instability, which is associated with donor states that become positively charged by releasing electrons into the conduction band, remained relatively unchanged during the test. Electrons can be excited and ionized charge-neutral oxygen vacancies (V_o) into positively charged centers (V_o²⁺) under illumination, thereby injecting free electrons into the conduction band and contributing to a more significantly negative voltage shift [41]. The ΔV were −1.68 V and −1.44 V under NBIS at the bias time t = 3600 s for the SB-TFT mode and QO-TFT mode devices, respectively. Especially, the ΔV was −2.4 V and −2.52 V for the SB-TFT mode and QO-TFT mode devices, respectively, when t = 10,000 s, showing good stability. Figure 6g–i also provide the test results of the Mo-SD device.

Table 2. Comparison of ΔV under NBS, PBS, and NBIS tests.

	Mo-SD	SB-TFT Mode	QO-TFT Mode
VD(V)	0.1	0.1	0.1
ΔVNBS (V)	−1.15	−0.72	−0.72
ΔVPBS (V)	1.4	0.65	0.48
ΔVNBIS (V)	−7.9	−1.44	−1.68

summarizes the ΔV of three devices under stability tests. The observed difference in stability is primarily attributed to the formation of the depletion region [6]. On one hand, the total resistance R_tot = R_c + R_ch, where R_ch is the channel resistance and R_c is the contact resistance. The low carrier concentration in the depletion region results in the contact resistance being much higher than the channel resistance. Consequently, even though the carrier concentration may vary during the test, which causes a smaller R_c, the total resistance exhibits little change. For the QO-TFT mode structure, as the drain voltage increases, the contact resistance gradually decreases, which causes the change in stability. On the other hand, the electron quasi-Fermi level in the depleted source may be pinned and prevent the accumulation of electrons [42].

4. Conclusions

In this paper, we propose and design high-performance Schottky devices through the bilayer structure. The bilayer devices not only form a good Schottky contact but also exploit the advantages of the front-channel ALD IGZO film, which can repair the defects of the back-channel film and significantly enhance the conduction current of the device. Meanwhile, devices with higher Schottky barriers are less sensitive to channel length. In the comparison of the stability of SB-TFT mode, QO-TFT mode, and Mo-SD devices, we observe the effect of the Schottky barrier response to the various applied V_D. Devices with Schottky barriers exhibit better stability than Mo-SD devices. This work offers a strategy to fabricate thinner SBTFTs with excellent performance and deep insights into the behavior of SBTFTs.