A Comprehensive Study on GaN Power Devices: Reliability, Performance, and Application Perspectives

Abstract

This review examines recent advances in Gallium Nitride (GaN) power semiconductor devices and their growing impact on the development of high-efficiency power conversion systems. It explores innovations in device design, packaging methods, and gate-driving strategies that have improved both performance and reliability. Key metrics such as switching speed, conduction losses, thermal management, and device robustness are analyzed, supported by reliability assessment techniques including Double-Pulse Testing (DPT). The discussion extends to current market dynamics and strategic industry initiatives that have catalyzed widespread GaN adoption. These combined insights highlight GaN’s role as a transformative material offering compact, efficient, and durable power solutions while identifying challenges that remain for broader implementation across diverse industries.

1. Introduction

In the rapidly evolving landscape of power electronics, the demands for compactness and exceptional energy efficiency have become more vital than ever, serving as critical criteria for contemporary electronic systems [1,2]. Power electronics, the discipline tasked with the control and conversion of electrical energy plays an indispensable role in advancing these objectives across diverse applications such as mobile device chargers, data center power infrastructures, electric vehicles, renewable energy setups, and industrial automation [3]. At the heart of these power conversion systems lie fundamental semiconductor switching devices including transistors, diodes, thyristors, IGBTs, and BJTs [4]. Silicon (Si) has dominated this space for decades due to its well-established fabrication processes, cost-efficiency, and reliable performance over a broad voltage spectrum [5,6]. However, as technological progress pushes for higher efficiency, faster switching capabilities, and miniaturized system footprints, Si’s inherent physical limitations have become increasingly constraining [7]. Its relatively high conduction and switching losses, intricate thermal management needs, and the challenges in downsizing passive components restrict the development of state-of-the-art power systems optimized for high-frequency and high-power operations. To overcome these intrinsic drawbacks, the power electronics industry is turning decisively toward wide bandgap (WBG) semiconductor materials chiefly Gallium Nitride (GaN) and Silicon Carbide (SiC). Particularly, GaN stands out as a transformative technology offering remarkable enhancements both in research innovation and industrial deployment [8]. Possessing bandgap energy of about 3.4 eV, which is nearly three times that of Si, GaN devices deliver superior breakdown voltages, enhanced thermal robustness, and outstanding switching characteristics [9]. Their high electron mobility and strong electric field tolerance enable fast switching and high-power handling, thereby reducing energy loss and achieving compact converter integration [10]. Figure 1. shows the popular device structures based on GaN, SiC and Si. GaN High Electron Mobility Transistors (HEMTs) are transforming power converter design by facilitating smaller passive components, improving conversion efficiency, and allowing operation at significantly higher switching frequencies [11,12]. These developments are driving wider adoption of GaN-based technologies across consumer electronics, electric vehicles, and renewable energy sectors. Consequently, GaN technology is becoming a key part of next-generation power supplies, meeting high performance demands beyond the limits of Si devices [13].

Next-generation power electronics demand advanced materials and device technologies that achieve higher efficiency, effective thermal control, and reduced form factors [14,15]. GaN achieves these goals through fast switching and low power losses, supported by its high electron mobility (~2000 cm²/V·s) and elevated electron saturation velocity [15]. These properties make GaN well-suited for medium-voltage, high-frequency applications, including DC-DC converters, power factor correction (PFC) circuits, and compact power supplies for data centers and communication systems [10,16]. Devices in the 600–700 V range notably reduce switching and conduction losses, allowing higher power density and smaller passive components [17,18,19], supporting miniaturization without compromising performance.

Table 1. Key Material Properties of Si, 4H-SiC, and GaN for Power Electronics.

Property	Si	4H-SiC	GaN	References
Bandgap Energy(eV)	1.12	3.3	3.45	[20]
Critical Electric Field (MV/cm)	0.3	2.8	3.3	[21]
Electron Mobility (cm2/V·s)	1400	900	2000	[22]
Electron Saturation Velocity (Mcm/s)	10	22	27–30	[23]
Thermal Conductivity (W/cm·K)	1.5	4.9	1.3	[24]
Relative permittivity, εr	11.8	9.7	9.6	[20]

highlights the fundamental properties comparison between various materials.

While GaN offers the highest critical electric field strength at 3.3 MV/cm, allowing thinner device layers and reduced conduction losses, its thermal conductivity (1.3 W/cm·K) remains a challenge relative to SiC’s superior 4.9 W/cm·K. This disparity necessitates advanced thermal management techniques in high-power applications [25]. SiC, with its high thermal conductivity and suitable bandgap, continues to be the preferred choice for high-voltage, high-power applications, including EV inverters, solar systems, and industrial motor drives [26,27]. To maintain reliable operation during fast switching, the Double-Pulse Test (DPT) is widely used to measure key dynamic features such as voltage overshoot, switching transients, gate drive response, and energy losses [28,29]. Insights gained from DPT are important for improving gate drive design and reducing parasitic effects, which help increase the efficiency and reliability of GaN-based power converters [30,31]. By 2025, GaN technology has matured with improvements in monolithic integration, EMI reduction, and durable packaging. These advances make GaN suitable for high-frequency, medium-voltage power electronics, as shown in Figure 2. At the same time, SiC technology is advancing through trench MOSFET designs and the use of large 8-inch wafers, reducing costs and increasing its commercial potential [32,33,34]. Both GaN and SiC rely on careful DPT to fine-tune designs and ensure reliable operation. Together, GaN and SiC are advancing energy-efficient technologies crucial for electric vehicles, modern power grids, renewable energy, and data center power systems [35]. In these demanding fields, improving power density, developing better thermal management, and achieving faster switching speeds are essential to address global energy and environmental challenges [36].

1.1. GaN Technology: Evolution from Academic Research to Industry Adoption

GaN has developed from early research into an important material for power electronics. Major advancements occurred in the 1990s with the development of GaN-based LEDs and HEMTs [14]. By the early 2000s, GaN-on-Si technology and enhancement-mode transistors started offering better alternatives to Si MOSFETs, especially for higher switching speeds and energy conversion efficiency. The advancement of GaN devices is shown in Figure 3. Since 2010, companies such as EPC, Transphorm, and GaN Systems have introduced commercial GaN devices, making it possible to develop smaller, more efficient, and lighter power systems that are essential for mobile and high-power-density applications [22]. Since 2023, GaN has been widely used in fast chargers, data centers, electric vehicles, and telecommunications. Recent innovations, such as monolithic GaN power ICs that integrate drivers and power stages, have simplified designs and boosted performance [19,37]. Advances in vertical GaN device structures and GaN-on-GaN substrates now expand GaN’s reach into high-voltage and high-power sectors traditionally dominated by SiC. By 2025, GaN is acknowledged not only as a breakthrough material but also as a key technology driving significant improvements in overall system performance [38]. Its fast switching reduces energy loss and electromagnetic interference (EMI), while its thermal resilience eases cooling challenges [10,38]. These properties make GaN suitable for electric mobility, renewable energy, aerospace, AI accelerators, and compact power supplies. Current studies on vertical GaN structures and GaN substrates aim to improve voltage capability, heat management, and integration density [39]. Although lateral GaN devices currently dominate, vertical designs are essential to fully exploit GaN’s potential. With improved manufacturing and lower costs, GaN is transitioning from a niche innovation to mainstream adoption, reshaping the future of efficient, compact, and sustainable power electronics [40,41].

1.2. Market Strategy and Advantages of GaN Material

From a market viewpoint, GaN has become a key technology for the development of high—efficiency, compact, and electrified power systems globally. Its strategic importance lies in its ability to address diverse high-growth industries with distinct advantages [42,43]. With its superior electron mobility, fast switching capability, and excellent thermal management, GaN has rapidly advanced beyond conventional Si and positioned itself as a strong contender against SiC. According to Yole Développement’s 2021 market forecast, the global GaN power device market was valued at only $46 million in 2020, as shown in Figure 4 [44]. However, driven by strong demand across consumer electronics, industrial systems, automotive applications, and telecom infrastructure, it is expected to reach around $672 million in 2025, achieving an extraordinary compound annual growth rate (CAGR) of nearly 70% [45,46,47]. By 2026, the total market is projected to exceed $1.1 billion. GaN is widely used in the consumer electronics sector, such as fast chargers, USB-C Power Delivery (PD) adapters, and charging solutions for mobile devices and laptops [48,49]. This segment alone is forecast to reach $672 million by 2026, reflecting a 69% CAGR. Automotive and mobility applications are also expanding rapidly [50].

GaN is growing fast in electric vehicles for chargers, DC-DC converters, and inverters, expected to reach $155 million by 2026 with 185% CAGR. Industrial automation, energy systems, and data centers also use GaN for better efficiency, smaller size, and heat management, with the market reaching $223 million at 71% CAGR [51]. Leading companies have been instrumental in this market expansion. Navitas Semiconductor (Torrance, CA USA) has shipped over 400 million GaN power ICs (GaNFast™) without field failures, demonstrating practical reliability [44,46,47]. Infineon Technologies (Munich, Germany) expanded its GaN capabilities by acquiring GaN Systems (Ottawa, ON, Canada), enhancing its industrial and automotive presence. In 2024, it introduced the first 300 mm GaN wafer technology and scaled production in 2025, achieving higher volumes and reduced costs [32,51,52]. Innoscience (Suzhou, China) is now the world’s largest fully integrated GaN device manufacturer, offering affordable solutions for high-volume consumer applications (

Table 2. Projected market growth and estimated market value for leading Power GaN companies in 2025.

Company	Market Growth (2020–2025)	Approx. 2025 Market Value	Headquarters	Market Segment	Technology Focus	Competitive Edge & Strategic Positioning	Ref.
Innoscience	120%	$100M+	Suzhou, China	Consumer/Industrial	Fully Integrated GaN	Largest vertically integrated GaN manufacturer; rapid global expansion	[56]
Infineon/GaN System	95%	$150M+	Munich, Germany/Ottawa, ON, Canada	Industrial/Automotive	GaN & SiC Hybrid	Pioneer of 300 mm GaN wafer production; broad industrial and automotive portfolio	[57]
Navitas Semiconductor	110%	$120M	Torrance, CA, USA	Consumer Electronics (GaN)	GaN Power ICs	Dominates fast charger segment; strong OEM partnerships (Xiaomi, Oppo)	[58]
EPC	70%	$90M	El Segundo, CA, USA	Telecom/Datacenter	GaN Discrete Devices	High-performance GaN transistors for telecom, datacenter, and industrial markets	[59]
Transphorm/Renesas	85%	$80M	Goleta, CA, USA/Tokyo, Japan	EV/Motor Drives	JEDEC-qualified GaN	Focus on EV onboard chargers and motor drives; industry certifications	[60]
Texas Instruments	65%	$70M	Dallas, TX, USA	Industrial/automotive, and data center	Mixed Si & GaN	Diversified GaN portfolio targeting industrial applications	[61]
Nexperia	65%	$60M	Nijmegen, The Netherlands	Multi-Sector (Industrial, Automotive, Energy)	Si & GaN Hybrid	Expanding GaN adoption for mainstream consumer power supplies	[62]

) and expanding quickly into Europe and North America, becoming a major global competitor. EPC (Efficient Power Conversion, El Segundo, CA, USA) makes high-performance e-GaN transistors for telecom, datacenter, and industrial use. Transphorm (Goleta, CA, USA), now part of Renesas (Tokyo, Japan), produces JEDEC-qualified 600 V GaN HEMTs and innovative system-in-package (SiP) modules, particularly for EVs and motor drives. Other major companies like Texas Instruments (Dallas, TX, USA), Nexperia (Nijmegen, The Netherlands), ROHM (Kyoto, Japan), Power Integrations (San Jose, CA, USA), and STMicroelectronics (Geneva, Switzerland) are all investing in GaN technology [53,54,55]. These firms are expanding their portfolios and targeting applications across telecom power supplies, industrial drives, and renewable energy systems.

Collaborations between GaN manufacturers and global consumer brands, such as Navitas with Xiaomi and Transphorm with Nexperia, have helped integrate GaN technology into mainstream electronics, allowing the production of compact, energy-efficient power adapters and chargers now widely used by consumers [18,63,64]. As GaN continues to penetrate electric vehicles, industrial automation, photovoltaic inverters, and cloud computing infrastructure, as shown in Figure 5. Its superior material characteristics, combined with proven field reliability and falling production costs, make it a critical technology for the global shift toward electrified, efficient, and sustainable energy solutions [5]. This broad ecosystem, combined with strategic collaborations between device manufacturers and global consumer brands such as Xiaomi, Oppo, and Dell, has accelerated GaN adoption worldwide [53,65,66]. With the increment of GaN adoption (Figure 5), manufacturers are increasingly integrating such reliability-focused strategies into product development, particularly for automotive-grade and industrial-grade applications. Reliability remains a critical parameter determining the commercial success of GaN power devices. Under high electric-field and switching conditions, these devices show dynamic on-resistance increase, threshold voltage shifts, gate leakage, and current collapse [67]. Such degradation arises from charge trapping, hot-carrier effects, and self-heating, which alter channel transport and impact long-term stability. To enhance device robustness, current research focuses on gate structure optimization, improved surface passivation, and advanced thermal packaging to suppress trap generation and minimize parasitic effects. Qualification procedures following AEC-Q101/102 standards [68], including HTGB, HTRB, and power cycling tests, are increasingly adopted to assess device endurance. With continuous process and design improvements, GaN technology is achieving greater reliability and maturity, supporting its deployment in high-efficiency and sustainable power systems [69].

2. State of the Art GaN Technology

The two-dimensional electron gas (2DEG) forms at the interface between the AlGaN and GaN layers due to polarization-induced charges, resulting in a high-density, confined electron layer with exceptionally high mobility. The schematic device structure is shown in Figure 6. This confinement arises without external doping, as polarization fields bend the energy bands and accumulate electrons at the heterojunction, creating a highly conductive channel [70,71]. The 2DEG formation allows efficient conduction with minimal scattering, supporting high-performance power devices with low conduction losses and increased current capacity [72].

2.1. Depletion-Mode GaN HEMTs

Depletion-mode (D-mode) GaN HEMTs exhibit inherently normally on behavior due to a spontaneously formed high-density 2DEG at the AlGaN/GaN interface, as shown in Figure 7. where current is conducted at zero gate bias. This intrinsic characteristic necessitates applying negative gate voltage to switch off the device, complicating gate driver design and system safety. D-mode GaN HEMTs offer low on-resistance, typically below 50 mΩ·mm and support switching frequencies exceeding those achievable by Si devices, facilitating efficient power conversion in the 600–900 V voltage range [37]. Key manufacturers, including Transphorm, EPC, and GaN Systems, have advanced this technology, with Transphorm’s products meeting AEC-Q101 automotive standards, demonstrating reliability under rigorous operational conditions [73]. EPC and GaN Systems focus on robust solutions for telecom, industrial, and data center applications.

Critical challenges persist in managing reliability and thermal performance. Charge trapping at interfaces leads to current collapse and threshold voltage shifts during high-frequency switching, although significant improvements in epitaxial quality and passivation have curtailed these effects, dynamic increases in on-resistance still pose reliability concerns [23,37]. Thermal dissipation is constrained by GaN’s moderate thermal conductivity (~1.3 W/cm·K) compared to SiC (~4.9 W/cm·K). Effective management involves high-thermal-conductivity substrates such as SiC or diamond and advanced packaging techniques, including Direct Bonded Copper substrates and double-sided cooling, to maintain junction temperatures below ~150 °C, necessary for preventing device degradation [23]. Additionally, minimizing parasitic inductances and capacitances within packaging is essential to maximize switching efficiency and reduce electromagnetic interference, though achieving low-inductance, stable packages remains challenging and costly [72]. D-mode GaN HEMTs’ robustness against overstress and short circuits supports high-reliability applications; however, the normally on nature of D-mode fails to obtain safe operation in high-performance power electronics.

2.2. Cascode GaN Configuration

The cascode configuration in GaN power devices is a key architecture where a D-mode GaN HEMT is paired with a low-voltage Si MOSFET to achieve normally off switching as shown in Figure 8a, for contemporary power electronics applications. This hybrid construct exploits the intrinsic electronic superiority of GaN specifically its exceptional electron mobility and high breakdown voltage while simultaneously capitalizing on the mature and robust gate control mechanisms inherent to Si devices [74,75]. Actuating the GaN transistor via the Si MOSFET simplifies the gate drive circuitry and enhances system stability and operational reliability [76,77]. The direct-drive configuration, shown in Figure 8b, connects the gate of the D-mode GaN HEMT directly to a dedicated gate driver circuit capable of providing a positive gate voltage for turn-on and a negative voltage (typically between −12 V and −14 V) for turn-off. This approach eliminates the need for an external cascode MOSFET, thereby reducing switching delay and parasitic effects [7] but requires more complex gate driver circuitry, including an under-voltage lockout (UVLO) for safe operation [74]. As of 2025, this cascode approach remains highly relevant across a broad spectrum of power conversion platforms requiring high frequency, elevated voltage ratings (typically within the 600 to 900 V range), and stringent efficiency standards [76]. Cascode GaN devices have demonstrated power densities surpassing 100 W/cm³, confirming their viability in demanding environments such as data center power supplies, telecommunications infrastructure, and industrial motor drives [74,75,78,79]. Cascode GaN devices, despite parasitic-induced speed limits, remain preferred for up to 1200 V applications due to manufacturability, robustness, and reliability [77]. They are widely used in solar inverters, EV onboard chargers, and telecom power supplies, where their balance of performance and integration efficiency is valued [78]. Transphorm, ON Semiconductor, Fuji Electric, and Power Integrations advance cascode GaN technology, improving architectures and integrating devices into high-frequency power modules, with Transphorm offering automotive-grade AEC-Q101 solutions [75,78,79]. The cascode GaN architecture effectively bridges legacy Si power technologies and advanced wide-bandgap semiconductors, delivering a robust solution that meets escalating demands for higher efficiency, greater power density, and enhanced thermal and electrical robustness. Its development remains essential for future power electronic systems.

2.3. Enhancement-Mode GaN HEMTs

Enhancement-mode (E-mode) GaN HEMTs are an important advancement in power semiconductors, offering normally off operation that ensures safe and efficient power conversion system design. This functionality is achieved by a p-type GaN cap layer above the AlGaN barrier, which depletes the 2DEG at zero gate bias and thereby suppresses current flow under no gate drive conditions, as shown in Figure 9. The conduction channel is re-established upon the application of a positive gate voltage, enabling controlled current flow [19]. Despite these benefits, E-mode GaN devices pose significant challenges in epitaxial layer growth, demanding precise control of the p-GaN thickness and doping concentration to achieve consistent threshold voltage and low leakage currents [80]. The intricate etching processes required to define the p-GaN gate region further complicate fabrication, with risks of etch damage leading to performance degradation [81]. Packaging remains equally critical; the inherently high switching speeds and voltages associated with GaN devices exacerbate parasitic inductances and capacitances within the package and PCB, which can induce switching losses and electromagnetic interference [82]. Accordingly, advanced packaging techniques such as GaN-on-QFN and GaN-on-glass have been developed to improve thermal dissipation and reduce parasitic elements, thereby enhancing device reliability [83,84].

Table 3. Comparative Analysis of WBG and Si Power MOSFETs in the 500–1200 V Range with Driving Modes and Package Specifications.

Voltage (V)	Manufacturer	Part Number	Semiconductor	Current (A)	RDS(on) (mΩ)	Gate Charge Qg (nC)	Driving Mode	Package	Ref.
500	Fujitsu (Tokyo, Japan)	2SK3397	Si	100	14	100	Cascode (D-mode)	TO-220	[85]
600	Panasonic (Osaka, Japan)	PA09N06	Si	26	56	5	Normally off(E-mode)	DFN	[86]
600	Infineon (Munich, Germany)	IPB60R099CFN3	Si	31	70	5.8	Normally off (E-mode)	PG-DSO-20	[87]
600	Infineon (Munich, Germany)	IKQ40N60D2	SiC	40	40	6	Normally off (E-mode)	TO-247	[88]
900	ROHM (Kyoto, Japan)	SCT2080KE	SiC	40	80	5	Normally off (E-mode)	TO-220	[89]
900	Nexperia (Nijmegen, Netherlands)	NSK10N90TS5	SiC	10	90	3.5	Normally off (E-mode)	TO-220	[90]
1200	Toshiba (Tokyo, Japan)	TW070J120B	SiC	20	50	3.2	Normally off (E-mode)	TO-247	[91]
1200	Wolfspeed (Durham, NC, USA)	C3M0075120J2	SiC	34	75	8	Normally off (E-mode)	TO-247	[92]
1200	Onsemi (Phoenix, AZ, USA)	SCT3030N120J	SiC	35	30	5	Normally off (E-mode)	TO-247	[93]
200	EPC (El Segundo, CA, USA)	EPC2210	GaN	48	8	11.4	Normally off (E-mode)	LGA	[94]
650	TI (Dallas, TX, USA)	LMG5200	GaN	55	30	35	Direct Drive (D-mode)	VQFN	[95]
650	GaN Systems (Ottawa, ON, Canada)	GS06508T	GaN	60	25	14.2	Normally off (E-mode)	GaNPX	[96]
650	GaN Systems (Ottawa, ON, Canada)	GS06506T	GaN	80	18	16	Normally off (E-mode)	Die(E-Mode)	[97]
900	Transphorm (Goleta, CA, USA)	TP90H050WS	GaN	34	50	15	Cascode(D-mode)	TO-247	[98]
1200	GaNPower GPI (Shanghai, China)	GPI1200V1	GaN	15	95	4.15	Normally off (E-mode)	TO-252	[99]
1200	Innoscience (Suzhou, China)	IS1200HV	GaN	25	50	6.1	Normally off (E-mode)	PQFN	[100]
1200	Ultrabandtech (Shanghai, China)	UPCC6G48	GaN	48	12	6.5	Normally off (E-mode)	TO-247	[101]

compares the various WBG devices and Si Power MOSFETs in the 500–1200 V range with respect to their operating mode and their package specifications.

System-level integration requires careful design of gate drivers to manage the higher gate charge and the pronounced sensitivity to voltage transients inherent to E-mode devices. Integrating on-chip protection and driver circuitry reduces associated risks, streamlines power management, and enhances device reliability [102]. Recent industry progress has culminated in devices operating reliably within voltage ranges of 600 to 650 volts, with research extending capabilities beyond 900 volts to meet rigorous demands in automotive and industrial contexts [103]. Companies such as Navitas Semiconductor and Innoscience have integrated power transistors with driver circuits, simplifying design and improving efficiency in consumer and fast-charging applications [104,105]. These advantages drive the increasing use of 1200 V GaN devices in high-performance power systems [106,107]. Meanwhile, manufacturers including Infineon Technologies, leveraging 300 mm wafer technology, targeting automotive and renewable energy applications with devices meeting strict reliability standards [57,108,109,110,111]. Additional contributions from STMicroelectronics, Texas Instruments, and Panasonic expand the spectrum of E-mode GaN offerings, powering data center, telecommunications, and electric vehicle infrastructures [112]. However, realizing their full potential requires ongoing refinement of epitaxial growth, fabrication, packaging, and gate drive integration to navigate inherent tradeoffs [113]. These developments are essential to ensuring device reliability, manufacturability, and seamless system adoption, thus securing the technology’s critical role in power electronics.

2.4. GaN Rectifier

The common GaN rectifiers are designed in two structural forms: lateral and vertical. In lateral devices, current travels along the plane of the semiconductor wafer, while in vertical devices, current moves perpendicularly from top to bottom, as shown in Figure 10. This structural difference influences voltage rating, current-handling capability, and circuit integration [59,114,115]. The choice between lateral and vertical GaN rectifiers depends on the application’s requirements for voltage, efficiency, and layout, with each structure offering distinct advantages.

Lateral GaN rectifiers, primarily fabricated on GaN-on-Si substrates, exhibit substantial advancements in conversion efficiency, switching performance, and power density compared with conventional Si-based counterparts [116]. As illustrated in Figure 10a, current conduction occurs laterally along the device surface through a high mobility 2DEG formed at the AlGaN/GaN heterointerface [117]. The absence of heavy doping minimizes carrier scattering, enabling low on-resistance and fast transient response. Most lateral GaN devices employ enhancement-mode (E-mode) HEMTs, which remain normally off at zero gate bias and turn on under a positive gate voltage, ensuring inherent operational safety and simplifying the gate-drive circuitry. Typical voltage ratings range from 100 V to 650 V, while recent advancements have extended capability up to 900 V for emerging industrial and automotive systems [18,118,119]. Increasing breakdown voltage often raises dynamic on-resistance, while compact layouts that reduce parasitic effects may aggravate thermal coupling. Continuous progress in gate-oxide reliability, surface passivation, and trapping suppression has enhanced long-term stability. Concurrently, advanced packaging approaches such as copper-clip interconnects, embedded substrate integration, and GaN-on-diamond heat-spreading structures have demonstrated superior thermal performance [118]. Leading semiconductor manufacturers Navitas, Infineon, Texas Instruments, Transphorm, Power Integrations, and EPC are driving large-scale commercialization. Consequently, lateral GaN-on-Si rectifiers are widely used in high-frequency, high-efficiency applications, including fast chargers, data center power modules, telecom rectifiers, solar microinverters, and EV onboard chargers [118,120,121].

Vertical GaN (v-GaN) rectifiers represent a major advancement in high-voltage power electronics, overcoming the intrinsic limitations of lateral GaN-on-Si devices. Unlike lateral structures (Figure 11), in which current flows along a thin epitaxial layer, v-GaN devices conduct vertically through a thick, high-quality bulk GaN substrate [81]. This vertical conduction allows for extended drift regions, enabling blocking voltages exceeding 1.5 kV and approaching 10 kV, while preserving low on-resistance and high switching speeds [122,123]. The use of native GaN substrates significantly reduces threading dislocation densities (10³–10⁵ cm⁻²), several orders of magnitude lower than heteroepitaxial GaN-on-Si, enhancing breakdown strength, thermal stability, and long-term reliability [114]. Vertical GaN devices provide strong voltage-blocking capability, low specific on-resistance, and good thermal dissipation, achieving performance comparable to or even better than SiC devices in electric vehicles, renewable energy, data centers, and industrial automation [124]. Panasonic has demonstrated v-GaN diodes and transistors with operational voltages exceeding 1.5 kV, while NexGen Power Systems and Innoscience are developing GaN-on-GaN platforms that integrate switching and control functions to improve power density and simplify system architectures [125,126]. Although challenges related to substrate cost and scalability persist, ongoing advances in bulk GaN crystal growth, epitaxial uniformity, and fabrication techniques are progressively mitigating these limitations [115,127,128]. Collectively, vertical GaN devices offer enhanced reliability and superior thermal performance, making them well-suited for next-generation high-voltage power conversion applications [114]. The performance comparison of both lateral and vertical GaN loop designs is tabulated in Table 4.

Table 4. Structural and performance comparison of lateral and vertical GaN loop designs.

Characteristics	Lateral GaN Loop Design	Vertical GaN Loop Design	Reference
Single-sided PCB capability	Supported—all components on one side simplify PCB layout.	Not supported—components on both sides require complex PCB.	[129,130]
Field self-cancelation	None, higher EMI potential.	Intrinsic field self-cancelation reduces EMI.	[131]
Shield layer required	Required to control parasitic coupling.	Not typically required.	[132]
Loop inductance dependence on PCB thickness	Insensitive, current loops mostly lateral.	Highly dependent, vertical current path traverses PCB layers.	[132]
Loop inductance dependence on inner layer distance	Sensitive to inner PCB layer spacing.	Insensitive, bulk conduction path dominates.	[130]
Loop inductance (Lp)	Large, lateral current path causes larger inductance.	Small, compact vertical conduction minimizes inductance.	[133]
Thermal management	Challenging due to lateral heat spread.	Efficient via vertical heat conduction and backside cooling.	[131,133]
Parasitic inductance impact	Large, leads to voltage overshoot and ringing.	Small, reduces switching losses and EMI.	[134]
PCB layer requirements	Simple, one or two layers adequate.	Complex, multi-layer PCBs required.	[132]
Loop path length	Longer loops increase inductance	Shorter loops reduce inductance, improve switching speed	[130]
Bypass capacitor placement	Critical to minimize ESL and loop inductance near FET gates	Similar placement critical	[135]

Table 4. Structural and performance comparison of lateral and vertical GaN loop designs.

Characteristics	Lateral GaN Loop Design	Vertical GaN Loop Design	Reference
Single-sided PCB capability	Supported—all components on one side simplify PCB layout.	Not supported—components on both sides require complex PCB.	[129,130]
Field self-cancelation	None, higher EMI potential.	Intrinsic field self-cancelation reduces EMI.	[131]
Shield layer required	Required to control parasitic coupling.	Not typically required.	[132]
Loop inductance dependence on PCB thickness	Insensitive, current loops mostly lateral.	Highly dependent, vertical current path traverses PCB layers.	[132]
Loop inductance dependence on inner layer distance	Sensitive to inner PCB layer spacing.	Insensitive, bulk conduction path dominates.	[130]
Loop inductance (Lp)	Large, lateral current path causes larger inductance.	Small, compact vertical conduction minimizes inductance.	[133]
Thermal management	Challenging due to lateral heat spread.	Efficient via vertical heat conduction and backside cooling.	[131,133]
Parasitic inductance impact	Large, leads to voltage overshoot and ringing.	Small, reduces switching losses and EMI.	[134]
PCB layer requirements	Simple, one or two layers adequate.	Complex, multi-layer PCBs required.	[132]
Loop path length	Longer loops increase inductance	Shorter loops reduce inductance, improve switching speed	[130]
Bypass capacitor placement	Critical to minimize ESL and loop inductance near FET gates	Similar placement critical	[135]

Figure 11. Cross-section showing the GaN Integrated circuit (ICs) [136].

Figure 11. Cross-section showing the GaN Integrated circuit (ICs) [136].

2.5. Monolithic GaN Power ICs

Monolithic GaN power integrated circuits (ICs) integrate multiple power devices on a single GaN substrate, as shown in Figure 11. This integration eliminates parasitic interconnects, resulting in faster switching, lower propagation delay, and higher overall power efficiency. Despite these advantages, achieving a fully integrated GaN platform remains challenging from both design and manufacturing perspectives [136,137]. The coexistence of high-voltage and low-voltage devices on the same wafer demands precise control of epitaxial growth conditions, device isolation schemes, and heat dissipation paths. Strong electric-field localization and self-heating at high switching frequencies can severely affect reliability unless mitigated through optimized substrate configurations and thermal management strategies such as GaN-on-SiC technology or engineered buffer layers [136,138]. From the packaging standpoint, reducing parasitic inductance while maintaining mechanical integrity and efficient thermal performance remains a critical challenge, particularly in compact, high-frequency half-bridge topologies.

Recent research has focused on wafer-level and embedded packaging techniques that improve heat dissipation, minimize parasitic inductance, and enhance the electrical and thermal reliability of GaN-based systems [5]. Early generations of monolithic GaN circuits employed D-mode devices, which offered high carrier mobility and low on-resistance but required complex gate-bias control due to their normally on operation, limiting integration flexibility. The transition to E-mode GaN technology has enabled normally off operation, simplifying circuit design and improving system safety, particularly for high-frequency power conversion. The schematic structure of a monolithic IC based on D-mode and E-mode GaN devices is shown in Figure 12. E-mode GaN ICs, capable of withstanding voltages up to 650 V and switching beyond 1 MHz, now form the foundation for compact, high-efficiency converters used in fast chargers, telecom rectifiers, and renewable energy systems [138,139]. Ongoing industrial advancements by companies such as Navitas, Infineon, Power Integrations, GaN Systems, Innoscience, Transphorm, and EPC continue to push integration density, gate-control precision, and thermal reliability through improved epitaxial growth and substrate engineering. Current development efforts emphasize optimizing gate dielectric integrity, device isolation, and thermal spreading within monolithic architectures to achieve higher power density and long-term reliability [138]. These advancements position monolithic GaN ICs as a key enabling technology for next-generation high-performance power platforms, including electric vehicles, data centers, and intelligent computing systems.

3. Advances and Challenges in GaN HEMTs

3.1. Performance in GaN HEMTs

GaN power devices represent a transformative advancement in power electronics, offering superior switching speeds, higher efficiency, and elevated power density compared to conventional technologies. These benefits arise primarily from the high-mobility 2DEG formed at the AlGaN/GaN heterojunction interface, which enables efficient, low-resistance electron transport [140,141]. Continued progress in epitaxial growth and device engineering has further optimized 2DEG mobility by reducing scattering, allowing GaN devices to meet stringent performance and reliability requirements across diverse power applications [72].

Table 5. Development Stages and High-Performance Product Typologies of GaN Power Electronics Vendors in 2025.

Vendor	Products		Technology	Development		Product Types			Voltage Range(V)	Major Packages & Key Notes
	Open Market	Closed Market	Foundry Services	Collaborative	In-House	Discreate	IC	Module
Infineon	✓			✓	✓	✓	✓	✓	400–1200	DFN8080, TOLL, EasyPACK, CoolGaN modules; automotive & data center focus [109]
ROHM Semiconductor			✓	✓	✓	✓	✓	✓	150–1200	DFN5060, TOLL, EcoGaN HEMTs with copper clip packaging; automotive & industrial grade [142]
Navitas Semiconductor	✓			✓	✓	✓	✓	✓	650, 1200	DFN, LGA; GaNFast ICs with high-frequency integration for mobile & consumer power [143]
EPC	✓				✓	✓	✓	✓	15–650	LGA, DFN, SMD; industry leader for low-mid voltage GaN transistors [144]
Innoscience	✓			✓	✓	✓	✓		40–650	QFN, DFN; leading open market share, focus on automotive & mobile [121]
GaNPower International	✓		✓	✓	✓	✓	✓	✓	650, 1200	TO-220, TO-263, DFN, QFN; high-voltage industrial & grid power focus [121,145]
Mitsubishi Electric				✓	✓	✓	✓	✓	650, 1200	Automotive, industrial semiconductor GaN solutions with R&D focus [146]
Microchip Technology				✓	✓	✓	✓		40–650	Integrated circuits, scalable high-frequency GaN solutions [146]
On Semiconductor	✓			✓	✓	✓	✓		40–1200	Industrial automation, renewable energy and smart mobility [146]
Texas Instruments	✓				✓	✓	✓		40–650	Diverse GaN ICs and modules for telecom, industrial and automotive [146]
Panasonic				✓	✓	✓	✓		650	Strength in automotive and renewable sectors, advanced packaging [147]
Qorvo				✓	✓	✓	✓		40–650	RF and power GaN ICs for wireless and defense applications [146]
Nexperia	✓				✓	✓	✓		40–650	GaN FETs with high power density and low conduction loss [148]
Renesas Electronics				✓	✓	✓	✓		300–700	GaN-on-Si cascode tech, automotive and industrial sectors [149]
Sanken Electric				✓	✓	✓	✓		650	Power conversion solutions with advanced packaging [146]

summarizes the latest vendor developments in 2025, including voltage ratings, product typologies, and packaging innovations, demonstrating the industrial maturity of GaN power electronics. These advancements broaden the use of GaN HEMTs in commercial and industrial applications requiring high power density and energy efficiency. The combination of efficiency, reliability, and compactness continues to drive widespread adoption, shaping the future of power electronics.

Power-Added Efficiency and Drain Efficiency: Power-Added Efficiency (PAE) and Drain Efficiency (DE) are key performance metrics for radio-frequency power amplifiers. DE measures how effectively the DC power is converted to RF output power, but does not account for the RF input power required to drive the device. PAE represents the net RF power gain (output minus input) relative to the DC power consumed, providing a more comprehensive measure of amplifier efficiency, especially for devices requiring significant drive power. Fujitsu Ltd. (Tokyo, Japan) has reported a record PAE of 85.2% and DE of 89.0% at 2.45 GHz in GaN HEMTs fabricated on free-standing GaN substrates. This outstanding performance is primarily attributed to the use of high-quality epitaxial layers and the elimination of buffer leakage currents, which are common in heteroepitaxial structures [150,151]. By removing residual Si at the interface between the substrate and epitaxial layer, Fujitsu effectively minimized leakage pathways, resulting in superior channel quality and reduced power losses. In comparison, traditional Si LDMOS devices operating at similar frequencies typically achieve a PAE of 60–70% and DE of 65–75% [152,153], highlighting the significant efficiency advantage of GaN HEMTs. These advancements enable highly efficient radio-frequency power amplifiers that are essential for wireless communication systems, radar, and other high-frequency applications [74,154,155].

Transconductance and On-Resistance: Transconductance (g_m) and on-resistance (R_DS(on)) are fundamental parameters that critically influence the performance of power devices. The g_m represents the rate of change in drain current with respect to gate voltage, while R_DS(on) quantifies the resistance encountered during current conduction in the on-state. Recent improvements in channel engineering and buffer design have enabled GaN HEMTs to achieve g_m values as high as 250 mS/mm and on-resistance as low as 0.31 Ω·mm [156,157]. In conventional Si MOSFETs typically exhibit g_m in the range of 50–60 mS/mm and R_DS(on) around 1–2 Ω·mm, illustrating that GaN devices provide approximately 4–5 times higher transconductance and 3–6 times lower on-resistance for similar voltage ratings. The high electron mobility within 2DEG channel allows GaN devices to maintain ultra-low R_DS(on) relative to their chip area, supporting compact designs with power densities that far exceed those of Si-based devices [155].

These performance gains have moved to commercial deployment, with manufacturers like EPC, GaN Systems, Infineon, Navitas, and Transphorm offering devices with low R_DS(on) for faster switching, smaller passive components, and higher efficiency. Current devices commonly support voltages ranging from 600 V to 650 V, with ongoing efforts to extend ratings above 900 V for automotive and industrial applications. For researchers, the combination of high g_m and low R_DS(on) provides a reliable foundation for accurate modeling and optimization of high-frequency power converters [154]. For industry, they translate into smaller, lighter, and more energy-efficient power electronics. Collectively, the superior conduction characteristics and switching capability of GaN HEMTs position them as a critical enabling technology for next generation of high-performance power conversion systems.

Thermal Management Enhancements in GaN HEMTs: Effective thermal management is critical for optimizing the performance and reliability of GaN HEMTs, which often operate at power densities exceeding 10 W/mm. Compared to conventional Si MOSFETs, which are limited by lower thermal conductivity and higher junction temperatures under similar power densities, GaN HEMTs benefit from advanced substrate and packaging innovations in Table 6. Recent studies demonstrate that integrating GaN HEMTs with polycrystalline diamond substrates can reduce junction temperatures by more than 30% compared to SiC substrates. The use of single-crystal diamond substrates further enhances thermal boundary conductance, enabling heat dissipation rates exceeding 1 MW/cm² [158,159].

Advanced packaging solutions, including double-sided diamond heat spreaders and PCB-on-Direct Bonded Copper hybrid structures, mitigate self-heating and allow devices to sustain high-frequency operation beyond 90 GHz with minimal performance degradation [159]. Additionally, employing hexagonal boron nitride (h-BN) as a passivation layer can lower lattice temperatures by 15 to 20%, contributing to enhanced long-term device stability [160]. These thermal management advancements support the development of efficient, compact GaN power converters and RF amplifiers used in demanding industrial applications including electric vehicles, 5G telecommunications, and aerospace [161]. Furthermore, they provide a valuable framework for academic exploration into substrate engineering, thermal modeling, and device design, fostering the translation of laboratory innovations into practical, high-performance power electronics [162,163]. Overall, these advancements demonstrate the crucial importance of thermal management in fully harnessing the high-power, high-frequency performance of GaN HEMTs, while clearly illustrating their superior characteristics relative to Si-based devices.

Table 6. Comparative Performance Metrics of Si, SiC, and GaN Power Semiconductor Devices (2024–2025 Data).

Parameter	Si MOSFET	SiC MOSFET	GaN HEMT	GaN vs. Si Improvement	Reference
Switching Frequency (MHz)	<0.1	0.3–0.8	1–5 (up to 10 MHz in advanced designs)	~10–50× faster	[164]
On-Resistance (RDS(on)) (mΩ·cm2)	20–50	10–20	3–7 (as low as 2.5 mΩ·cm2 in advanced designs)	~3–5× lower	[165]
Transconductance gm (S/mm)	5–10	10–15	15–30 (up to 40 S/mm in advanced designs)	~2–3× higher	[166]
Power-Added Efficiency (PAE %) at 2.45 GHz	70–85	85–90	95–98 (up to 99% in advanced designs)	+10–15%	[167]
Thermal Resistance (°C/W)	High	Moderate	Low (as low as 0.1 °C/W with advanced thermal management)	Significantly lower	[168]
Voltage Ratings (V)	600–1200	600–1200	600–650 (up to 1200 V in advanced designs)	Comparable	[168]
Switching Loss Reduction	Baseline	Baseline	~60–80% lower (due to faster switching and lower gate charge)	Significant reduction	[167]
Market Adoption	Widely adopted in low-voltage applications	Gaining traction in high-voltage applications	Rapidly expanding in high-frequency and high-efficiency applications	Accelerated penetration in emerging power markets	[166,169]

Table 6. Comparative Performance Metrics of Si, SiC, and GaN Power Semiconductor Devices (2024–2025 Data).

Parameter	Si MOSFET	SiC MOSFET	GaN HEMT	GaN vs. Si Improvement	Reference
Switching Frequency (MHz)	<0.1	0.3–0.8	1–5 (up to 10 MHz in advanced designs)	~10–50× faster	[164]
On-Resistance (RDS(on)) (mΩ·cm2)	20–50	10–20	3–7 (as low as 2.5 mΩ·cm2 in advanced designs)	~3–5× lower	[165]
Transconductance gm (S/mm)	5–10	10–15	15–30 (up to 40 S/mm in advanced designs)	~2–3× higher	[166]
Power-Added Efficiency (PAE %) at 2.45 GHz	70–85	85–90	95–98 (up to 99% in advanced designs)	+10–15%	[167]
Thermal Resistance (°C/W)	High	Moderate	Low (as low as 0.1 °C/W with advanced thermal management)	Significantly lower	[168]
Voltage Ratings (V)	600–1200	600–1200	600–650 (up to 1200 V in advanced designs)	Comparable	[168]
Switching Loss Reduction	Baseline	Baseline	~60–80% lower (due to faster switching and lower gate charge)	Significant reduction	[167]
Market Adoption	Widely adopted in low-voltage applications	Gaining traction in high-voltage applications	Rapidly expanding in high-frequency and high-efficiency applications	Accelerated penetration in emerging power markets	[166,169]

3.2. Major Reliability Issues and Challenges of GaN in Power Electronics

The reliability of AlGaN/GaN HEMTs is mainly determined by degradation processes occurring at the gate edge, passivation layer, and contact interfaces [21]. As shown in Figure 13. prolonged electrical and thermal stress promotes atom diffusion, hot-electron injection, charge trapping, and metallization damage, which gradually deteriorate device performance. Degradation at the gate edge arises from electrochemical oxidation and atomic diffusion, while high-energy electron trapping within the SiN passivation layer intensifies the local electric field and accelerates breakdown [170]. Additional effects, including trap formation at the AlGaN/GaN interface, thermal stress-induced passivation peeling, and ohmic contact degradation, contribute to threshold voltage shift, dynamic on-resistance increase, and current instability [171,172,173]. Recent investigations highlight that device reliability is closely linked to gate design, passivation integrity, and heat management [174]. Improvements such as optimized field plates, advanced SiN or AlN passivation layers, and the adoption of GaN-on-SiC or GaN-on-GaN substrates have enhanced robustness under high stress [172]. However, ensuring stable operation at high voltage, high frequency, and elevated temperature remains a key challenge for applications in electric vehicles, aerospace power systems, and renewable energy conversion.

Hot-Carrier Effects and Trap Generation: The degradation pathway in GaN-based HEMTs driven by hot-carrier injections and subsequent trap generation under high electric field stress. When a high drain-to-gate voltage is applied, electrons confined in the 2DEG channel experience strong acceleration near the drain edge of the gate, where the lateral electric field reaches its maximum intensity. These high-energy carriers, referred to as hot electrons, acquire sufficient kinetic energy to overcome the AlGaN barrier potential and are injected into the gate dielectric, passivation layer, or the GaN buffer region. During this process, impact ionization and defect activation can occur, leading to the formation of deep-level traps and interface states at the AlGaN/GaN junction and within the buffer [175]. The accumulation of trapped charge in these regions alters the local electrostatic potential and expands the depletion region between the gate and drain, as depicted in Figure 14.

This redistribution of the electric field increases the drain access resistance and suppresses the drain saturation current, directly degrading the device’s transconductance and output capability. Under repetitive switching conditions, the continual trapping and de-trapping of electrons induces a dynamic rise in on-resistance (R_DS(on)), causing current collapse, increased switching losses and reduced power conversion efficiency [176]. The resulting thermal stress further accelerates defect propagation, amplifying performance degradation during prolonged operation. In the buffer region, injected hot electrons can interact with residual impurities such as carbon or iron, generating stable deep-level defects that act as permanent charge traps [177]. These defects lead to irreversible threshold voltage (V_th) shifts, reduced electron mobility, and long-term instability of electrical parameters. Collectively, these phenomena represent a fundamental reliability concern in GaN power devices, as they compromise both efficiency and operational lifetime [170]. To mitigate these effects, current research emphasizes improved epitaxial design, optimized field management structures, and advanced passivation techniques aimed at minimizing hot-carrier injections and suppressing trap generation, thereby ensuring the long-term robustness and reliability of GaN HEMTs [15].

Gate Leakage and Dielectric Reliability: Gate leakage and dielectric degradation are critical reliability issues in p-GaN gate HEMTs, strongly affecting threshold voltage stability and device lifetime. As shown in Figure 15. multiple gate-sweep measurements reveal distinct degradation behaviors. In the first sweep, the device shows low leakage, indicating a healthy gate dielectric. During the second sweep, the gate current (I_G) increases markedly under negative gate bias (V_G < 0 V), while remaining nearly unchanged for V_G > 0 V [174,178]. This behavior indicates a PiN junction breakdown (BD) within the p-GaN gate region, which enhances reverse-bias leakage without influencing forward conduction. The failure is attributed to dislocation-related leakage paths in the GaN/AlGaN interface. After passivation and recovery treatment, the third sweep shows partial leakage recovery, confirming that both passivation-related and PiN junction breakdowns can occur concurrently [178]. These findings highlight that improving dielectric integrity and minimizing defect-assisted leakage paths are essential for reliable GaN gate operation.

Figure 16 presents the evolution of the gate-to-source leakage current (I_GS-V_GS) characteristics of AlGaN/GaN HEMTs subjected to repetitive transmission line pulse (TLP) stress and subsequent room-temperature aging [179]. A progressive increase in IGS with the number of applied TLP pulses reflects the generation of defect states and charge trapping within the gate dielectric and the AlGaN/GaN interface, which are critical reliability concerns in enhancement-mode GaN devices. The partial recovery observed after prolonged relaxation indicates thermally assisted de-trapping and partial healing of shallow traps, highlighting the transient nature of some electrostatic discharge (ESD) induced degradation. This degradation recovery behavior, accompanied by threshold voltage shift and transconductance reduction, confirms that electrostatic discharge-like stress primarily deteriorates the gate stack while preserving channel conduction. The analysis of TLP-induced leakage evolution provides valuable insight into trap kinetics and time-dependent dielectric degradation (TDDB) mechanisms that limit the long-term reliability of GaN power devices. Hence, achieving robust dielectric integrity through optimized gate insulator materials, improved passivation, and field-plate engineering remains a major challenge for ensuring stable operation of GaN-based power converters under high-voltage and high-frequency conditions [170].

Dynamic R_DS(on) and Current Collapse: During high-voltage off-state operation in GaN HEMTs, a strong electric field forms near the drain-side gate edge, accelerating channel electrons into a high-energy, or “hot” state in Figure 17. These electrons gain sufficient energy to overcome the AlGaN barrier or gate dielectric, becoming trapped at pre-existing surface or interface states. Trapping predominantly occurs at the AlGaN/GaN interface and beneath the drain-side gate edge [48]. The trapped charges change the near-surface electrostatic potential, impacting device behavior and reliability. Specifically, the presence of negatively charged traps near the surface forms a localized potential barrier, commonly referred to as a virtual gate. This virtual gate effectively extends the depletion region from the gate toward the drain side, thereby modulating the underlying 2DEG channel [12,127]. It is important to note that current collapse is a reversible phenomenon, distinct from permanent degradation mechanisms. Once the trapped electrons are thermally or electrically de-trapped, the device performance can recover. The recovery time constant typically ranges from microseconds to milliseconds, depending on the trap energy levels, operating temperature, and device structure. Shallow traps (activation energy < 0.5 eV) exhibit faster de-trapping, while deeper traps may require longer recovery times or elevated temperatures for complete charge release. This transient nature differentiates current collapse from irreversible degradation modes such as gate dielectric breakdown or contact degradation. Consequently, a temporary decrease in electron density and mobility within the 2DEG occurs, resulting in a reduction in the drain current when the device switches back to the on-state. This transient drop in drain current leads to an apparent increase in the on-state resistance, commonly identified as dynamic R_DS(on). This mechanism directly explains the origin of the current collapse phenomenon observed in dynamic switching tests. The formation of the virtual gate due to trapped charge causes a localized suppression of channel conduction, which persists until the trapped carriers are released through de-trapping processes or thermal activation.

Dynamic on-resistance and current collapse are key indicators of trapping-related degradation in GaN HEMTs. As shown in Figure 18a, the drain current (I_D) voltage (V_DS) characteristics exhibit a noticeable reduction after electrical stress, confirming charge trapping and carrier depletion in the channel. The collapse is markedly more severe under semi-on-state stress (V_GS = −6 V, V_DS = 40 V) than off-state stress (V_GS = −8 V, V_DS = 40 V). Pulse I-V measurements indicate a drain current (I_D) reduction of 10% for semi-on-state stress compared to 2% under off-state stress, highlighting the dominant role of trap-assisted modulation on the 2DEG channel [180]. The dynamic on-resistance, R_ON,D normalized to the pre-stress value R_ON,0 increases with both stress voltage and duration in Figure 18b, reflecting progressive trap occupation and reduced electron mobility in the channel. For stress durations exceeding 200 ms, R_ON,D/R_ON,0 under semi-on-state stress rises sharply, reaching 19 at 1000 ms, while off-state stress exhibits a slower increase, up to 10. Repeated trapping and de-trapping cycles severely compromise device reliability, inducing transient current collapse, threshold voltage shifts, and progressive degradation of switching performance. Targeted strategies such as robust interface passivation, electric field optimization, and engineered buffer structures are essential to suppress trap states and ensure stable, high-efficiency operation of GaN HEMTs [174,181].

Threshold Voltage Instability (V_th Shift): Threshold voltage (V_th) instability in AlGaN/GaN HEMTs arises from charge trapping near the gate dielectric and buffer, especially under ON-state gate or OFF-state drain bias stress. Strong gate bias induces negative V_th shift due to electron trapping, while high drain bias leads to positive shift, impacting dynamic on-resistance and causing current collapse. Device reliability is improved by optimizing passivation, buffer, and gate dielectric layers. The left panel of Figure 19a. demonstrates that stronger gate bias during ON-state stress increases electron trapping, producing a negative ${\mathrm{V}}_{\mathrm{th}}$ shift that reflects reduced channel conductivity and dampened switching performance [174]. Conversely, in the OFF-state stress regime (shown in Figure 19b), high drain bias induces charge trapping in the buffer or at surfaces, yielding a positive shift in ${\mathrm{V}}_{\mathrm{th}}$, dynamic on-resistance degradation, and current collapse [182]. These interdependent trapping effects directly impact operational reliability, particularly during high-power pulsed operation. Efforts to suppress ${\mathrm{V}}_{\mathrm{th}}$ drift include deploying optimized passivation, advanced buffer layers, and robust gate dielectric architectures to stabilize device characteristics.

Thermal Reliability in Power Modules: Thermal reliability in power modules is a critical factor affecting their performance and longevity. Power modules generate significant heat during operation, and managing this heat effectively is essential to prevent overheating, which can degrade materials, solder joints, and electrical interfaces [21]. Thermal cycling repeatedly, heating and cooling cycles induces mechanical stress due to differences in thermal expansion coefficients among module components, such as the base plate, substrate, solder layers, and semiconductor chips. Over time, this stress causes cracks and fatigue, particularly in solder layers, increasing thermal resistance and accelerating failure [173]. Maintaining efficient heat dissipation and minimizing thermomechanical stress through careful material selection, improved packaging, and robust thermal design are key to ensuring the long-term reliability of power modules in demanding applications.

Kink and Runaway Effects: The kink effect in AlGaN/GaN HEMTs is a distinct current reduction near the knee of the I_D-V_DS curve under DC bias, characterized by an initial current drop followed by a subsequent current rise. This behavior arises from two distinct but interrelated physical mechanisms: (1) Electron Trapping Phase (Current Reduction): At moderate drain bias, hot electrons generated near the drain-side gate edge gain sufficient kinetic energy through impact ionization. These energetic electrons are captured by deep-level acceptor-like traps in the GaN buffer layer or at the AlGaN/GaN heterointerface. The accumulated negative charge creates a virtual gate that depletes the 2DEG channel, causing the initial decrease in drain current. (2) Hole Injection Phase (Current Recovery): As drain voltage increases further, impact ionization intensifies, generating not only hot electrons but also holes. These holes are injected into the GaN buffer region. The positively charged holes partially compensate for the negatively charged electron traps, reducing the virtual gate effect. Additionally, holes can fill acceptor-like traps (such as carbon-related defects), restoring the 2DEG density and causing the characteristic current rise observed in the kink region. Figure 20. illustrates the (I_D-V_DS) characteristics of an AlGaN/GaN HEMTs under DC sweeps with varying maximum drain voltages. A distinct kink is observed, particularly at higher drain biases, reflecting the dynamic interplay between electron trapping and hole injection mechanisms [175]. The interplay between these two mechanisms determines the kink effect’s magnitude and shape. The severity of the kink depends on buffer quality, trap density, doping concentration, and thermal conditions. From a reliability perspective, repeated trapping/de-trapping cycles can induce output current instability, threshold voltage shifts, and long-term degradation of channel conduction [178]. The abrupt current variation signifies conduction instability, indicating critical reliability concerns such as current collapse and transient threshold voltage shifts [21,48]. Mitigating kink-induced instabilities through optimized buffer design, field-plate structures, and surface passivation is crucial to ensure reliable performance of devices under high-voltage conditions [183].

The thermal runaway effect in GaN HEMTs occurs when the device’s temperature rises significantly to cause uncontrolled current increase, potentially leading to device failure. Figure 21 clearly illustrates this behavior by showing I_DS vs. V_DS curves at two temperatures: 35 °C and 75 °C. At the lower temperature, the device operates normally with the current increasing steadily as voltage rises. However, at 75 °C, the current increases sharply beyond a certain voltage, indicating the start of thermal runaway [184,185]. This happens because as the device heats up during operation, the electrical resistance decreases, allowing more current to flow. More current generates even more heat, creating a self-reinforcing cycle [185]. If uncontrolled, this can cause hotspots inside the device, damage materials, and ultimately cause the device to fail. Proper understanding and control of thermal runaway are essential to ensure the reliable and safe operation of GaN HEMTs in high-power and high-frequency applications [12]. Engineers design better heat dissipation methods and protective circuits to keep the device running safely within its limits, avoiding thermal runaway and extending device life.

Inverse Piezoelectric Effect and Thermomechanical Strain: The critical reliability concern in GaN HEMTs arises at the semiconductor layers near the drain side of the gate edge, where the combined effects of high current density, electric field, and local temperature create severe stress conditions [157,186]. Due to the inverse piezoelectric effect, the electric field intensifies tensile stress in the AlGaN barrier. This enhanced stress initiates the formation of lattice defects and cracks, leading to degradation in key device parameters such as the drain current (I_D) and an increase in gate leakage current (I_G). Thermomechanical strain, caused by differences in thermal expansion among GaN, gate metal, and SiN passivation layers, further exacerbates this issue [11,38]. Even without electrical bias, repeated thermal cycling at elevated temperatures (300–650 K) concentrates mechanical strain at the gate edges, symmetrically on both source and drain sides. This strain promotes crack formation and crystal damage, as evident in the STEM image (Figure 22), which shows cracks at the gate contact edges. Correspondingly, the transconductance, g_m decreases significantly after 2000 h of thermal storage at 325 °C, indicating performance degradation [176]. The combined inverse piezoelectric effect and thermomechanical strains at the gate edges induce lattice damage, which undermines device reliability by degrading electrical performance and increasing leakage currents. This validates why gate edge integrity and material stress management are critical for long-term GaN HEMTs reliability.

4. Application Case Study

4.1. Bridgeless Totem-Pole Converters and GaN-Based Boost for High-Efficiency Power Conversion

Efficient power conversion from the 48 V intermediate bus to 12 V server loads is essential in modern data centers, automotive systems, and server applications for offering high-density and high-performance computing. GaN-based boost converters provide regulated high-voltage outputs with precise input current shaping, while bridgeless Totem-Pole converter architectures improve efficiency by reducing switching losses and minimizing conduction losses in the input stage [7,187]. These power stages generally operate from a wide AC mains voltage range (85–265 V) and regulate a high-voltage DC bus typically between 380 and 400 V [35,188]. This DC bus voltage then stepped down to 48 V intermediate buses and further converted to 12 V levels suitable for server and automotive electronics in Figure 23. For these demanding applications, 600–650 V GaN HEMTs have become the technology standard due to their superior switching speed, high reliability, and small form factor [19]. Their low input and output capacitance, minimal gate charge, and near-zero reverse-recovery losses contribute to converter efficiencies exceeding 99% [31]. These performance gains allow significant reduction in passive components, supporting compact, high-density power supplies for data centers and automotive applications.

Effective thermal management using DBC substrates and double-sided cooling maintains device junction temperatures below 150 °C during full-load operation at a 400 V DC bus. This thermal control is fundamental to preserving device reliability and longevity over continuous heavy use. As a result, GaN-based DC-DC converters consistently deliver efficiencies greater than 96%, fast transient responses, and compact designs [26]. These attributes make them ideal for server power delivery, electric vehicle auxiliary power units, and renewable energy inverters in

Table 7. Comparison of Leading GaN Power Semiconductor Companies: Innovations, Specifications, and Key Applications (2025).

Company	Key Innovations & Technologies	Voltage Rating (V)	Power Rating (W)	Target Applications	Notable Products and Milestones	References
Navitas Semiconductor (Torrance, CA, USA)	Monolithic GaN Power ICs with integrated drivers and transistors	650 V	Up to 300 W	Fast chargers, data centers, automotive DC-DC	NV7 Series, NV625x Power ICs; 650 V bidirectional GaNFast ICs for EV onboard chargers	[189]
Infineon Technologies (Munich, Germany)	Scalable 300 mm GaN wafers; CoolGaN automotive-grade HEMTs	600–650 V	Up to 500 W	Industrial power, automotive, telecom	First 300 mm GaN wafers; CoolGaN devices for server power and EV auxiliary power	[108,110,111,190]
Texas Instruments (Dallas, TX, USA)	Integrated GaN power stages with advanced gate drivers	650 V	Up to 300 W	Data centers, telecom, automotive	LMG3650 650 V Totem-Pole GaN power stages; >98% efficiency; integrated protection	[191,192]
Efficient Power Conversion (El Segundo, CA, USA)	Discrete enhancement-mode GaN FETs with ultra-low on-resistance	100 V	Up to 150 W	Telecom, data centers, industrial automation	EPC2367 100 V e-GaN FET with 1.2 mΩ RDS(on), high thermal performance	[193]
Power Integrations (San Jose, CA, USA)	GaN ICs with integrated boost and Totem-Pole converters	Up to 1700 V	Up to 600 W	AC-DC adapters, industrial, automotive	InnoSwitch™ and InnoSwitch™3-GaN series; 1700 V GaN switcher ICs for high voltage industrial power systems	[194]
Transphorm (Goleta, CA, USA)	Automotive-qualified D-mode and E-mode GaN power devices; AEC-Q101 certified	600–900 V	Up to 400 W	Automotive, industrial power	GaN devices with industry-leading reliability for automotive applications; emphasis on high-voltage robustness	[195,196]

. By combining fast switching capability, high efficiency, and robust thermal performance, 600–650 V GaN devices are shaping the future of high-performance DC-DC converters. They meet stringent requirements for voltage, efficiency, and reliability across next-generation data centers, EV fast-charging infrastructure, and sustainable energy systems [26].

4.2. Double-Pulse Test and Experimental Validation for Reliability Assessment

The Double-Pulse Test (DPT) is one of the most effective techniques for evaluating the dynamic switching performance and reliability of GaN HEMTs under realistic operating stress [172,186,187]. Due to their extremely fast transition speed, low input capacitance, and high electric field strength, GaN devices are particularly vulnerable to transient overshoots and localized field crowding [31,197,198]. Hence, DPT provides critical insight into both their switching characteristics and degradation mechanisms that evolve during repetitive high-voltage operation [28]. In a standard setup, two consecutive gate pulses are applied to the device at a defined DC bus voltage and load current, as shown in Figure 24. This allows precise measurement of switching losses (E_on, E_off), voltage overshoots, and current transients. DPTs are generally performed at 600–650 V, matching the rated stress of commercial GaN devices in

Table 8. Key Electrical Parameters and Performance Comparison of Latest GaN, SiC, and Si MOSFETs for Double-Pulse Test Applications.

Device	VDS (V)	VGS (V)	IDmax (A)	RDS(on) (mΩ)	RDS(on) ∗ QG (mΩ·nC)	RDS(on) ∗ Qrr (mΩ·µC)	RDS(on) ∗ Eoss (mΩ·µJ)	Ref.
CoolGaN™ [IG060R070D1] Infineon Technologies (Munich, Germany)	600	−5 to +7	31	55	319	0	352	[206]
GaN eMode [GS66508T] GaN Systems Inc. (Ottawa, ON, Canada)	650	−5 to +7	30	50	305	0	400	[96]
GaN eMode [GS66516T] GaN Systems Inc. (Ottawa, ON, Canada)	650	−5 to +7	60	25	355	0	425	[207]
GaN Cascode [TP65H050WS] Transphorm Inc. (Goleta, CA, USA)	650	−4 to +15 (cascode)	36	50	800	6.25	800	[208]
GaN Cascode [TPH3205WS] Transphorm Inc. (Goleta, CA, USA)	650	−4 to +15 (cascode)	36	52	1456	7.07	728	[209]
SiC MOSFET [C3M0060065K] Wolfspeed Inc. (Durham, NC, USA)	650	±15	37	60	2760	9.06	900	[210]
SiC MOSFET [SCT3030AL] ROHM Semiconductor (Kyoto, Japan)	650	±15	70	30	3120	3.9	510	[211]
SiC MOSFET [SCT3060AL] ROHM Semiconductor (Kyoto, Japan)	650	±15	39	60	3480	3.33	500	[212]
SiC MOSFET [C3M0065090D] Wolfspeed Inc. (Durham, NC, USA)	900	±15	36	65	2275	9.425	1040	[213]
SiC MOSFET [C3M0075120K] Wolfspeed Inc. (Durham, NC, USA)	1200	±15	30	75	3975	19.05	2475	[214]
SiC MOSFET [SCT3040KLHR] (ROHM Semiconductor, Kyoto, Japan)	1200	±15	55	40	4280	4.6	500	[215]
Si MOSFET [IPW60R080P7] Infineon Technologies (Munich, Germany)	650	10 (typically)	37	69	3519	200.1	379.5	[216]
Si MOSFET CoolMOS [IPP60R070CFD7] Infineon Technologies (Munich, Germany)	650	10 (typically)	31	57	3819	32.49	438.9	[217]

[31,197,198,199,200]. Liu et al. (2025) utilized DPT in combination with single-pulse tests to analyze the degradation and recovery behaviors of GaN HEMTs under repetitive surge current stress [201]. Their results showed a negative shift in threshold voltage (V_th) while R_DS(on) and breakdown voltage (BV) demonstrate partial recovery over time. These observations highlight the complex interplay between degradation and recovery processes in GaN HEMTs subjected to repetitive switching stresses [197]. Rise and fall times (t_r, t_f), indicating the speed of switching events and the resulting transient behavior. Voltage and current overshoot magnitudes, highlighting stress points that may impact device lifetime and reliability [197,198]. Additionally, studies have explored the impact of electrothermal effects on GaN HEMTs’ reliability. Shen et al. (2023) investigated the dynamic on-resistance stability and hot electron reliability of GaN HEMTs under hard-switching conditions [202]. Their findings indicated that elevated junction temperatures exacerbate degradation mechanisms, leading to increased dynamic on-resistance and reduced device reliability. These recent advancements in DPT methodologies and findings provide deeper insights into the long-term robustness and failure mechanisms of GaN power devices [203,204]. By elucidating the roles of charge trapping, electrothermal effects, and recovery behaviors, these studies contribute to the development of strategies aimed at enhancing the reliability and performance of GaN HEMTs in power electronics applications [205].

Figure 25 shows that GaN-based converters are expanding beyond data centers and automotive sectors into consumer electronics and renewable energy, offering high efficiency, fast switching, and compact size. Consumer devices operate at 20–350 V, while renewable energy applications use 600–900 V converters to improve efficiency and thermal performance [5]. In aerospace, GaN devices exploit their high-voltage and high-frequency performance while meeting strict thermal and size requirements for aircraft and satellite applications [18,117]. The upper voltage range of GaN devices can reach up to 1700 V in specialized applications. While most commercial GaN HEMTs function between 100 and 650 V, advances in GaN-on-GaN and GaN-on-SiC technologies have enabled devices to handle voltages up to 1700 V, making them suitable for industrial motor drives, renewable energy inverters, and traction systems where high voltage and efficiency are essential [114]. GaN power electronics are transforming energy conversion, with devices exceeding 1200 V and higher current densities, enabling applications in EV inverters, industrial drives, and grid-connected renewable systems [218]. Compared with Si and SiC devices, GaN continues to stand out by offering ultra-low switching losses and rapid transient response, making it a key technology for the next generation of high-performance power systems [219]. Emerging device architectures like vertical GaN HEMTs, cascode configurations, and monolithic GaN ICs will reduce parasitic losses, improve thermal management, and simplify system design. Concurrent innovations in packaging multi-chip modules, embedded cooling, 3D stacking, and double-sided thermal management will enhance power density, reliability, and thermal control, yielding compact yet powerful solutions [20,220]. GaN technology is poised for widespread adoption in power electronics, driven by its superior efficiency, compactness, and robust reliability under demanding operational conditions [140,221]. Ongoing research on reliability, degradation, and fault tolerance will ensure these devices perform stably over long operational lifetimes. Integrating GaN with digital control systems, wide-bandgap system-on-chip platforms, and advanced cooling strategies will revolutionize power conversion architectures, delivering smaller, lighter, and more energy-efficient systems [63,222]. With its superior efficiency, speed, compactness, and durability, GaN will form the foundation of future sustainable, high-performance power electronics globally [5,37,141].

5. Conclusions

GaN-based power devices are revolutionizing high-efficiency power conversion across a wide range of sectors, including data centers, automotive, renewable energy, and aerospace. Their inherent WBG, rapid switching speeds, low conduction losses, and excellent thermal stability enable the design of ultra-compact, high-power-density converters that deliver outstanding efficiency and reliability. Rigorous experimental methods, such as double-pulse testing and detailed thermal analyses, validate their robust performance under demanding high-voltage and high-frequency conditions. Ongoing advancements in vertical GaN device architectures, monolithic integration, and innovative packaging technologies promise further improvements in efficiency, power density, and durability. These developments position GaN as a foundational technology for next-generation applications, including fast electric vehicle charging, advanced server power supplies, and renewable energy inverters, securing its role as a key enabler of sustainable, high-performance power electronics.