Liu, Y.; Zhang, Y.; Hao, X.; Chen, L.; Ni, M.; Chen, M.; Chen, R.
Design of a Convolutional Neural Network Accelerator Based on On-Chip Data Reordering. Electronics 2024, 13, 975.
https://doi.org/10.3390/electronics13050975
AMA Style
Liu Y, Zhang Y, Hao X, Chen L, Ni M, Chen M, Chen R.
Design of a Convolutional Neural Network Accelerator Based on On-Chip Data Reordering. Electronics. 2024; 13(5):975.
https://doi.org/10.3390/electronics13050975
Chicago/Turabian Style
Liu, Yang, Yiheng Zhang, Xiaoran Hao, Lan Chen, Mao Ni, Ming Chen, and Rong Chen.
2024. "Design of a Convolutional Neural Network Accelerator Based on On-Chip Data Reordering" Electronics 13, no. 5: 975.
https://doi.org/10.3390/electronics13050975
APA Style
Liu, Y., Zhang, Y., Hao, X., Chen, L., Ni, M., Chen, M., & Chen, R.
(2024). Design of a Convolutional Neural Network Accelerator Based on On-Chip Data Reordering. Electronics, 13(5), 975.
https://doi.org/10.3390/electronics13050975