# A Fast Homeostatic Inhibitory Plasticity Rule Circuit with a Memristive Synapse

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## Abstract

**:**

^{©}using a commercial Knowm memristor as a synapse. The PSpice

^{©}simulation results show that the circuit can achieve a weight update curve similar to the biological homeostatic inhibitory plasticity rule, and the time scale of the circuit is improved by a factor of 1000 compared to that of the biological nervous system. Furthermore, the circuit has wide applicability due to the tunable qualities of the homeostatic learning window, scaling factor, and homeostatic factor. This study provides new opportunities for building fast and reliable neuromorphic hardware.

## 1. Introduction

_{pre}t

_{post}is the relative time interval of the pre- and postsynaptic spikes.

_{+}and A

_{−}refer to the maximum learning rate; ${\tau}_{+}$ and ${\tau}_{-}$ refer to the time constant; ${w}_{0}\ge 0$ is the minimum value of inhibitory synaptic enhancement, ${w}_{0}=0$ in Figure 1; and α is the homeostatic factor, which determines the homeostatic firing rate of postsynaptic neurons.

^{©}. The remainder of this paper is organized as follows: The memristor model applied to the synaptic device is introduced in Section 2. Section 3 describes the implementation procedures for the homeostatic inhibitory plasticity circuit. Section 4 analyzes and discusses the PSpice

^{©}simulation results of the proposed system. The last Section 5 provides the conclusions.

## 2. The Memristor Model Used in Synaptic Device

_{ON}and V

_{OFF}are the thresholds of the memristor ON state and OFF state, respectively; β is the temperature parameter; τ is the time constant of the memristor; G

_{m}is the conductance of the memristor; and i and v are the current and voltage through the memristor, respectively. According to our previous research [24], the i-v characteristics of the Knowm memristor can be better simulated when the parameters are set to the following values: R

_{ON}= 5.88 kΩ, R

_{OFF}= 44.02 KΩ, V

_{ON}= 0.37 V, V

_{OFF}= 0.17 V, and β = 38.46.

^{©}model is based on the mathematical model of the Knowm memristor. In Figure 2a, an extra floating XSV pin was added to the model symbol to facilitate its monitoring of the conductance change in the memristor. The voltage at the XSV pin represents the memristor state variable x.

^{©}model of the Knowm memristor is shown in Appendix A.

## 3. The Homeostatic Inhibitory Plasticity Rule Circuit

#### 3.1. Homeostatic Learning Window Control Module

#### 3.2. Potentiation Module

#### 3.3. Depression Module

#### 3.4. Weight Update Module

## 4. PSpice^{©} Simulation Results and Discussion

^{©}simulation results of the homeostatic inhibitory plasticity rule circuit with a Knowm memristive synapse. First, the functionality of the proposed circuit is verified by traversing the Δt and applying continuous pre- and postsynaptic pulses. Second, the PSpice

^{©}simulation results are discussed.

#### 4.1. Traversing the Δt

^{©}, the situations of ∆t < 0 and ∆t > 0 are simulated separately with a 50 µs simulation time. The waveform of the state variable x of the memristor is obtained, as illustrated in Figure 12a, by monitoring the voltage at the XSV pin of the memristor V(XSV), since V(XSV) represents the memristor state variable x. The plot to the left of the dotted line at Time = 0 is the change in x when ∆t > 0, while the plot to the right represents the change in x when ∆t <0. When |∆t| ≤ 20 µs, x increases, and as |∆t| decreases, x increases more; when |∆t| > 20 µs, x decreases, and as |∆t| increases, x decreases more, and then remains constant.

_{0}is the initial conductance of the memristor, and G is the updated conductance, the change in the memristive synapse conductance (i.e., the change in synaptic weight) can be calculated as follows:

^{©}experimental data, it is determined that when A

_{+}= A

_{−}= 0.1, ${\tau}_{+}$ = 7.5 µs, ${\tau}_{-}$ = 12 µs, ${w}_{0}=0.007$, and α = 0.02, Equation (1) can fit the PSpice

^{©}experimental data well (shown in orange symbols in Figure 12b). It is indicated that the circuit achieves a homeostatic inhibitory plasticity learning rule similar to a biological one.

#### 4.2. Applying Continuous Pre- and Postsynaptic Pulses

#### 4.3. Discussion

^{©}was 0.083 W at the displayed power supply. We must admit that this is not a small power dissipation. However, the board-level circuit design in this paper provides an idea for the integrated design of the homeostatic inhibitory plasticity rule circuit. In the nanoscale integrated circuit design field, the input pulse voltage could be appropriately reduced, and the comparator could become smaller and consume less power. Accordingly, the values of the capacitor and resistor used in the design would become smaller, which will be achievable in the near future.

## 5. Conclusions

^{©}for the first time. The simulation results indicate that the circuit successfully implements the homeostatic inhibitory plasticity rule, and its time scale is one thousand times quicker than biology. This meets the requirements of neuromorphic hardware for fast computing speed. Moreover, the proposed circuit is promising for a wide range of applications with an adjustable steady-state learning window, learning rate, and steady-state factor. This research offers the groundwork for developing neuromorphic technology with homeostatic firing rates, similar to those of the biological nervous system. In addition, we believe that implementing the homeostatic inhibitory plasticity rule in the design of neuromorphic hardware can improve its reliability. This hypothesis will be verified in our upcoming study.

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## Appendix A

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**Figure 9.**The time-domain waveforms of several significant node voltages inside the Depression2 generating circuit.

**Figure 12.**PSpice

^{©}simulation results after traversing Δt. (

**a**) Memristor’s state variable x; (

**b**) the change in memristive synaptic conductance with ∆t.

**Figure 13.**Responses of the proposed circuit to continuous pre- and postsynaptic pulses. The time-domain waveforms of Pre, Post, Potentiation1, Depression1 and Depression2, and memristive synaptic conductance are depicted from top to bottom.

**Figure 14.**Power consumption by the synapse as a function of the temporal difference between pre- and postsynaptic spikes.

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**MDPI and ACS Style**

Ma, G.; Man, M.; Zhang, Y.; Liu, S. A Fast Homeostatic Inhibitory Plasticity Rule Circuit with a Memristive Synapse. *Electronics* **2023**, *12*, 490.
https://doi.org/10.3390/electronics12030490

**AMA Style**

Ma G, Man M, Zhang Y, Liu S. A Fast Homeostatic Inhibitory Plasticity Rule Circuit with a Memristive Synapse. *Electronics*. 2023; 12(3):490.
https://doi.org/10.3390/electronics12030490

**Chicago/Turabian Style**

Ma, Guilei, Menghua Man, Yongqiang Zhang, and Shanghe Liu. 2023. "A Fast Homeostatic Inhibitory Plasticity Rule Circuit with a Memristive Synapse" *Electronics* 12, no. 3: 490.
https://doi.org/10.3390/electronics12030490