Next Article in Journal
Performance Analysis of Massive MIMO-OFDM System Incorporated with Various Transforms for Image Communication in 5G Systems
Previous Article in Journal
3D Void Handling Geographic P2P-RPL for Indoor Multi-Hop IR-UWB Networks
 
 
Article
Peer-Review Record

10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive

Electronics 2022, 11(4), 624; https://doi.org/10.3390/electronics11040624
by Guo-Ming Sung 1,2,*, Chong-Cheng Huang 1, Xiong Xiao 3,* and Shih-Ying Hsu 1
Reviewer 1:
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Electronics 2022, 11(4), 624; https://doi.org/10.3390/electronics11040624
Submission received: 7 January 2022 / Revised: 8 February 2022 / Accepted: 15 February 2022 / Published: 17 February 2022
(This article belongs to the Section Microelectronics)

Round 1

Reviewer 1 Report

The authors presented design method, simulation results and experimental data on the proposed SAR ADC in a motor system. However, the reviewer feels like the contribution of paper is not clearly explained. In the current form, the design proposal for the SAR ADC lacks functional innovations as the main topologies or the ADC and PLL is well known. It didn't come across to the reviewer how the addition of the buffer (i.e. two inverting stages in the VCO) as well as the dummy capacitors in the ADC adds to the performance of the SAR ADC. Also, when the authors compare the performance of this work with literature, all previous ones are standalone ADCs. It is not clear to the reviewer why the specific application of the SAR ADC in the motor system is necessary/innovative.

Author Response

Dear Prof. Reviewer,

We would like to resubmit the manuscript entitled with “10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive“ by Mr. C.C. Huang, Dr. X. Xiao, Mr. S.Y. Hsu, and myself for publication as an Article in Electronics Journal. The revised manuscript has been marked up using the “Track Changes” function. Any changes can be easily viewed by the editors and reviewers. Furthermore, the details of the revisions to the manuscript and our responses to the referee’s comments are included in the attached files. Thank you very much for your assistance.

Sincerely yours,

Prof. Guo-Ming Sung,

EE Department, National Taipei University of Technology, Taipei, Taiwan

Author Response File: Author Response.pdf

Reviewer 2 Report

This paper presents a SAR ADC with a charge-pump PLL and a boostrapped switch for BLDC application. Though the IC prototype was fabricated by a traditional technology node 0.25um which seems to be impractical due to its large power consumption and low speed, the main idea can be verified and it addresses a real practical problem. From the industry point of view, I personally like this type of research paper.

Author Response

Dear Prof. Reviewer,

We would like to resubmit the manuscript entitled with “10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive“ by Mr. C.C. Huang, Dr. X. Xiao, Mr. S.Y. Hsu, and myself for publication as an Article in Electronics Journal. The revised manuscript has been marked up using the “Track Changes” function. Any changes can be easily viewed by the editors and reviewers. Furthermore, the details of the revisions to the manuscript and our responses to the referee’s comments are included in the attached files. Thank you very much for your assistance.

Sincerely yours,

Prof. Guo-Ming Sung,

EE Department, National Taipei University of Technology, Taipei, Taiwan

Author Response File: Author Response.pdf

Reviewer 3 Report

The paper reports the development, fabrication and characterization of a new PLL-SAR ADC.

Some suggestions to improve the paper:

In the Introduction it is difficult to understand what is known from the previous literature and what is the new proposal of the authors. Please, use some different phrasing for previous results of other researchers.

Figure 2: what is the S/H block? Provide a description.

Figure 16 and 17 are the same.

Author Response

Dear Prof. Reviewer,

We would like to resubmit the manuscript entitled with “10-Bit 5 MS/s Successive Approximation Register Analog-to-Digital Converter with a Phase-Locked Loop and Modified Bootstrapped Switch for a BLDC Motor Drive“ by Mr. C.C. Huang, Dr. X. Xiao, Mr. S.Y. Hsu, and myself for publication as an Article in Electronics Journal. The revised manuscript has been marked up using the “Track Changes” function. Any changes can be easily viewed by the editors and reviewers. Furthermore, the details of the revisions to the manuscript and our responses to the referee’s comments are included in the attached files. Thank you very much for your assistance.

Sincerely yours,

Prof. Guo-Ming Sung,

EE Department, National Taipei University of Technology, Taipei, Taiwan

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

The clarity and contribution of the paper has been significantly improved. Thanks for addressing my comments. No further comments.

Back to TopTop