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Security Implications for Ultra-Low Power Configurable SoC FPAA Embedded Systems

Electrical and Computer Engineering (ECE), Georgia Institute of Technology, Atlanta, GA 30332-250, USA
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J. Low Power Electron. Appl. 2018, 8(2), 17; https://doi.org/10.3390/jlpea8020017
Received: 27 February 2018 / Revised: 7 May 2018 / Accepted: 21 May 2018 / Published: 5 June 2018
(This article belongs to the Special Issue Low Power Hardware Security)
We discuss the impact of physical computing techniques to classifying network security issues for ultra-low power networked IoT devices. Physical computing approaches enable at least a factor of 1000 improvement in computational energy efficiency empowering a new generation of local computational structures for embedded IoT devices. These techniques offer computational capability to address network security concerns. This paper begins the discussion of security opportunities for, and issues using, FPAA devices for small embedded IoT platforms. These FPAAs enable devices often utilized for low-power context aware computation. Embedded FPAA devices have both positive Security attributes, as well as potential vulnerabilities. FPAA devices can be part of the resulting secure computation, such as implementing unique functions. FPAA devices can be used investigate security of analog/mixed signal capabilities. The paper concludes with summarizing key improvements for secure ultra-low power embedded FPAA devices. View Full-Text
Keywords: FPAA; device security FPAA; device security
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Hasler, J.; Shah, S. Security Implications for Ultra-Low Power Configurable SoC FPAA Embedded Systems. J. Low Power Electron. Appl. 2018, 8, 17.

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