Hiienkari, M.; Teittinen, J.; Koskinen, L.; Turnquist, M.; Mäkipää, J.; Rantala, A.; Sopanen, M.; Kaltiokallio, M.
A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention. J. Low Power Electron. Appl. 2015, 5, 57-68.
https://doi.org/10.3390/jlpea5020057
AMA Style
Hiienkari M, Teittinen J, Koskinen L, Turnquist M, Mäkipää J, Rantala A, Sopanen M, Kaltiokallio M.
A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention. Journal of Low Power Electronics and Applications. 2015; 5(2):57-68.
https://doi.org/10.3390/jlpea5020057
Chicago/Turabian Style
Hiienkari, Markus, Jukka Teittinen, Lauri Koskinen, Matthew Turnquist, Jani Mäkipää, Arto Rantala, Matti Sopanen, and Mikko Kaltiokallio.
2015. "A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention" Journal of Low Power Electronics and Applications 5, no. 2: 57-68.
https://doi.org/10.3390/jlpea5020057
APA Style
Hiienkari, M., Teittinen, J., Koskinen, L., Turnquist, M., Mäkipää, J., Rantala, A., Sopanen, M., & Kaltiokallio, M.
(2015). A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention. Journal of Low Power Electronics and Applications, 5(2), 57-68.
https://doi.org/10.3390/jlpea5020057