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Volume 14
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10.3390/jlpea14040050
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Article

Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy

by
Joao Henrique Quintino Palhares
1,2,3,4,
Nikhil Garg
3,4,
Yann Beilliard
3,4,
Lorena Anghel
2,
Fabien Alibart
3,4,
Dominique Drouin
3,4,* and
Philippe Galy
1,*
1
STMicroelectronics, 850 rue Jean Monnet, 38920 Crolles, France
2
CEA, CNRS, Grenoble INP, SPINTEC, Université Grenoble Alpes, 38000 Grenoble, France
3
Institut Interdisciplinaire d’Innovation Technologique (3IT), Université de Sherbrooke, 3000 Bd de l’Université, Sherbrooke, QC J1K 0A5, Canada
4
Laboratoire Nanotechnologies Nanosystèmes (LN2), CNRS IRL 3463, Université de Sherbrooke, 3000 Bd de l’Université Université, Sherbrooke, QC J1K 0A5, Canada
*
Authors to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2024, 14(4), 50; https://doi.org/10.3390/jlpea14040050
Submission received: 19 September 2024 / Revised: 15 October 2024 / Accepted: 19 October 2024 / Published: 22 October 2024
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Abstract

The non-ideality aspects of phase change memory (PCM) such as drift and resistance variability can pose significant obstacles in neuromorphic hardware implementations. A unique drift and variability compensation strategy is demonstrated and implemented in an FD-SOI SNN hardware unit composed of embedded phase change memories (ePCMs), current attenuators, and spiking neurons. The effect of drift and variability compensation on inference accuracy is tested on the MNIST dataset to show that our drift and variability mitigation strategy is effective in sustaining its accuracy over time. The variability is reduced by up to 5% while the drift coefficient is reduced by up to 57.8%. The drift is compensated and the SNN classification accuracy is sustained for up to 2 years with intrinsic control-free hardware that tracks the ePCM current over time and consumes less than 30 µW. The results are based on ePCM chip experimental data and pos-layout simulation of a test chip comprising the proposed circuit solution.
Keywords: PCM; PCM drift; drift mitigation; spiking neural networks; emerging non-volatile memory; 28 nm FD-SOI technology PCM; PCM drift; drift mitigation; spiking neural networks; emerging non-volatile memory; 28 nm FD-SOI technology

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MDPI and ACS Style

Palhares, J.H.Q.; Garg, N.; Beilliard, Y.; Anghel, L.; Alibart, F.; Drouin, D.; Galy, P. Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy. J. Low Power Electron. Appl. 2024, 14, 50. https://doi.org/10.3390/jlpea14040050

AMA Style

Palhares JHQ, Garg N, Beilliard Y, Anghel L, Alibart F, Drouin D, Galy P. Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy. Journal of Low Power Electronics and Applications. 2024; 14(4):50. https://doi.org/10.3390/jlpea14040050

Chicago/Turabian Style

Palhares, Joao Henrique Quintino, Nikhil Garg, Yann Beilliard, Lorena Anghel, Fabien Alibart, Dominique Drouin, and Philippe Galy. 2024. "Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy" Journal of Low Power Electronics and Applications 14, no. 4: 50. https://doi.org/10.3390/jlpea14040050

APA Style

Palhares, J. H. Q., Garg, N., Beilliard, Y., Anghel, L., Alibart, F., Drouin, D., & Galy, P. (2024). Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy. Journal of Low Power Electronics and Applications, 14(4), 50. https://doi.org/10.3390/jlpea14040050

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