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Article

A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers

Dipartimento di Ingegneria dell’Informazione, Elettronica e Telecomunicazioni (DIET), Università di Roma La Sapienza, 00184 Roma, Italy
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Author to whom correspondence should be addressed.
Academic Editor: Orazio Aiello
J. Low Power Electron. Appl. 2022, 12(1), 12; https://doi.org/10.3390/jlpea12010012
Received: 20 January 2022 / Revised: 10 February 2022 / Accepted: 11 February 2022 / Published: 17 February 2022
(This article belongs to the Special Issue Ultra-Low-Power ICs for the Internet of Things)
In this paper, we introduce a novel tree-based architecture which allows the implementation of Ultra-Low-Voltage (ULV) amplifiers. The architecture exploits a body-driven input stage to guarantee a rail-to-rail input common mode range and body-diode loading to avoid Miller compensation, thanks to the absence of high-impedance internal nodes. The tree-based structure improves the CMRR of the proposed amplifier with respect to the conventional OTA architectures and allows achievement of a reasonable CMRR even at supply voltages as low as 0.3 V and without tail current generators which cannot be used in ULV circuits. The bias currents and the static output voltages of all the stages implementing the architecture are accurately set through the gate terminals of biasing transistors in order to guarantee good robustness against PVT variations. The proposed architecture and the implementing stages are investigated from an analytical point of view and design equations for the main performance metrics are presented to provide insight into circuit behavior. A 0.3 V supply voltage, subthreshold, ultra-low-power (ULP) OTA, based on the proposed tree-based architecture, was designed in a commercial 130 nm CMOS process. Simulation results show a dc gain higher than 52 dB with a gain-bandwidth product of about 35 kHz and reasonable values of CMRR and PSRR, even at such low supply voltages and considering mismatches. The power consumption is as low as 21.89 nW and state-of-the-art small-signal and large-signal FoMs are achieved. Extensive parametric and Monte Carlo simulations show the robustness of the proposed circuit to PVT variations and mismatch. These results confirm that the proposed OTA is a good candidate to implement ULV, ULP, high performance analog building blocks for directly harvested IoT nodes. View Full-Text
Keywords: body-driven; ultra-low-voltage; ultra-low-power; operational transconductance amplifier; IoT body-driven; ultra-low-voltage; ultra-low-power; operational transconductance amplifier; IoT
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MDPI and ACS Style

Centurelli, F.; Della Sala, R.; Monsurrò, P.; Scotti, G.; Trifiletti, A. A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers. J. Low Power Electron. Appl. 2022, 12, 12. https://doi.org/10.3390/jlpea12010012

AMA Style

Centurelli F, Della Sala R, Monsurrò P, Scotti G, Trifiletti A. A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers. Journal of Low Power Electronics and Applications. 2022; 12(1):12. https://doi.org/10.3390/jlpea12010012

Chicago/Turabian Style

Centurelli, Francesco, Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, and Alessandro Trifiletti. 2022. "A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers" Journal of Low Power Electronics and Applications 12, no. 1: 12. https://doi.org/10.3390/jlpea12010012

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