# Evaluation of In Vivo Spike Detection Algorithms for Implantable MTA Brain—Silicon Interfaces

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## Abstract

**:**

^{2}area is simulated, generating a signal with Neurocube. This signal is then used to validate the algorithms’ performances. The results allow us to numerically determine which is the most efficient algorithm in the case of power constraint in implantable devices and to characterize its performance in terms of accuracy and resource usage.

## 1. Introduction

- An implanted chip receives power from a battery or from harvesting systems that are intrinsically capable of providing limited power;
- The wireless data transmission between the sensor and the external interface cannot manage a flow of raw data coming from the entire sensor (at least 10 kS/sec/pixel);
- Being in contact with living tissue, the temperature of the device must remain within the heat dissipation capacity of the tissue to avoid damage.

- The standard deviation-based threshold crossing [9], a golden standard for most of the real-time systems due to its extremely low resource footprint combined with a performance sufficient to work as a spike sorting preprocessing step;

## 2. Materials and Methods

#### 2.1. Figure of Merit for Implanted Spike Detection Algorithms

#### 2.2. Generation of Neural Signals

^{2}, with 10% active neurons firing at 100 Hz. The entire record is 30,000 samples, corresponding to a 3 s duration for a total of 299 spikes. The synthetic dataset representing the noiseless electrical activity of the neural network is initially generated. Then, thermal noise is added to the dataset to allow for observations of the accuracy at different SNR levels. From the synthetic dataset, 10 datasets were obtained by adding the thermal noise at 21 different SNR levels (from −10 to 10 dB). Each algorithm was tested on all datasets and the results for each SNR level were averaged.

#### 2.3. Spike Detection Algorithms

#### 2.3.1. Threshold Crossing

#### 2.3.2. Correlation Algorithm

#### 2.3.3. SNEO

## 3. Results

#### 3.1. Algorithm Accuracy

#### 3.2. Resource Consumption

## 4. Discussion

## 5. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## References

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**Figure 1.**(

**a**) A simulated extracellular spike template. (

**b**) Spike template with noise at 3 dB signal-to-noise ratio (SNR).

**Figure 2.**(

**a**) Fifty milliseconds of extracellular simulated activity without noise on a single channel of a pyramidal neuron generated by Neurocube. (

**b**) Noisy dataset created from the noiseless template adding white noise to achieve an SNR of 3 dB.

**Figure 3.**Threshold crossing block diagram. STD represents the signal standard deviation calculation, while ThMult is the constant by which the standard deviation is multiplied to find the comparison threshold.

**Figure 5.**Correlation algorithm block diagram. Mem block defines a memory containing the last three samples for each channel, STD block computes the standard deviation of the square of the signal, and ThMult is the threshold used for the output comparison.

**Figure 6.**Correlation algorithm accuracy with a temporal summation of two and three samples and without summation (N = 1), where N is the number of summed samples.

**Figure 7.**Smoothed nonlinear energy operator (SNEO) blocks diagram. Mem contains the last 2 × k + 1 samples, and STD block and ThMult are used to estimate the threshold for an SNEO detection.

**Figure 9.**Algorithm accuracy (averaged) at different SNR levels. The red vertical line corresponds to 3 dB. Threshold crossing has a threshold of 2∙σ, the correlation algorithm averages three samples in time and the SNEO has a $k$ parameter of 2.

**Figure 10.**Figure of merit (FoM) of algorithms, ratio of accuracy at 3 dB of SNR and logic gates required for implementation with different width of samples bits.

**Figure 11.**FoM of algorithms, ratio of accuracy and logic gates required for 8-bit implementation at different SNR levels.

Filter | Standard Deviation | Threshold Crossing | Correlation Algorithm | SNEO | |
---|---|---|---|---|---|

Adder | 4 | 1 + 1 ^{1} | 6 | 20 ^{1} | 1 + 6 ^{1} + (4 k) ^{2} |

Multiplicator | 5 | 1 | 2 * | 3 + 2 * | 2 + (4 k + 1) ^{1} + 2 * |

Comparator | 0 | 1 | 1 | 1 ^{2} | 1 ^{2} |

Divisor | 0 | 0 | 0 | 7 | 0 |

Register | 4 ^{1} | 1 ^{1} | 0 | 21 ^{1} | 2 k + (4 k + 1) ^{1} |

STD | 0 | - | 1 | 7 | 1 |

Weighted Total | 254 N + 30 N ^{2} | 121 N + 6 N ^{2} | 235 N + 6 N ^{2} + STD | 995 N+42 N ^{2} + 7 * STD | 557 N + 602 kN + 36 N ^{2} + 48 kN ^{2} + STD ^{1} |

5-bit, k = 2 | 2020 | 755 | 2080 | 11,310 | 13,615 |

8-bit, k = 4 | 3952 | 1352 | 3616 | 20,112 | 25,240 |

^{1}the operation occurs after a multiplication and it is weighted as $2N$.

^{2}the operation occurs after two multiplications and it is weighted as $4N$. * one is for the threshold computation; one is to avoid the STD square root.

Threshold Crossing | Correlation Algorithm | SNEO | |
---|---|---|---|

True Positive (%) | 73 | 93 | 96 |

False Positive (%) | 4 | 1 | 2 |

Accuracy (%) | 70 | 93 | 95 |

Resources (8 bit) | 3616 | 20,320 | 41,016 |

FoM (3 dB) | 0.40 | 0.12 | 0.10 |

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**MDPI and ACS Style**

Tambaro, M.; Vallicelli, E.A.; Saggese, G.; Strollo, A.; Baschirotto, A.; Vassanelli, S.
Evaluation of In Vivo Spike Detection Algorithms for Implantable MTA Brain—Silicon Interfaces. *J. Low Power Electron. Appl.* **2020**, *10*, 26.
https://doi.org/10.3390/jlpea10030026

**AMA Style**

Tambaro M, Vallicelli EA, Saggese G, Strollo A, Baschirotto A, Vassanelli S.
Evaluation of In Vivo Spike Detection Algorithms for Implantable MTA Brain—Silicon Interfaces. *Journal of Low Power Electronics and Applications*. 2020; 10(3):26.
https://doi.org/10.3390/jlpea10030026

**Chicago/Turabian Style**

Tambaro, Mattia, Elia Arturo Vallicelli, Gerardo Saggese, Antonio Strollo, Andrea Baschirotto, and Stefano Vassanelli.
2020. "Evaluation of In Vivo Spike Detection Algorithms for Implantable MTA Brain—Silicon Interfaces" *Journal of Low Power Electronics and Applications* 10, no. 3: 26.
https://doi.org/10.3390/jlpea10030026