Physico-Chemical Origins of Electrical Characteristics and Instabilities in Solution-Processed ZnSnO Thin-Film Transistors

Abstract

We investigate the physico-chemical origins that determine the transistor characteristics and stabilities in sol-gel processed zinc tin oxide (ZTO) thin-film transistors (TFTs). ZTO solutions with Sn/(Sn+Zn) molar ratios from 0.3 to 0.6 were synthesized to demonstrate the underlying mechanism of the electrical characteristics and bias-induced instabilities. As the Sn/(Sn+Zn) ratio of ZTO is increased, the threshold voltage of the ZTO TFTs negatively shifts owing to the gradual increase in the ratio of oxygen vacancies. The ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 exhibit highest saturation mobility of 1.56 cm²/Vs lowest subthreshold swing and hysteresis of 0.44 V/dec and 0.29 V, respectively, due to the desirable atomic states of ZTO thin film. Furthermore, these also exhibit outstanding positive bias stability due to the low trap density at the semiconductor-dielectric interface. On the other hand, the negative bias stress-induced instability gradually increases as the proportion of tin increases because the negative bias stress instability originates from the ionization of oxygen vacancies. These results will contribute to the optimization of the composition ratio in rare-metal-free oxide semiconductors for next-generation low-cost electronics.

1. Introduction

Recently, oxide thin-film transistors (TFTs) have been considered as one of the most desirable unit devices for various electronic applications, including organic light-emitting diode (OLED) displays, owing to their advantages of low leakage current, high optical transparency, and high flexibility [1,2,3]. In particular, amorphous oxide semiconductors (AOS) have been commercialized because of their effective charge transport characteristics, although those have an amorphous phase compared to amorphous silicon semiconductors. Effective electron transport of the AOS could be achieved because of the overlap of the internal spherically symmetric metal s-orbitals, achieving high electron mobility [4,5,6,7,8]. Among many AOS materials, indium gallium zinc oxide is the representative oxide semiconductor for TFT channel layers [9,10,11,12,13]. Unfortunately, indium and gallium are relatively expensive rare metals; therefore, those are not cost-effective [14,15]. Accordingly, many researchers have attempted to find a cheap alternative metal component for oxide TFTs [15]. For example, zinc tin oxide (ZTO) has been studied as a newly emerging amorphous oxide semiconductor owing to its potential to achieve high mobility and an amorphous phase despite the absence of rare metal [16].

Along with the electrical characteristics of TFTs, their bias stability is one of the most important factors for practical electronic applications. The bias stability determines the lifespan of a device [17]. The deposition of an oxide thin film through sputtering, a physical vapor deposition (PVD) method, is currently the most widely used method owing to the outstanding electrical characteristics and bias stability of sputtered AOS TFTs [18]. Despite these merits, PVD has distinct limitations in terms of scalability and productivity because a high vacuum is required for thin-film deposition. In contrast, solution-processing techniques have advantages, such as low-cost fabrication, high-throughput, and simplicity [19]. However, the electrical stability of TFTs fabricated by solution processing methods is inferior to those fabricated by PVD methods [20]. Therefore, in-depth studies to improve the electrical properties and bias instability of sol-gel processed ZTO TFTs are required to realize next-generation electronic applications.

In this study, physico-chemical origins that affect the operational properties and bias instabilities of solution-processed ZTO TFTs were demonstrated by modulating the metal composition ratio. The Sn/(Sn+Zn) ratio was controlled from 0.3 to 0.6 by using a chloride precursor. Atomic bonding states according to composition ratio were examined through X-ray photoelectron spectroscopy (XPS). In addition, the physical morphology of ZTO semiconductors with respect to various Sn/(Sn+Zn) ratios was investigated using atomic force microscopy (AFM). The influence of the composition ratio on the electrical characteristics was demonstrated based on the physico-chemical analysis of ZTO thin films. The ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 exhibited outstanding electrical properties with the highest saturation mobility (μ_sat) of 1.56 cm²/Vs. Furthermore, the positive- and negative-bias stress-induced instabilities were investigated for high-performance and stable solution-processed rare-metal-free oxide TFTs.

2. Materials and Methods

ZTO solutions of 0.17 M with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6 were synthesized by dissolving zinc (II) chloride hydrate (ZnCl₂·2H₂O; Sigma-Aldrich, Saint Louis, MO, USA) and tin chloride hydrate (SnCl₂·H₂O; Sigma-Aldrich, Saint Louis, MO, USA) in 2-methoxyethanol (CH₃OCH₂CH₂OH; Sigma-Aldrich, Saint Louis, MO, USA). The solutions were sonicated for 1200 s at room temperature to obtain homogeneous and clear solutions. Figure 1 depicts the device structure of the solution-processed ZTO TFTs used in this study. Wafers with heavily doped Si and thermally grown SiO₂ were used as the gate electrode and insulator, respectively. The Si/SiO₂ wafers were cleaned in acetone, isopropanol, and deionized water for 10 min each by using ultrasonication. The cleaned substrates were blown with nitrogen and heated at 120 °C for 10 min to completely dry and remove moisture. Next, ultraviolet ozone was irradiated on the SiO₂ surface for 30 min to generate a hydrophilic surface. The prepared ZTO solution was deposited onto the substrate at 3000 rpm by using spin coating. The deposited ZTO semiconductor thin films were pre-annealed at 120 °C for 30 min for solidification. Pre-annealing is a stage to form a solidified thin film by evaporating the solvent in the ZTO solution. When the pre-annealing temperature is too high, the roughness of the thin film is degraded, and pinholes or pore sites are formed, which can result in deterioration of electrical characteristics and bias stability [21]. Thus, we have optimized the pre-annealing temperature through our previous study [21]. After pre-annealing, the ZTO-deposited Si/SiO₂ wafers were annealed at 500 °C in air for 1 h in a tube furnace. Post-annealing activates the semiconductor by inducing condensation and densification of the thin film [3]. The annealing temperature differs depending on the precursor, metal cation, and solvent. The desirable annealing temperature for ZTO TFTs used in this study was obtained through the study of reported articles and our TFT experiments [3,14,15,21]. For the source and drain electrodes, 50 nm-thick aluminum was deposited on the ZTO semiconductors using a thermal evaporator. The channel length (L) and width (W) of the ZTO TFTs were 100 and 1000 μm, respectively. Finally, the fabricated ZTO TFTs were placed in a low-pressure thermal desiccator for 1 h. The low-pressure thermal treatment induces hydrophobic surface and densification of the thin film. Thus, this process improves the switching characteristics of solution-processed ZTO TFTs. XPS (Thermo Fisher Scientific, Waltham, MA, USA) was used to demonstrate the atomic bonding states of the semiconductor thin films. Non-contact-mode AFM (NX20, Park Systems, Suwon-si, Korea) was used to investigate the surface roughness and morphological characteristics of the ZTO. Electrical characteristics and bias stability were measured at about 25 °C in a dark chamber to eliminate the effects of light on devices.

3. Results and Discussion

The atomic binding states of ZTO semiconductors with various Sn/(Sn+Zn) molar ratios were analyzed to understand the impacts of the metal composition ratio on the chemical characteristics of the ZTO thin films. Figure 2a–d show the XPS analysis of the ZTO thin films with Sn/(Sn+Zn) molar ratios of 0.3, 0.4, 0.5, and 0.6, respectively. The O 1s spectra were deconvoluted into three peaks to evaluate the chemical changes. The three peaks at 530.3, 531.0, and 531.9 eV represent metal oxide (M–O) bonds, oxygen vacancies (V_O), and metal hydroxyl (M–OH), respectively [22,23]. The M–O ratios of the ZTO thin films with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6 are 60.04%, 63.18%, 59.98%, and 50.98%, respectively. The M–O intensity of the ZTO with a ratio of 0.4 is the highest compared to others. In addition, the M–O intensity significantly decreased when the ratio reduced to 0.6. This indicates that the carrier transport paths of ZTO could be well organized at a ratio of 0.3, because electrons are mainly transported through M–O [24,25]. Moreover, V_o increased with increasing Sn ratio. The V_o ratio increased from 26.39% to 32.82% as the composition ratio increased from 0.3 to 0.6. Generally, V_o generates free electrons in oxide semiconductors [26]. Thus, this result indicates that an increase in the Sn ratio in ZTO semiconductors contributes to an increase in electron concentration. The M–OH contents of the ZTO films with ratios of 0.3, 0.4, 0.5, and 0.6 are 13.7%, 7.73%, 10.0%, and 16.0%, respectively. When the composition ratio was 0.4, the lowest M–OH ratio was obtained in the ZTO film. M–OH can act as an acceptor-like defect in oxide semiconductors [27]; thus, the control and minimization of M–OH should be considered in the fabrication of oxide semiconductors for obtaining highly stable oxide TFTs.

The physical morphology and roughness properties of ZTO thin films according to composition ratio was examined by using AFM analysis. The AFM images of the semiconductors with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6 are shown in Figure 3a–d, respectively. The film roughness of the ZTO semiconductors with the ratios of 0.3, 0.4, 0.5, and 0.6 were 157.6, 104.9, 140.4, and 138.56 pm, respectively. The ZTO thin film with a ratio of 0.4 exhibited the lowest surface roughness compared to ZTO thin films with other composition ratios. Considering the atomic bonding states captured in the XPS analysis and surface roughness depicted in the AFM analysis, a composition ratio of 0.4 is determined to be the most optimized composition ratio, which could yield desirable physico-chemical properties in ZTO TFTs [28,29,30].

Bottom-gate top-contact structure ZTO TFTs were fabricated to evaluate their electrical characteristics and stabilities. Figure 4a–d show the transfer characteristics of the ZTO TFTs with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6, respectively. The black and red lines indicate the transfer characteristic curves with forward and backward sweeps, respectively. A drain voltage (V_D) of 40 V was applied to obtain the transfer characteristic curves. μ_sat is extracted using the following equation:

$${\mathsf{\mu }}_{\mathrm{sat}}=\frac{2\mathrm{L}}{{\mathrm{WC}}_{\mathrm{i}}}•\left(\frac{\partial \sqrt{{\mathrm{I}}_{\mathrm{D},\mathrm{sat}}}}{\partial {\mathrm{V}}_{\mathrm{G}}}\right)2$$

(1)

where C_i, V_G, and I_D,sat are the dielectric capacitance per unit area, gate voltage, and drain current in saturation region, respectively. The μ_sat values of the ZTO TFTs with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6 are 0.31, 1.56, 1.38, and 0.58 cm²/Vs_, respectively. This might be attributed to the high M-O ratio of the ZTO semiconductors with a ratio of 0.4, as shown in Figure 2b. In addition, the lowest subthreshold swing (SS) of 0.44 V/dec and hysteresis of 0.29 V are obtained in the ZTO TFTs with a ratio of 0.4. The M-OH bonding could act as trap sites for free electrons, thereby yielding high SS and clockwise hysteresis in TFTs [31]. In this regard, it is reasonable to interpret that the lowest SS and hysteresis characteristics of the ZTO TFTs with a ratio of 0.4 originate from the low M-OH and high M-O content in ZTO films with a ratio of 0.4. Furthermore, the trap density at the gate dielectric-semiconductor interface can be evaluated using the following equation [32]:

$${\mathrm{N}}_{\mathrm{T}}=\left[\frac{\mathrm{SSlog}\left(\mathrm{e}\right)}{\frac{\mathrm{kT}}{\mathrm{q}}}-1\right]\frac{{\mathrm{C}}_{\mathrm{i}}}{\mathrm{q}}$$

(2)

where q, k, T, and N_T are the electron charge, dielectric constant, temperature, and total trap density, respectively. Based on Equation (2), the high SS value of a device implies that it has inferior dielectric-semiconductor interface characteristics with a high electron trap density. Clockwise hysteresis is generally induced by electron trapping at the gate dielectric-semiconductor interface at a positive gate bias [33]. Thus, the good interface property of ZTO TFTs with a ratio of 0.4 also contribute toward achieving the outstanding electrical characteristics, such as high μ_sat, low SS, and clockwise hysteresis. In addition, it is known that the Zn atom can act as an acceptor at the ZTO thin film with a high Sn/(Sn+Zn) ratio because Zn atom play a role as impurity which can substitute for the Sn site [34]. This is a reasonable inference consistent with the electrical characteristic results, especially SS and μ_sat of ZTO TFTs with high Sn/(Sn+Zn) ratio, of our study. Meanwhile, the V_th of ZTO TFTs is negatively shifted with an increase in Sn concentration. This is because V_o increases as the Sn concentration ratio increases, as depicted in Figure 2, which results in an increase in the carrier concentration. The high carrier concentration of ZTO semiconductors induces easy accumulation even at low V_G. Figure 4e–h plots the tendencies of μ_sat, V_th, SS, and hysteresis of the ZTO TFTs as a function of the composition ratio, respectively. This result indicates that the Sn/(Sn+Zn) ratio of 0.4 is the optimal composition ratio for obtaining high-mobility and stable oxide TFTs with desirable switching characteristics.

The bias stability of TFTs is a crucial factor in practical TFT-based electronic device applications [35]. The positive gate bias stress (PBS)-induced instability of solution-processed ZTO TFTs according to the Sn/(Sn+Zn) ratio was investigated. Figure 5a–d plots the transfer characteristics as a function of PBS for solution-processed ZTO TFTs with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6, respectively. The PBS test was performed for 1000 s at V_G = 20 V and V_D = 0 V. The ∆V_th values of ZTO TFTs with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6 are 12.12, 4.24, 8.71, and 9.88 V, respectively. The lowest V_th shift due to PBS in TFTs with a ratio of 0.4 is attributed to the low trap density at the dielectric-semiconductor interface. As described in Figure 4 and Equation (2), ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 have the lowest interface trap density. The interface traps might originate from the high ratio of M-OH acceptor-like traps owing to the non-optimal composition ratio [36]. Under a positive gate bias, some of the accumulated carriers could be trapped at the interface trap states or injected into the gate dielectric owing to the vertical electric field. Because the same thermally grown SiO₂ was used as the gate dielectric in this study for all TFTs, the difference in the PBS-induced instability in ZTO TFTs with various Sn/(Sn+Zn) ratios mainly originates from the differences in the gate dielectric-semiconductor interface characteristics. In addition, the V_th of the ZTO TFTs is positively shifted without a change in SS, regardless of the Sn/(Sn+Zn) ratio. This phenomenon suggests that the PBS-induced instability in this study is due to the electron trapping at the interface and injection to gate dielectric, rather than defect creation models [37].

Figure 6a–d depicts transfer characteristics as a function of negative bias stress (NBS) time for ZTO TFTs with Sn/(Sn+Zn) ratios of 0.3, 0.4, 0.5, and 0.6, respectively. In the NBS test conducted on ZTO TFTs, V_G = −20 V and V_D = 0 V were applied for 1000 s. As the NBS time increases, the V_th shifts in the negative direction regardless of Sn/(Sn+Zn) ratio. In particular, as the concentration ratio increases, the negative shift caused by NBS tends to increase. Unlike that observed under PBS conditions, electrons do not accumulate under NBS conditions; thus, they cannot be trapped at the gate dielectric-semiconductor interface or injected into the gate dielectric. The negative V_th shift could be basically caused by hole trapping at the interface [38]. However, hole trapping at the dielectric-semiconductor interface due to NBS is not a reasonable mechanism to explain the instability if SS of oxide TFTs increases under conditions such as NBS or negative bias illumination stress. In this case, the shift in V_th due to NBS originates from the ionization of V_o. When the fermi level of the ZTO approaches the valance band maximum due to a strong negative gate bias, the V_o formation energy increases, while the V_o²⁺ formation energy decreases [39,40]. Therefore, under NBS conditions, V_o could generate two free electrons and be easily ionized into V_o²⁺ [40]. Considering the XPS result depicted in Figure 2, V_th shift in ZTO TFTs is assumed to originate owing to the double ionization of V_o. The increase in Sn/(Sn+Zn) ratio induces a V_o increase, so that the ZTO TFTs with high Sn/(Sn+Zn) ratios show dramatic V_th shift in the negative direction. This result suggests that understanding the effect of composition ratio and its optimization is essential to achieve the desirable V_th and negative bias stability of sol-gel processed ZTO TFTs.

4. Conclusions

In summary, the physico-chemical origins, electrical characteristics, and bias stress-induced instability of solution-processed ZTO TFTs were investigated by controlling the metal composition ratio. The change in the Sn/(Sn+Zn) ratio in the ZTO semiconductor induces a considerable change in the microstructure, thereby affecting the electrical properties and operational stability of ZTO TFTs. An optimal ZTO thin film was obtained at an Sn/(Sn+Zn) ratio of 0.4. XPS analysis confirmed that the ZTO thin film with an Sn/(Sn+Zn) ratio of 0.4 attained the highest M-O and lowest M-OH ratios of 63.18% and 7.73%, respectively. Consequently, solution-processed ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 exhibited the highest μ_sat and SS of 1.56 cm²/Vs and 0.44 V/dec, respectively. Furthermore, ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 exhibited the highest stability under PBS owing to the good dielectric-semiconductor interface property and low M-OH ratio of the ZTO semiconductor. In addition, the NBS-induced instability of ZTO TFTs with an Sn/(Sn+Zn) ratio of 0.4 was not significant compared to those observed ratios of 0.5 and 0.6 owing to the lower V_o ratio. In short, this study contributes to the optimization of the compositional ratio for manufacturing high-performance and stable solution-processed oxide TFTs.