Characteristics of MgIn₂O₄ Thin Film Transistors Enhanced by Introducing an MgO Buffer Layer

Abstract

In this work, an MgIn₂O₄ (MIO) thin film transistor (TFT) with a bottom gate structure was fabricated. The MIO channel layer was deposited by RF sputtering using a single MgIn₂O₄ target. The performance of MIO TFT was highly related to oxygen vacancies. As-deposited MIO TFT showed a low field-effect mobility due to doping of Mg. An MgO buffer layer was introduced to enhance the mobility of MIO TFT due to improvement of the interface with the channel layer. In addition, oxygen vacancies in the MIO channel were suppressed because of oxygen diffusion from the buffer layer. MIO TFT with a 5 nm MgO buffer layer showed an on/off current ratio of 9.68 × 10³, a field-effect mobility of 4.81 cm²/V∙s, which was increased more than an order of magnitude compared with the device without a buffer layer, a threshold voltage of 2.01 V, and a subthreshold swing of 0.76 V/decade, which was improved more than 20% compared with the as-deposited one.

1. Introduction

Amorphous oxide semiconductor-based thin-film transistors (AOS-TFTs), mostly represented by amorphous InGaZnO TFTs, have triggered intensive research due to the great potential for large-area electronics devices, including active-matrix liquid crystal displays (AMLCDs) and active-matrix organic light-emitting diodes (AMOLEDs), thanks to their advantages of high field-effect mobility, low process temperature, low-cost process, and optical transparency [1,2,3,4,5]. As for amorphous InGaZnO TFT (a-IGZO TFT), indium ion (In³⁺) makes an important contribution to the distinct field-effect mobility, which is attributed to its particular electronic configuration of (n–1) d10 ns0, where n is the principal quantum [6]. However, reducing the background carrier concentration of indium oxide is necessary in order to use it as the active layer of TFTs for the sake of achieving a higher on/off current ratio [7]. Accordingly, the method of doping other metal elements with higher metal-oxygen bond dissociation energy than indium oxide has been investigated. The gallium (Ga)-oxygen bond dissociation energy (~374 kJ/mol) is higher than the indium-oxygen bond dissociation energy (~346 kJ/mol). As a consequence, doping Ga is an appropriate method to suppress the oxygen vacancies, therefore resulting in the carrier density being decreased in the active layer [8]. Compared to Ga³⁺ (0.62 Å), magnesium ion (Mg²⁺) exhibits a more similar ionic radius (0.72 Å) to that of In³⁺ (0.80 Å) in addition to a comparable magnesium-oxygen bond dissociation energy (~358.2 kJ/mol) [9].

Although other metals reported in the previous research present even higher metal-oxygen bond dissociation energy, e.g., La–O (~798 kJ/mol), Hf–O (~801 kJ/mol), Sc–O (~671.4 kJ/mol), and Sr–O (~426.3 kJ/mol), Mg is an abundant element in the Earth’s crust. In terms of quantity, the mass percentage of Mg is 2.3%, which is much greater than that of Zn (75 ppm), La (32 ppm), Ga (18 ppm), Sc (16 ppm), and Hf (5.3 ppm) [10,11]. Moreover, even though ZnO also contributes to the high mobility of IGZO TFT, ZnO based oxide suffers from the instability drawback due to the existence of intrinsic defects, including oxygen vacancies and interstitial zinc atoms, in the film. This shortcoming means that promoting the stability of IGZO TFTs is still an issue [12,13]. As a result, merging magnesium oxide (MgO) with In₂O₃, and without the doping of ZnO, is a potential method to be applied as the active layer of TFTs. In this work, an MgIn₂O₄ (MIO) thin-film transistor was deposited by using an MIO target and the radio-frequency (RF) sputtering system. The electric characteristics of the fabricated devices with different thicknesses of MIO thin films deposited under various atmospheres were investigated.

To improve the low mobility of MIO TFTs, homogeneous MgO material was utilized as a buffer layer to enhance interface quality. So far, extensive research has reported the introduction of high-κ insulators, such as Al₂O₃ [14], ZrO₂ [15], and HfO₂ [16], in order to realize the competitive performance of oxide semiconductor TFTs. These high-κ materials can increase the capacitive coupling between the gate and the channel layer. Likewise, MgO has also been applied as a high-κ dielectric layer for gate insulator due to its high energy bandgap (~7.9 eV) and compromised dielectric constant of about 9.8 [17]. Those previous studies usually utilized atom layer deposition (ALD) or spin coating to grow insulators with proper thicknesses. However, ALD requires a lot of time the temperature in the chamber to be increased for preparation of the deposition of a dielectric film of high quality. Furthermore, it takes a lot of time to grow the film so as to reach the desired thickness. On the other hand, films grown by spin coating also require post-annealing at high temperatures for a long time. Therefore, some researchers have introduced deposition of the MgO insulator by RF sputtering. Nevertheless, owing to the great tolerance to ion bombardment of MgO, it is very time-consuming to deposit an MgO insulator with proper thickness at room temperature by using RF sputtering [18]. Moreover, other researchers have reported deposition of an MgO buffer layer between the SiO₂ dielectric layer and the MgZnO channel layer by plasma-assisted molecular beam epitaxy at a temperature of 520 °C to enhance the performance of prepared TFTs [19]. In this work is demonstrated the introduction of an MgO buffer layer deposited by the RF sputter system at room temperature. The sputtering time is reduced considerably due to the low thickness of the MgO buffer layer. In addition, mobility and the subthreshold swing of the MIO TFT are improved greatly thanks to the MgO buffer layer.

2. Materials and Methods

Figure 1a shows the schematic diagram of the MIO TFT. In the beginning, the quartz substrates were put into an ultrasonic oscillator and sequentially cleaned by acetone, isopropyl alcohol, and deionized water following by drying with nitrogen flow. Second, the 70 nm-thick Al gate electrode was deposited onto the quartz substrates through a shadow mask by thermal evaporation. Third, the 200 nm-thick SiO₂ dielectric layer was then grown by PECVD at a temperature of 300 °C. An MIO channel layer was then deposited by RF sputtering system using an MIO target (purity 99.95%). During the sputtering process, the RF power was kept at 80 W, the chamber pressure was set at 5 mTorr, and the holder was rotated at a speed of 15 rotations per minute. The total flow rate of introduced gases, inclusive of oxygen and argon, was fixed at 50 sccm. To observe the effect of processing atmosphere, the oxygen partial pressure, which is defined as O₂/(O₂ + Ar), was set as 0%, 2%, and 4%, respectively. Eventually, the 70 nm-thick Al source/drain electrodes were deposited through a shadow mask by thermal evaporation. The aspect ratio of the device was defined as W/L, in which the gate length (L) and gate width (W) were 100 μm and 1000 μm, respectively.

Figure 1b displays the schematic diagram of the MIO TFT with a buffer layer. The fabrication process of the MIO TFT with an MgO buffer layer was same as described above, except an MgO buffer with a thickness of 5 or 10 nm was deposited before the MIO channel layer. The sputtered MgO layer was deposited by a single target of MgO (purity 99.95%), and the oxygen partial pressure was fixed at 20%. Since the carrier suppression results from the MgO buffer layer were so effective, the oxygen partial pressure of the MIO channel layer was set at 0%, and the thickness was fixed at 50 nm so as to keep the on/off characteristics comparable to the as-deposited MIO TFT.

The crystalline phase of the deposited MIO thin films was explored by utilizing a grazing incidence angle X-ray diffractometer (D8 Discover, Bruker AXS Gmbh, Karlsruhe, Germany) with a 1° incident angle and Cu Kα (λ = 1.54184 Å) radiation from an X-ray tube source operated at 40 kV and 40 mA with the 2θ sweep step set to 1 sec/0.05 degree. The oxygen vacancies in the MIO thin films were characterized by an X-ray photoelectron spectroscopy (PHI 5000 VersaProbe, ULVAC-PHI, Chigasaki, Japan). A transmission electron microscope (JEM-2100F Electron Microscope, JEOL, Tokyo, Japan) was used so as to verify the elemental composition of the MIO thin films and the thickness of deposited films of the prepared devices. The current–voltage (I–V) characteristics of the prepared MIO TFTs were measured at room temperature by using an Agilent B1500A semiconductor parameter analyzer.

3. Results and Discussions

The XRD spectra of as-deposited 150-nm-thick MIO thin films with different oxygen partial pressures are shown in Figure 2. The slightly broad peak in the spectrum around 21.8° was due to the quartz substrate [20]. There were no remarkable peaks relevant to MgO, In₂O₃, and MIO, indicating those thin films are all amorphous regardless of varied oxygen flow ratios.

The oxygen vacancies in the 150-nm-thick MIO thin films were verified by XPS analysis. It is known that conductive carriers in the n-type oxide semiconductors originate from donor defects such as interstitial, substituted cations, or oxygen vacancies [21]. Oxygen vacancies are an essential issue that not only affects the carrier concentration of materials but also the stability of devices [22,23]. Figure 3 exhibits the O_1s binding energy spectra of MIO thin films with different oxygen flow ratios, and the measured O_1s peaks were de-convoluted into three components by utilizing Gaussian fitting carefully. The lowest-binding energy peak (O_I) approximately centered at 529.6 eV originated from bonds between metal and oxygen atoms. The medium-binding energy peak (O_II) centered at about 531.5 eV is related to oxygen ions in the oxygen-deficient regions in the oxide thin film, indicating the presence of oxygen vacancies. The highest-binding energy peak (O_III) was attributed to weakly bound oxygen contamination, such as absorbed CO_x or H₂O on the surface of thin films [18,24,25]. The amounts of oxygen vacancies were compared between each MIO thin film by calculating the oxygen deficiency ratio, defined as the area under the O_II curve divided by the total area, and the results are displayed in Figure 3d. It was observed that the oxygen vacancies reduced monotonically as the oxygen flow ratio increased. The oxygen tended to fill up the oxygen deficiency regions in the MIO thin films when introducing oxygen flow to the chamber during the sputtering process, resulting in fewer oxygen vacancies. This effect was even more evident when the oxygen flow further increased, as shown in the results of the XPS analysis.

The effects of adding an MgO buffer layer below the MIO thin film were also studied by XPS analysis. In order to investigate the oxygen-deficient regions in the MIO bulk, films were etched for some time before qualitative analysis. Since the films were etched in vacuum during measurement, O_I and O_II peaks were only taken into account for de-convoluted O_1s binding energy spectra of each sample. Figure 4 shows the XPS results of MIO with different thicknesses of the MgO buffer layer. It can be clearly seen that oxygen vacancies in the MIO thin films decreased as the thickness of MgO layer increase. The result can be attributed to the diffusion of oxygen ions from MgO layer to MIO layer, which further compensated the oxygen vacancies in the channel layer.

The real deposited thickness of the device structure was verified by executing TEM analysis. Figure 5a shows cross-section TEM images of an MIO TFT, consisting of a gate electrode (Al), dielectric layer (SiO₂), channel layer (MIO), and source/drain electrodes (Al). The actual thickness of the MIO thin film was close to the estimated values. The high-resolution TEM (HR-TEM) image of MIO channel layer is displayed in Figure 5b, indicating that the as-deposited MIO active layer was amorphous, which is consistent with the XRD result. Figure 5c demonstrates an MIO TFT with a 50 nm-thick MIO channel layer with an additional MgO buffer layer of 5 nm. The total thickness of the channel layer with and without the MgO buffer layer are marked in both Figure 1a,c. It is worth noting that the MIO channel layer and the MgO buffer layer had a good interface, since no obvious interface could be observed from the HR-TEM image shown in Figure 5d.

Moreover, the element composition of the MIO layer with and without an MgO buffer layer was verified by EDS analysis.

Table 1. Element composition (at.%) of MIO channel with and without the MgO buffer layer, and element composition of MgO buffer layer. N/A means we are only concerned about the amounts of Mg and O in the MgO layer.

Element	MIO without MgO Layer	MIO with 5 nm MgO	MgO Buffer Layer
Mg	11.39%	11.44%	26.84%
In	41.84%	31.44%	N/A
O	46.76%	57.12%	73.16%
Mg/In	0.27	0.36	N/A

lists the elemental composition of both samples. There existed excessive amounts of oxygen in the MgO buffer layer. After the MIO thin film was deposited, the excess of oxygen could diffuse into the above layer. As a result, the amount of oxygen in the MIO thin film increased considerably, and the oxygen vacancies were suppressed, as shown in the XPS analysis.

To observe the effect of processing conditions on the electrical performance of MIO TFTs, the oxygen-to-argon flow ratios of the introduced gas varied from 0% to 4% with a step of 2% during the sputtering process. For simplification, herein we name the fabricated TFTs with the channel layers deposited in oxygen partial pressure of 0%, 2%, and 4% as sample T1, T2, and T3, respectively.

Figure 6 shows the output characteristics (I_D–V_D) of sample T1, T2, and T3. The drain current (I_D) of each device was measured by sweeping drain voltage (V_D) from 0 to 10 V with a gate voltage (V_G) from 0 to 10 V in 2 V steps. It was obvious that all devices exhibited typical n-channel enhancement-mode transistor behavior and clear pinch-off and output current saturation. In the linear region, in other words, at low drain voltage region, drain current increased linearly with gate bias, owing to the charge density accumulation at the interface between the channel layer and dielectric layer.

The transfer characteristics (I_D–V_G) of sample T1, T2, and T3 are illustrated in Figure 6, obtained by sweeping V_G from −2 V to 10 V with V_D fixed at a bias of 8 V, and their representative parameters are summarized in

Table 2. Transfer characteristics of MIO TFTs with different oxygen-to-argon flow ratios or channel thicknesses.

MIO TFT	Oxygen Partial Pressure	MIO Thickness (nm)	VT (V)	μE (cm2/V∙s)	On/Off Ratio	SS (V/dec)	Nit (cm−2)
T1	0%	50	0.97	0.34	1.49 × 103	1.01	1.72 × 1012
T2	2%	50	1.15	0.29	8.06 × 103	0.77	1.28 × 1012
T3	4%	50	2.34	0.02	3.35 × 103	0.70	1.17 × 1012
T4	2%	30	1.54	0.23	5.88 × 104	0.61	N/A
T5	2%	20	1.69	0.23	2.15 × 104	0.59	N/A
T6	2%	10	2.52	0.06	1.52 × 104	0.46	N/A

. The threshold voltage (VT) was derived by fitting a straight line to the linear portion with maximum slop of the (I_D)^1/2 versus V_G curve and then intercepting the line to the VG-axis. The mobility (μ_E) of prepared TFTs was calculated by using the equation of the saturation region, I_D = (W/L)C_oxμ_E(V_G − V_th)². Subthreshold swing (SS) was determined from the inverse slope of the linear regime of the transfer curve and could be expressed as SS = (d(logI_D)/dV_G)⁻¹. Interface trap density (N_it) is defined as the defect existing at the interface between the dielectric layer and the channel layer, and it is calculated by the formula, N_it = ((qSSlog(e)/kT) − 1)C_ox/q.

It is clear that threshold voltage in conjunction with the oxygen flow ratios. Because oxygen vacancies, which can act as electron donors, can provide free electron carriers in the channel layer [26]. On the other hand, field-effect mobility (μ_E) exhibits an opposite tendency, since mobility can be increased with increased electron carrier density in oxide semiconductors [27]. All samples possessed a relatively low mobility, which is in good agreement with the reported values of MIO TFTs [28]. Although indium oxide-based TFTs usually show good mobility, doping with Mg would degrade the mobility on account of the decreased oxygen vacancies [29]. Moreover, since suppressing oxygen vacancies resulted in less bulk defect and interface trap density (Nit) in the channel layer, sample T3 showed the lowest SS. The trap density of each sample was also estimated, and sample T3 indeed possessed the lowest trap density. Additionally, sample T1 showed a lower on/off ratio due to a higher off current because of more oxygen vacancies. Moreover, sample T3 presented a lower on/off ratio owing to the inferior on-current, derived from the least carrier concentration. On the other hand, sample T2 exhibited a best on/off ratio of 8.06 × 10³. Therefore, sample T2 was assumed to be the superior device in this section.

The effects of different channel layer thickness on MIO TFTs with oxygen flow ratio fixed at 2% were further studied. The thickness of the channel layer was controlled by changing the sputtering duration. For the sake of simplicity, we named the TFTs with channel layer thicknesses of 50, 30, 20, and 10 nm as samples T2, T4, T5, and T6, respectively.

The output characteristics of samples T2, T4, T5, and T6 were measured in same way mentioned above, and those are illustrated in Figure 7. Likewise, all samples showed typical n-channel enhancement-mode transistor behavior as well as the evident pinch-off and drain current saturation.

Figure 7 displays the transfer characteristics of TFTs with different channel layer thicknesses, and the corresponding crucial parameters are also tabulated in Table 2. First, the threshold voltage increased when the thickness was decreased. Because there were fewer electron carriers in the channel layer, the TFT needed a higher voltage to accumulate carriers and turn on the device [7]. Second, field-effect electron mobility decreased with thickness due to a more serious scattering at the MIO/SiO₂ interface, especially for sample T6 [30]. Third, the subthreshold swing improved distinctly with decreasing thickness. Since all samples had the same MIO/SiO₂ interface, the improved SS was likely due to the lower amount of bulk trap, and thus the controlling ability of the gate was enhanced [31]. After comparison, sample T4 exhibited the best performance with a highest on/off ratio of 5.88 × 10⁴, a field-effect mobility of 0.23 cm²/V∙s, a moderate threshold voltage of 1.54 V, and a subthreshold swing of 0.61 V/decade.

Herein, the effects of different thicknesses of MgO buffer layers was studied. Figure 8 exhibits the output characteristics (I_D–V_D) of MIO TFTs with and without an MgO buffer layer, and all devices exhibited a typical n-channel enhancement-mode transistor behavior. The transfer characteristics of MIO TFTs with and without an MgO buffer layer are shown in Figure 8, and their representative parameters are summarized in

Table 3. Transfer characteristics of MIO TFTs with and without MgO buffer layer.

MgO Thickness (nm)	VT (V)	μE (cm2/V∙s)	On/Off Ratio	SS (V/dec)	Nit (cm−2)
0	0.97	0.34	1.49 × 103	1.01	1.72 × 1012
5	2.01	4.81	9.68 × 103	0.76	1.27 × 1012
10	3.06	3.32	2.58 × 103	0.69	1.14 × 1012

. In the EDS analysis section, we demonstrated that there was excessive oxygen in the MgO buffer layer, and the excessive oxygen could diffuse into the channel layer. Hence, some of the oxygen vacancies in the MIO channel layer were compensated, as evidenced in XPS analysis. As a result, the carrier concentration and bulk trap density were reduced. Therefore, threshold voltage increased in conjunction with the thickness of the MgO buffer layer. On the other hand, the subthreshold swing was enhanced notably due to the suppression of oxygen vacancies in the MIO channel. Moreover, in the TEM analysis section, we also demonstrated that the MgO buffer layer showed a good interface with the MIO channel layer. Therefore, interface scattering was also improved due to the homogeneous MgO buffer layer, which matched the channel lattice better compared to SiO₂. Hence, the mobility of MIO TFT with a 5 nm MgO buffer layer increased over ten times.

However, with a view to the MIO TFT with a 10 nm MgO buffer layer, the oxygen vacancies were suppressed even more strongly. and this degraded its mobility as well as the on/off current ratio due to severe decreases of the carrier concentration. Although its subthreshold swing was much better than that of TFT with a 5 nm MgO buffer layer, it also exhibited an undesirable higher threshold voltage. As a consequence, MIO TFT, with a 5 nm MgO buffer layer, showed the best performance with the highest on/off current ratio of 9.68 × 10³, a field-effect mobility of 4.81 cm²/V∙s, a threshold voltage of 2.01 V, and a subthreshold swing of 0.76 V/decade.

4. Conclusions

In this study, an MIO thin film transistor was fabricated on a quartz substrate by an RF sputter system under different oxygen flow ratios. The optimized parameters of the MIO TFT are oxygen flow ratio of 2% and thickness of 30 nm, which show the highest on/off ratio of 5.88×10⁴, field-effect mobility of 0.23 cm²/V∙s, a moderate threshold voltage of 1.54 V, and a subthreshold swing of 0.61 V/decade. In addition, an MIO TFT with an MgO buffer layer of 5 nm was demonstrated. The MgO buffer layer provides a good interface with the channel layer. Due to the excessive oxygen from the buffer layer, the oxygen vacancies in the MIO channel layer can be suppressed, and the mobility is then improved. As a result, MIO TFT with a 5 nm MgO buffer layer shows an on/off current ratio of 9.68 × 10³, field-effect mobility of 4.81 cm²/V∙s, a threshold voltage of 2.01 V, and a subthreshold swing of 0.76 V/decade. In conclusion, the proper material between the oxide layer and the channel layer may improve the interface and further enhance the performance.