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Improvement of the Bias Stress Stability in 2D MoS2 and WS2 Transistors with a TiO2 Interfacial Layer

Department of Advanced Material Engineering, Chungbuk National University, Chungdae-ro 1, Seowon-Gu, Cheongju, Chungbuk 28644, Korea
Department of Nanobio Materials and Electronics, GIST, 123 Cheomdan-gwagiro, Buk-gu, Gwangju 61005, Korea
Materials Center for Energy Department, Surface Technology Division, Korea Institute of Materials Science (KIMS), 797 Changwondaero, Sungsan-gu, Changwon, Gyeongnam 51508, Korea
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Nanomaterials 2019, 9(8), 1155;
Received: 11 July 2019 / Revised: 1 August 2019 / Accepted: 8 August 2019 / Published: 12 August 2019
(This article belongs to the Special Issue Preparation and Properties of 2D Materials)
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The fermi-level pinning phenomenon, which occurs at the metal–semiconductor interface, not only obstructs the achievement of high-performance field effect transistors (FETs) but also results in poor long-term stability. This paper reports on the improvement in gate-bias stress stability in two-dimensional (2D) transition metal dichalcogenide (TMD) FETs with a titanium dioxide (TiO2) interfacial layer inserted between the 2D TMDs (MoS2 or WS2) and metal electrodes. Compared to the control MoS2, the device without the TiO2 layer, the TiO2 interfacial layer deposited on 2D TMDs could lead to more effective carrier modulation by simply changing the contact metal, thereby improving the performance of the Schottky-barrier-modulated FET device. The TiO2 layer could also suppress the Fermi-level pinning phenomenon usually fixed to the metal–semiconductor interface, resulting in an improvement in transistor performance. Especially, the introduction of the TiO2 layer contributed to achieving stable device performance. Threshold voltage variation of MoS2 and WS2 FETs with the TiO2 interfacial layer was ~2 V and ~3.6 V, respectively. The theoretical result of the density function theory validated that mid-gap energy states created within the bandgap of 2D MoS2 can cause a doping effect. The simple approach of introducing a thin interfacial oxide layer offers a promising way toward the implementation of high-performance 2D TMD-based logic circuits. View Full-Text
Keywords: MoS2; WS2; interfacial layer; contact resistance; bias stress stability MoS2; WS2; interfacial layer; contact resistance; bias stress stability

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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).

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Park, W.; Pak, Y.; Jang, H.Y.; Nam, J.H.; Kim, T.H.; Oh, S.; Choi, S.M.; Kim, Y.; Cho, B. Improvement of the Bias Stress Stability in 2D MoS2 and WS2 Transistors with a TiO2 Interfacial Layer. Nanomaterials 2019, 9, 1155.

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