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Letter

Generalization of an Optical ASA Switch

Department of Applied Math, National University of Tainan, Tainan City 70005, Taiwan
Appl. Sci. 2019, 9(6), 1096; https://doi.org/10.3390/app9061096
Received: 10 January 2019 / Revised: 25 February 2019 / Accepted: 8 March 2019 / Published: 15 March 2019
(This article belongs to the Special Issue PICs for Optical Interconnects)

Abstract

An arrayed waveguide grating (AWG) is a kind of passive wavelength router, and it is the most promising technology for developing large optical switches. However, AWGs have poor scalability, and using small AWGs to construct a large switch has been done in many prior works. A novel AWG-based switch called ASA (AWG, Space switching, AWG) that does not use wavelength converters has been proposed. It can expand the switch size from N to N2 by using N × N AWGs. In this paper, we generalize the ASA switch by using only N × N AWGs, N × N space switches, and N wavelengths such that the switch size is expanded to Nt for any positive integer t. Since each port of an N × N AWG can transmit up to N wavelengths simultaneously, the total capacity of the generalized ASA switch is extended to be close to Nt+1 × the bandwidth of a wavelength channel, provided that the inputs which are located in the same port position of each input AWG are destined to distinct outputs.
Keywords: arrayed-waveguide grating (AWG); optical networks; rearrangeable nonblocking; wavelength-division-multiplexing (WDM) arrayed-waveguide grating (AWG); optical networks; rearrangeable nonblocking; wavelength-division-multiplexing (WDM)

1. Introduction

Wavelength-division-multiplexing (WDM) optical networks, in which about 100 wavelength channels can be packed into a fiber and each channel can support a data rate of up to 100 Gb/s [1], have been widely deployed. An optical cross-connect (OXC) [2,3,4] switch, involving switching in both the wavelength and the space domain [5,6,7,8], is a key component in such a network.
An arrayed waveguide grating (AWG) is a passive device that can route multiple wavelengths to different destinations simultaneously. Each input of an N × N AWG can simultaneously send N signals of different wavelengths, each destined to a different output, and the N × N AWG can forward all N2 signals without blocking [9]. The multi-wavelength capability makes such devices more attractive for constructing an OXC than other switching technologies, such as semiconductor optical amplifiers (SOAs) [10]. This capability has been exploited in many prior works [6,7,8,9,11,12,13,14,15].
However, AWGs have poor scalability due to crosstalk [16,17] and deviation of the passband center frequencies from the ITU-T (International Telecommunications Union Standardization Sector) grid [18]. Currently the size limit of a realistic AWG device is likely to be less than fifty [16,19,20], and 32 × 32 AWGs are commercially available [21]. Solving the scalability issue of AWGs has been attempted in many prior works [8,14,20,22,23,24,25]. The approach given in [22] expanded the port count from N to N2, but used 2N2 costly SOA-based tunable wavelength converters (TWCs), which consumed a substantial amount of power [10]. Another approach, which used two stages of smaller AWGs to construct a 90 × 90 AWG, was proposed in [20,23], while still another approach, given in [8,14], expanded the size of an AWG-based circuit switch from N to N2 by using TWCs. In [24], an ASA (AWG, Space switching, AWG) switch, using AWGs, space switches, and AWGs in its three stages, was proposed for packet switching. The 3-stage ASA switch expanded the size from N to N2 by using N × N AWGs but did not use any wavelength converters. Combining two techniques proposed in [20,24], an ultra-scalable AWG-based optical packet switch with a total capacity close to 4 × 1016 bps was presented in [25].
In this paper, we generalize the 3-stage ASA switch proposed in [24], and expand its switch size to Nt for any positive integer t. Note that Nt−1 × Nt−1 space switches are required for the general 3-stage Nt × Nt ASA switch architecture. Considering the scalability of space switches, we further propose a rearrangeable nonblocking (RNB) multi-stage Nt × Nt ASA switch architecture using only N × N AWGs and N × N space switches, where the RNB function can accommodate a new connection by rearranging some existing connections [26]. Since packets in a frame are routed in the network simultaneously, rearrangements are no longer required for packet switching. This leads to that rearrangeable nonblocking can usually be treated as strictly nonblocking for packet switching [26].
The rest of the paper is organized as follows: Section 2 introduces the preliminaries of the 3-stage ASA switch architecture [24]. Section 3 proposes the general 3-stage ASA switch architecture. The RNB general multi-stage ASA switch architecture is proposed in Section 4, and Section 5 concludes the discussion in this paper.

2. Preliminaries

2.1. AWG

An N × N AWG is associated with a set of N wavelengths {0, 1, …, N − 1}. A signal from input port i to output port o, using wavelength w, is denoted by [i, w, o], where w ∈ {0, 1, …, N − 1}. An AWG has different cyclic wavelength routing properties, which lead to contention-free wavelength assignments [8,23,27,28]. One cyclic wavelength routing property, a relationship among parameters i, o, and w, in an N × N AWG is given by Equation (1) [27,28]:
o = (i + w) mod N.
An AWG is a passive device. Equation (1) implies that given a wavelength w, the wavelength routing of a signal [i, w, o] in an AWG is determined and unique. Equation (1) also implies that each input of an N × N AWG can send N signals, each destined to a different output, of N different wavelengths simultaneously. Thus, an N × N AWG can send all N2 signals simultaneously without blocking. An example of the routing of nine signals in a 3 × 3 AWG is given in Figure 1.

2.2. 3-Stage ASA Switch Architecture

Figure 2a presents an AWG-based switch architecture, called a 3-stage ASA switch [24], that contains two planes, one of which is an electronic control plane and the other is an optical data plane. Each input port of a 3-stage ASA switch has separate fibers connecting the control plane and the data plane. The control plane of the 3-stage ASA switch implements scheduling first to guarantee collision-free data transmissions. Figure 2b presents the architecture of the data plane, which chooses a Clos topology and consists of three stages. The first (or third) stage consists of N N × N AWGs, and the middle stage consists of N N × N space switches, (i.e., optical crossbars). It is worth noting that N must be odd.
From the topology of the data plane of the 3-stage ASA switch (Figure 2b), we can see that the wavelength routing of the 3-stage ASA switch only depends on the wavelength routings of the N × N AWGs in the first and third stages. Thus, the theoretical foundation for determining the wavelength routing of the 3-stage ASA switch is based on the 2-stage switch made from cascading two N × N AWGs (see Figure 2c). The same as for a signal in an N × N AWG, we also use (i, w, o) to denote a signal in the 2-stage switch from input i to output o, using wavelength w. The relationship among the parameters i, o, and w in a 2-stage switch is derived in Equation (2):
o = (i + 2w) mod N.
A nonblocking switch means that each input can reach all outputs and two signals using the same wavelength do not collide at a link. However, the term 2w in Equation (2) suggests that the 2-stage switch is not always nonblocking. Specifically, some inputs in the 2-stage switch may not reach all outputs. Reference [24] proves that the 2-stage switch is nonblocking if N is odd. It is worth noting that to ensure the 2-stage switch is nonblocking, each wavelength w must be guaranteed to be uniquely determined by input i and output o. Suppose (i1, w1, o1) and (i2, w2, o2) are two signals in the 2-stage switch with o1 = o2 and i1 = i2, where o1 = (i1 + 2w1) mod N and o2 = (i2 + 2w2) mod N. This leads to 2(w1w2) mod N = 0, and the wavelength can be uniquely determined, (i.e., w1 = w2), only if N is odd.
For a 3-stage ASA switch, a two-tuple [group, member] is used to represent an input (or output) port address, where group refers to N × N AWG, member refers to the link of N × N AWG to which the input (output) port is attached, and 0 ≤ group, member ≤ N − 1 (see Figure 2b). Hence, a signal from input port [gs, ms] to output port [gd, md], using the wavelength w is represented as ([gs, ms], w, [gd, md]), where 0 ≤ gs, ms, gd, mdN − 1. According to Equation (2), the relationship among ms, md, and w satisfies Equation (3):
md = (ms + 2w) mod N,
where N is odd. Thus, member fields are used for wavelength routing in the first and third stages of the 3-stage ASA switch. In addition, group fields are used for space switching in the middle stage. Specifically, signal [[gs, ms], w, [gd, md]] is routed from the gsth input to the gdth output of the (ms + w)th space switch in the middle stage. Consequently, a 3-stage ASA switch can send a signal from each input to any output when the wavelength is correctly chosen (Equation (3)). An example is given in Figure 2b, where input [0, 0] can reach outputs [0, 0], [1, 1], and [0, 2] by using wavelengths w = 0, 2, and 1, respectively.
It is worth noting that each port can transmit N wavelengths simultaneously without blocking each other if signals from inputs with the same member field, (i.e., ms), are destined to distinct outputs. This is because signals in a 3-stage ASA switch can only collide at the same link in stage 2 [24]. The collision occurs if signals are from inputs with the same member field and to the same output (Equation (3)). Note that signals from inputs with the same member field and to the same output pass through the same link in stage 2 and use the same wavelength (Equation (3)). An example is given in Figure 2d, where inputs [0, 0] and [1, 0], which use the same member field, cannot reach output [0, 0] simultaneously because they collide at the same link in stage 2. Therefore, the 3-stage ASA switch with an odd N is nonblocking if signals from inputs with the same member field are destined to distinct outputs. Since each port of an N × N AWG can transmit up to N wavelengths simultaneously, the total capacity of a 3-stage N2 × N2 ASA switch is close to N3 × the bandwidth of a wavelength channel.

3. General 3-Stage ASA Switch Architecture

Conventionally, C(n, m, r) is used to represent a 3-stage Clos network, where each n × m (or m × n) switch in stage 1 (or stage 3) connects to all r × r switches in stage 2. Similarly, we use A(n, m, r) to denote a 3-stage ASA switch architecture, where each n × m (or m × n) AWG in stage 1 (or stage 3) connects to all r × r space switches in stage 2. Thus the 3-stage ASA switch proposed in [24] is also denoted by A(N, N, N) (see Figure 2b), where N is the number of wavelengths in the AWG.
Considering the scalability of 3-stage ASA switches, without loss of generality, we assume that the size of each space switch is of the power of N, (i.e., r = Nt−1), for any positive integer t − 1, as N × N AWGs are used. An A(N, N, Nt−1) switch is a general 3-stage Nt × Nt ASA switch architecture for any positive integer t. An example with an A(3, 3, 9) switch is given in Figure 3. The same as in a 3-stage N × N ASA switch, for each signal [[gs, ms], w, [gd, md]] in a general 3-stage Nt × Nt ASA switch, member fields are used for wavelength routing in stage 1 and stage 3, according to the relationship among ms, md, and w satisfying Equation (2). Group fields are used for space switching in stage 2, that is, signal [[gs, ms], w, [gd, md]] is switched from the gsth input to the gdth output of the (ms + w)th space switch in stage 2.
From the topology of an A(N, N, Nt−1) switch architecture, we can see that the kth space switch in the middle stage connects the kth output (or input) of each AWG in the first (or last) stage for 0 ≤ kN − 1 (Figure 3).
Theorem 1.
Assume N is odd and t is a positive integer. An A(N, N, Nt−1) switch is nonblocking if signals from inputs with the same member field are destined to distinct outputs.
Proof. 
We prove this property by showing (i) each input can reach all outputs, and (ii) two different signals using the same wavelength will not pass through the same link.
(i)
Equation (3) guarantees that each input [gs, ms] of an AWG in the first stage using N different wavelengths w can reach all outputs [gd, md] of an AWG in the last stage, if N is odd and the kth output of the AWG in the first stage connects the kth input of the AWG in the last stage [24]. Given an A(N, N, Nt−1) switch, since the kth space switch in the middle stage connects the kth output (or input) of each AWG in the first (or last) stage, it is implied that the kth output of each AWG in the first stage connects the kth input of all AWGs in the last stage through the kth space switch in the middle stage. Thus, each input can reach all outputs if it uses N different wavelengths.
(ii)
Given an A(N, N, Nt−1) switch, each link in stage 1 carries only signals from the same N × N AWG in the first stage. Recall that all the N2 signals of an N × N AWG can traverse the device simultaneously without blocking each other (Equation (1)). This implies that two different signals using the same wavelength will not pass through the same link in stage 1.
Suppose two signals from different inputs using the same wavelength are carried in a link in stage 2, (i.e., an input of an N × N AWG in the last stage). According to Equation (3), these two signals are from inputs with the same member field and will be routed to the same output of the N × N AWG in the last stage. However, this scenario cannot happen since we consider that signals from inputs with the same member field are destined to distinct outputs. Thus, two different signals using the same wavelength will not pass through the same link in stage 2. Consequently, two signals using the same wavelength do not collide at a link. □
Theorem 1 holds if signals from inputs with the same member field are destined to distinct outputs. In other words, from the proof of (ii) in Theorem 1, an A(N, N, Nt−1) switch is nonblocking if signals from inputs with the same member field do not use the same wavelength. This implies that each port in an A(N, N, Nt−1) switch cannot transmit up to N wavelengths simultaneously. Thus, the total capacity of the general 3-stage Nt × Nt ASA switch architecture is close to, but not exactly, Nt+1 × the bandwidth of a wavelength channel.
From the topology of a general 3-stage Nt × Nt ASA switch, (i.e., an A(N, N, Nt−1) switch), we can see that N Nt−1 × Nt−1 space switches are required. Considering the scalability of space switches, we propose a general multi-stage Nt × Nt ASA switch architecture using only N × N AWGs and N × N space switches in Section 4.

4. General Multi-Stage ASA Switch Architecture

4.1. Construction of a General Multi-Stage ASA Switch

Assume N is odd. A construction method for a general multi-stage Nt × Nt ASA switch architecture using only N × N AWGs and N × N space switches is proposed in this section. The method consists of three steps:
Step 1: Construct an A(N, N, Nt−1) switch (see Figure 3).
Step 2: Decompose each Nt−1 × Nt−1 space switch in the middle stage into a C(N, N, Nt−2) network if Nt−1 > N (see Figure 4).
Step 3: Continue to decompose each space switch in the middle stage until its size is reduced to N × N.
From the above construction method, each middle Nt−1 × Nt−1 space switch of the A(N, N, Nt−1) switch architecture is decomposed into an Nt−1 × Nt−1 Benes network [29]. Thus the general multi-stage Nt × Nt ASA switch architecture adopts the Nt × Nt Benes topology and consists of 2t − 1 stages numbered from 1. There are Nt−1 N × N AWGs in the first and the last stages, and Nt−1 N × N space switches in each of the middle 2t − 3 stages. An example where N = 3 and t = 2 is given in Figure 4. It is worth noting that all the paths in the A(N, N, Nt−1) switch exhibit a constant transmission delay.
Similar to the A(N, N, Nt−1) switch, for each signal [[gs, ms], w, [gd, md]] in a multi-stage Nt × Nt ASA switch, member fields are used for wavelength routing in the first and the last stages (Equation (3)). As for the space switching in the middle stages, a looping algorithm [29] is applied for signals with the same wavelength in each Nt−1 × Nt−1 Benes network.
Theorem 2.
Assume N is odd and t is a positive integer. A general multi-stage Nt × Nt ASA switch is RNB if signals from inputs with the same member field are destined to distinct outputs.
Proof. 
Recall that the general multi-stage Nt × Nt ASA switch is obtained by replacing each middle nonblocking Nt−1 × Nt−1 space switch of an A(N, N, Nt−1) architecture with an Nt−1 × Nt−1 Benes network. Since a Benes network is RNB [29] and the A(N, N, Nt−1) switch with an odd N is nonblocking, provided signals from inputs with the same member field are destined to distinct outputs (Theorem 1), then the general multi-stage Nt × Nt ASA switch with an odd N is still nonblocking, (i.e., is RNB), if signals from inputs with the same member field are destined to distinct outputs. □
Similar to the general 3-stage Nt × Nt ASA switch, the total capacity of the general multi-stage Nt × Nt ASA switch architecture is close to Nt+1 × the bandwidth of a wavelength channel, provided that signals from inputs with the same member field are destined to distinct outputs (Theorem 2). Note that the scheduler design proposed for the 3-stage ASA switch [24] is mainly based on adopting a matching algorithm to set up the maximum number of signals passing through the same AWGs in the first and last stages, provided that these signals are nonblocking to each other. Note also that many matching algorithms [17,30] can be used for the scheduler design, but choosing a matching algorithm is not discussed in [24], for it is an independent issue. Since a matching algorithm used for the 3-stage ASA switch can also be applied for the signals passing through the same AWGs in the first and last stages in the proposed RNB general multi-stage Nt × Nt ASA switch, the scheduler design of the general multi-stage Nt × Nt ASA switch is similar to that proposed in [24], and we omit it in this paper.

4.2. Evaluation Results

In this section, we discuss the power loss and the maximum number of N × N space switches used in a general multi-stage Nt × Nt ASA switch.
Recall that a general multi-stage Nt × Nt ASA switch consists of two stages of Nt−1 N × N AWGs and 2t − 3 stages of Nt−1 N × N space switches, where N is odd and t is an integer. In addition, the typical insertion loss of an AWG is 7 dB [21] if we use the conventional star-coupler structure [31] for the N × N AWGs, and the typical insertion loss of a space switch is 2 dB [32]. Thus, the total loss of the general multi-stage Nt × Nt ASA switch is around 4t + 8 (=2 × 7 + (2t − 3) × 2) dB. Note that there are (2t − 3) × Nt−1 N × N space switches used in the general multi-stage Nt × Nt ASA switch. Note also that currently 32 × 32 AWGs are commercially available [21], which implies that the reasonable maximum odd N for the general multi-stage Nt × Nt ASA switch is 31. Thus, the reasonable maximum number of N × N space switches used in the general multi-stage Nt × Nt ASA switch with odd N is (2t − 3) × 31t−1. Different values of power losses and maximum number of space switches used in a general multi-stage 31t × 31t ASA switch for 2 ≤ t ≤ 6 are given in Table 1.

5. Conclusions

A novel AWG-based switch architecture, called ASA (AWG, Space switching, AWG), was proposed in [24]. Without using wavelength converters, a 3-stage ASA switch can expand the switch size from N to N2 by using N × N AWGs. In this paper, we generalize the ASA switch, (i.e., the general multi-stage ASA switch), by using only N × N AWGs, N × N space switches, and N wavelengths such that the switch size is expanded to Nt for any positive integer t. Since each port of an N × N AWG can transmit up to N wavelengths simultaneously, the total capacity of the general multi-stage ASA switch is extended to be close to Nt+1 × the bandwidth of a wavelength channel, provided that signals from inputs with the same member field are destined to distinct outputs.

Funding

This research and the APC were funded by the Ministry of Science and Technology, Taiwan, under Contract MOST 107-2221-E-024-006.

Acknowledgments

The author would like to thank Chin-Tau Lea and Shuyue Chen of HKUST for clarifying some technical issues related to the real implementation of the ASA switch for us.

Conflicts of Interest

The authors declare no conflicts of interest.

References

  1. Salsi, M.; Koebele, C.; Tran, P.; Mardoyan, H.; Dutisseuil, E.; Renaudier, J.; Bigot-Astruc, M.; Provost, L.; Richard, S.; Sillard, P.; et al. Transmission of 96 × 100 Gb/s with 23% super-FEC overhead over 11,680km, using optical spectral engineering. In Proceedings of the 2011 Optical Fiber Communication Conference, Los Angeles, CA, USA, 6–10 March 2011. [Google Scholar]
  2. Okamoto, S.; Watanabe, A.; Sato, K.-I. Optical path cross-connect node architectures for photonic transport network. J. Lightw. Technol. 1996, 14, 1410–1422. [Google Scholar] [CrossRef]
  3. Iannone, E.; Sabella, R. Optical path technologies: A comparison among different cross-connect architectures. J. Lightw. Technol. 1996, 14, 2184–2196. [Google Scholar] [CrossRef]
  4. Marom, D.M.; Blau, M. Switching Solutions for WDM-SDM Optical Networks. IEEE Commun. Mag. 2015, 53, 60–68. [Google Scholar] [CrossRef]
  5. Cheyns, J.; Develder, C.; Breusegem, E.V.; Colle, D.; Turck, F.D.; Lagasse, P.; Pickavet, M.; Demeester, P. Clos lives on in optical packet switching. IEEE Commun. Mag. 2004, 42, 114–120. [Google Scholar] [CrossRef]
  6. Pattavina, A.; Zanzottera, R. Non-blocking WDM switches based on arrayed waveguide grating and shared wavelength conversion. In Proceedings of the IEEE INFOCOM 2006. 25th IEEE International Conference on Computer Communications, Barcelona, Spain, 23–29 April 2006. [Google Scholar]
  7. Ngo, H.Q.; Pan, D.; Qiao, C. Constructions and analyses of nonblocking WDM switches based on arrayed waveguide grating and limited wavelength conversion. IEEE Trans. Netw. 2006, 14, 205–217. [Google Scholar] [CrossRef]
  8. Ye, T.; Lee, T.T.; Hu, W. AWG-Based Non-Blocking Clos Networks. IEEE Trans. Netw. 2015, 23, 491–504. [Google Scholar] [CrossRef][Green Version]
  9. Ye, T.; Lee, T.T.; Hu, W. A study of modular AWGs for large-scale optical switching systems. J. Lightw. Technol. 2012, 30, 2125–2133. [Google Scholar] [CrossRef]
  10. Eramo, V.; Listanti, M. Power Consumption in Bufferless Optical Packet Switches in SOA Technology. J. Commun. Netw. 2009, 1, B15–B29. [Google Scholar] [CrossRef]
  11. Yin, Y.; Proietti, R.; Ye, X.; Nitta, C.; Akella, V.; Yoo, S.J.B. LIONS: An AWGR-based low latency optical switch for high-performance computing and data centers. IEEE J. Sel. Top. Quantum Electron. 2013, 19, 3600409. [Google Scholar] [CrossRef]
  12. Proietti, R.; Cao, Z.; Nitta, C.; Li, Y.; Yoo, S.J.B. A scalable, low-latency, high throughput, optical interconnect architecture based on arrayed waveguide grating routers. J. Lightw. Technol. 2015, 33, 911–920. [Google Scholar] [CrossRef]
  13. Grani, P.; Proietti, R.; Cheung, S.; Yoo, S.J.B. Flat-topology high-throughput compute node with AWGR-based optical-interconnects. J. Lightw. Technol. 2016, 34, 2959–2968. [Google Scholar] [CrossRef]
  14. Lin, B.C.; Lea, C.T. Construction of nonblocking wavelength/space switches with AWGs and WSSes. Appl. Sci. 2017, 7, 555–570. [Google Scholar] [CrossRef]
  15. Xiao, X.; Proietti, R.; Zhang, K.; Yoo, S.J.B. Experimental demonstration of flex-LIONS for reconfigurable all-to-all optical interconnects. In Proceedings of the 2018 European Conference on Optical Communication, Roma, Italy, 23–27 September 2018. [Google Scholar]
  16. Takahashi, H.; Oda, K.; Toba, H. Impact of crosstalk in an arrayed waveguide multiplexer on N × N optical interconnection. J. Lightw. Technol. 1996, 14, 1097–1105. [Google Scholar] [CrossRef]
  17. Bianco, A.; Hay, D.; Neri, F. Crosstalk-preventing scheduling in single-and two-stage AWG-based cell switches. IEEE/ACM Trans. Netw. 2010, 19, 142–155. [Google Scholar] [CrossRef]
  18. Kamei, S.; Ishii, M.; Kaneko, A.; Itoh, M. N × N cyclic frequency router with improved performance based on arrayed waveguide grating. J. Lightw. Technol. 2009, 27, 4097–4104. [Google Scholar] [CrossRef]
  19. Monnard, P.; Doerr, C.R.; Dragone, C.; Cappuzzo, M.; Laskowski, E.; Paunescu, A. Large N × N waveguide grating routers. J. Lightw. Technol. 2000, 18, 985–991. [Google Scholar]
  20. Niwa, T.; Hasegawa, H.; Sato, K.; Watanabe, T.; Takahashi, H. Large port count wavelength routing optical switch consisting of cascaded small size cyclic arrayed waveguide gratings. IEEE Photon. Technol. Lett. 2012, 24, 2027–2030. [Google Scholar] [CrossRef]
  21. N × N AWG Multiplexers and Demultiplexers Router Module (APRTE). Available online: http://www.enablence.com/media/pdfs/Datasheet_OCSD_AWG_Other_NxN_APRTE_0.pdf (accessed on 1 January 2019).
  22. Xi, K.; Kao, Y.H.; Yang, M.; Chao, H.J. Petabit Optical Switch for Data Center Networks; Technical Report; Polytechnic Institute of New York University: Brooklyn, NY, USA, September 2010. [Google Scholar]
  23. Sato, K.; Hasegawa, H.; Niwa, T.; Watanabe, T. A large scale wavelength routing optical switch for high-performance computing and data centers. IEEE Commun. Mag. 2013, 51, 46–52. [Google Scholar] [CrossRef]
  24. Lea, C.T. Scalable AWGR-based optical switch. J. Lightw. Technol. 2015, 33, 4612–4621. [Google Scholar]
  25. Chen, S.; Lea, C.T. On scalability of AWGR-based optical switches. In Proceedings of the 2016 Photonics North (PN), Quebec City, QC, Canada, 24–26 May 2016. [Google Scholar]
  26. Hwang, F. The Mathematical Theory of Nonblocking Switching Networks; World Scientific: Singapore, 2004. [Google Scholar]
  27. Ramamirtham, J.; Turner, J.; Friedman, J. Design of wavelength converting switches for optical burst switching. IEEE J. Sel. Areas Commun. 2003, 21, 1122–1132. [Google Scholar] [CrossRef][Green Version]
  28. Maier, G.; Valzasina, P.; Pattavina, A. AWG-based shuffle-exchange optical-interconnection architectures. In Proceedings of the 2011 Proceedings of 20th International Conference on Computer Communications and Networks (ICCCN), Maui, HI, USA, 31 July–4 August 2011. [Google Scholar]
  29. Benes, V.E. Mathematical Theory of Connecting Networks and Telephone Traffic; Academic: New York, NY, USA, 1965. [Google Scholar]
  30. McKeown, N. iSLIP: A scheduling algorithm for input-queued switches. IEEE Trans. Netw. 1999, 7, 188–201. [Google Scholar] [CrossRef]
  31. Web Portal of Apollo Inc. APSS Apollo Application Note on Array Waveguide Grating (AWG). 2003. Available online: https://zh.scribd.com/document/329520304/APN-APSS-AWG-pdf (accessed on 1 January 2019).
  32. High Performance RF/Microwave GaAs MMIC Switches for SPST, SPDT, SP3T, SP4T, and SP5T Switching Requirements. Available online: https://www.custommmic.com/mmic-switches/ (accessed on 1 January 2019).
Figure 1. Nine signals can pass through a 3 × 3 arrayed waveguide grating (AWG) simultaneously by using three different wavelengths {0, 1, 2}. In the notation λ w i , w refers to the wavelength and i refers to the input port number.
Figure 1. Nine signals can pass through a 3 × 3 arrayed waveguide grating (AWG) simultaneously by using three different wavelengths {0, 1, 2}. In the notation λ w i , w refers to the wavelength and i refers to the input port number.
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Figure 2. (a) The optical data path and the electronic control path of a 3-stage ASA switch. (b) The data plane of a 3-stage 9 × 9 ASA (AWG, Space switching, AWG) switch. (c) A 2-stage switch cascading two 3 × 3 AWGs. (d) Two signals ([0, 0], 0, [0, 0]) and ([1, 0], 0, [0, 0]) collide at the same link in stage 2.
Figure 2. (a) The optical data path and the electronic control path of a 3-stage ASA switch. (b) The data plane of a 3-stage 9 × 9 ASA (AWG, Space switching, AWG) switch. (c) A 2-stage switch cascading two 3 × 3 AWGs. (d) Two signals ([0, 0], 0, [0, 0]) and ([1, 0], 0, [0, 0]) collide at the same link in stage 2.
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Figure 3. An A(3, 3, 9) switch.
Figure 3. An A(3, 3, 9) switch.
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Figure 4. A general multi-stage 27 × 27 ASA switch. Each middle 9 × 9 space switch in Figure 3 is decomposed into a C(3, 3, 3) network (i.e., a 32 × 32 Benes network) within a red box.
Figure 4. A general multi-stage 27 × 27 ASA switch. Each middle 9 × 9 space switch in Figure 3 is decomposed into a C(3, 3, 3) network (i.e., a 32 × 32 Benes network) within a red box.
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Table 1. The power loss and maximum number of space switches used in a general multi-stage 31t × 31t ASA switch for different values of integer t.
Table 1. The power loss and maximum number of space switches used in a general multi-stage 31t × 31t ASA switch for different values of integer t.
t = 2t = 3t = 4t = 5t = 6
Size of multi-stage ASA312 × 312313 × 313314 × 314315 × 315316 × 316
Power loss16 dB20 dB24 dB28 dB32 dB
Maximum number of space switches312883148,9556,464,647257,662,359
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