Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis

Vahabi, Mohsen; Lyakhov, Pavel; Bahar, Ali Newaz; Otsuki, Akira; Wahid, Khan A.

doi:10.3390/app12157846

Open AccessArticle

Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis

by

Mohsen Vahabi

¹

,

Pavel Lyakhov

^2,3,*

,

Ali Newaz Bahar

⁴

,

Akira Otsuki

^5,6,7 and

Khan A. Wahid

⁸

¹

Department of Electrical Engineering, Islamic Azad University of Science and Research Tehran (Kerman) Branch, Kerman 7718184483, Iran

²

Department of Mathematical Modeling, North-Caucasus Federal University, 355017 Stavropol, Russia

³

Department of Modular Computing and Artificial Intelligence, North-Caucasus Center for Mathematical Research, 355017 Stavropol, Russia

⁴

Department of Information and Communication Technology (ICT), Mawlana Bhashani Science and Technology University, Tangail 1902, Bangladesh

⁵

Facultad de Ingeniería y Ciencias, Universidad Adolfo Ibáñez, Diagonal Las Torres 2640, Peñalolén, Santiago 7941169, Chile

⁶

Waste Science & Technology, Luleå University of Technology, SE 971 87 Luleå, Sweden

⁷

RIKEN Center for Advanced Photonics, RIKEN, Wako 351-0198, Saitama, Japan

⁸

Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, SK S7N5A9, Canada

^*

Author to whom correspondence should be addressed.

Appl. Sci. 2022, 12(15), 7846; https://doi.org/10.3390/app12157846

Submission received: 21 May 2022 / Revised: 29 July 2022 / Accepted: 2 August 2022 / Published: 4 August 2022

(This article belongs to the Section Quantum Science and Technology)

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Abstract

In very large-scale integration (VLSI) circuits, a partial of energy lost leads to information loss in irreversible computing because, in conventional combinatorial circuits, each bit of information generates heat and power consumption, thus resulting in energy dissipation. When information is lost in conventional circuits, it will not be recoverable, as a result, the circuits are provided based on the reversible logic and according to reversible gates for data retrieval. Since comparators are one of the basic building blocks in digital logic design, in which they compare two numbers, the aim of this research is to design a 1-bit comparator building block based on reversible logic and implement it in the QCA with the minimum cell consumption, less occupied area, and lower latency, as well as to design it in a single layer. The proposed 1-bit reversible comparator is denser, cost-effective, and more efficient in quantum cost, power dissipation, and the main QCA parameters than that of previous works.

Keywords: QCA; reversible logic; comparator; Feynman gate; TR gate; coplanar; quantum cost; energy dissipation

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MDPI and ACS Style

Vahabi, M.; Lyakhov, P.; Bahar, A.N.; Otsuki, A.; Wahid, K.A. Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis. Appl. Sci. 2022, 12, 7846. https://doi.org/10.3390/app12157846

AMA Style

Vahabi M, Lyakhov P, Bahar AN, Otsuki A, Wahid KA. Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis. Applied Sciences. 2022; 12(15):7846. https://doi.org/10.3390/app12157846

Chicago/Turabian Style

Vahabi, Mohsen, Pavel Lyakhov, Ali Newaz Bahar, Akira Otsuki, and Khan A. Wahid. 2022. "Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis" Applied Sciences 12, no. 15: 7846. https://doi.org/10.3390/app12157846

APA Style

Vahabi, M., Lyakhov, P., Bahar, A. N., Otsuki, A., & Wahid, K. A. (2022). Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis. Applied Sciences, 12(15), 7846. https://doi.org/10.3390/app12157846

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

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Novel Reversible Comparator Design in Quantum Dot-Cellular Automata with Power Dissipation Analysis

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