# THD Reduction of Distribution System Based on ASRFC and HVC Method for SVC under EV Charger Condition for Power Factor Improvement

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Static VAR Compensator (SVC)

#### 2.1. SVC (V-I) Characteristics

_{max}) and reactor banks (Bl

_{max}), the voltage is regulated at the reference voltage V

_{ref}. However, a voltage drop is normally used (usually between 1% and 4% of the maximum reactive power output), and the V-I characteristic curve has the slope indicated in Figure 2.

- V: Positive sequence voltage (p.u.)
- I: Reactive current (p.u./P
_{base}) (I > 0 indicates an inductive current) - X
_{s}: Slope or droop reactance (p.u./P_{base}) - Bc
_{max}: Maximum capacitive susceptance (p.u./P_{base}) with all TSCs in service, no TSR or TCR - Bl
_{max}: Maximum inductive susceptance (p.u./P_{base}) with all TSRs in service or TCRs at full conduction, no TSC - P
_{base}: Three-phase base power specified in the block dialog box

#### 2.2. SVC Dynamic Response

_{p}and integral gain K

_{i}), the droop reactance X

_{s}, and the system strength (short-circuit level). For an integral-type voltage regulator (K

_{p}= 0), if the voltage measurement time constant T

_{m}and the average time delay T

_{d}due to valve firing are neglected, the closed-loop system consisting of the SVC and the power system can be approximated by a first-order system with the following closed-loop time constant:

- T
_{c}: Closed loop time constant - K
_{i}: Proportional gain of the voltage regulator (p.u._B/p.u._V/s) - X
_{s}: Slope reactance p.u./P_{base} - X
_{n}: Equivalent power system reactance (p.u./P_{base})

_{n}values).

## 3. Analysis of EVs Connected Phase Voltage

_{A}, X

_{B}, and X

_{C}are the phasors of the unbalanced phasor system; X

_{0}, X

_{+}, and X

_{−}are the phasors of symmetrical components (zero, positive, and negative sequence, respectively); and a = 1 < 120° is a unit complex operator.

#### Unbalance Caused by EVs in the Phase Voltage

_{N}= −3.I

_{0}. When unbalanced voltage drops in phase conductors of the line are also taken into account, the line voltages at the point of common coupling will be unbalanced too.

## 4. Description of System

_{k}= 15%. The voltage drop of the regulator is 0.01 pu/100 VA (0.03 pu/300 VA). When the SVC operating point changes from fully capacitive to fully inductive, the SVC voltage varies between 1 − 0.03 = 0.97 pu and 1 + 0.01 = 1.01 pu.

## 5. Assumptions and Modeling EV Charging

#### 5.1. Specification of EVs

#### 5.2. Mathematical Models

#### Stochastic Models

#### 5.3. Modeling of Static VAR Compensator in Power System Studies

## 6. Description of ASRFC & HVC in the System

#### 6.1. Asymmetric Synchronous Reference Frame Controller

_{Nd}and V

_{Nq}are pulsating at two times the fundamental frequency under the unbalanced load, and PI controllers do not operate in a pure DC domain. Therefore, to ensure zero tracking error in this scheme, a voltage control bandwidth over 120 Hz and no delay in measuring the output voltages are required.

#### Negative-Sequence Voltage Compensator (NVC)

- v
_{cd}is the d-axis voltage in the synchronous reference frame. - v
_{cq}is the q-axis voltage in the synchronous reference frame.

#### 6.2. Asymmetric Synchronous Reference Frame Controller for SVC Connected to the Grid

_{Nderr}and V

_{Nqerr}are represented by two sinusoidal functions with arbitrary magnitude (V

_{Nderr}and V

_{Nqerr}) and phase (ϴ

_{Nd}and ϴ

_{Nq}). It is clear that if V

_{Nderr}= V

_{Nqerr}and ωt

_{Nd}= ωt

_{Nq}(i.e., balanced load conditions), negative sequence terms will not contribute to IN

_{dcmd}and IN

_{qcmd}.

#### 6.3. Asymmetric Synchronous Reference Frame Control Scheme

#### 6.4. Harmonic Voltage Compensator

_{TSC}) and three delta-connected TCR branches (L

_{TCR}). This is the simplest SVC topology and it is suitable for distribution grid applications, due to their reduced number of switching components. The SVC is fed by a three-phase three-wire voltage source through three balanced line impedances Z

_{s}= R

_{s}+ jωL

_{s}.

_{h}as:

_{a,mn}≤ t ≤ t

_{b,mn}is expressed by:

_{SVC}and L

_{s}is calculated by:

_{a,mn}≤ t ≤ t

_{b,mn}is expressed by:

_{a}and t

_{b}are the instants that delimit the conduction time interval of each TCR and TSC thyristor. If a phase reference signal synchronized with the fundamental-frequency line-to-line voltages is used to control the thyristors switching, the TCR and TSC current semi-cycles are symmetrical.

_{mn}is the conduction angle of the TCR and TSC branch mn and t

_{i0,mn}may be determined iteratively for each semicycle of ${i}_{SVC,mn}^{TCR}\text{}\mathrm{and}\text{}{i}_{SVC,mn}^{TSC}$ by incrementing t until reach the following conditions: ${i}_{SVC,mn}^{TCR}=0\mathrm{and}{i}_{SVC,mn}^{TSC}=0$ and $\frac{d}{dt}{i}_{SVC,mn}^{TCR}<0\frac{d}{dt}{i}_{SVC,mn}^{TSC}0$ For the positive semicycle and ${i}_{SVC,mn}^{TCR}=0\mathrm{and}{i}_{SVC,mn}^{TSC}=0$ and $\frac{d}{dt}{i}_{SVC,mn}^{TCR}>0\frac{d}{dt}{i}_{SVC,mn}^{TSC}0$ For the negative semicycle.

_{a,mn}and t > t

_{b,mn}. Term C

_{mn}is the integration constant and may be determined for each ta as:

## 7. Total Harmonic Distortion and Simulation

- f(t): The time domain function.
- n: The harmonic number (only odd values of n are required).
- A
_{n}: The amplitude of the nth harmonic component. - T: The length of one cycle in seconds.

**ID**is the magnitude of the nth harmonic as a percentage of the fundamental (individual distortion).

_{n}## 8. Conclusions

## Acknowledgments

## Author Contributions

## Conflicts of Interest

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Variable Names | Meaning |
---|---|

K_{PI} | Proportional and integral gain constant |

ϴ | ωt |

I_{Ndcmd}, I_{Nqcmd} | Stationary frame current command |

Without SVC | With SVC | SVC with ASRFC & HVC | |
---|---|---|---|

Average of power factor (%) | 83 | 91.5 | 99 |

Interval of upper and lower of power factor (%) | 14 | 9 | 2 |

Without SVC | With SVC | SVC with ASRFC & HVC | |
---|---|---|---|

Average of power factor (%) | 83 | 91.5 | 99 (No distortion) |

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**MDPI and ACS Style**

Farkoush, S.G.; Kim, C.-H.; Rhee, S.-B.
THD Reduction of Distribution System Based on ASRFC and HVC Method for SVC under EV Charger Condition for Power Factor Improvement. *Symmetry* **2016**, *8*, 156.
https://doi.org/10.3390/sym8120156

**AMA Style**

Farkoush SG, Kim C-H, Rhee S-B.
THD Reduction of Distribution System Based on ASRFC and HVC Method for SVC under EV Charger Condition for Power Factor Improvement. *Symmetry*. 2016; 8(12):156.
https://doi.org/10.3390/sym8120156

**Chicago/Turabian Style**

Farkoush, Saeid Gholami, Chang-Hwan Kim, and Sang-Bong Rhee.
2016. "THD Reduction of Distribution System Based on ASRFC and HVC Method for SVC under EV Charger Condition for Power Factor Improvement" *Symmetry* 8, no. 12: 156.
https://doi.org/10.3390/sym8120156