Effects of Switching on the 2-DEG Channel in Commercial E-Mode GaN-on-Si HEMT

Abstract

In this study, the effects of switching on the two-dimensional electron gas (2-DEG) channel in an E-mode GaN-on-Si HEMT are investigated using a GS-065-004-1-L device that is commercially available for educational practice. A practical prototype with a reduced number of components is proposed, with empirical concepts used to explain its predictive performance when a coreless transformer is series-connected to the E-mode GaN-on-Si HEMT for switching-mode conduction. Conduction modes arising at the p-GaN/n-AlGaN/i-GaN heterojunction in accordance with specifications from the manufacturer’s datasheet were validated using a didactic physical-based model dependent on semiconductor parameters of gallium nitride (GaN). Test circuit-examined waveforms were analyzed, which confirmed that the switching conduction mode of the 2-DEG channel is dependent on physical parameters such as switching operating frequency, temperature, low-field electron mobility, and space charge capacitance.

1. Introduction

High-voltage GaN-on-Si transistors have been in development and the subject of intense research since 2015, when the first high-voltage solution was commercially released. These practical devices are based on a cascade configuration of a low-voltage Si-MOSFET in series connection with a high-voltage gallium nitride (GaN) MIS-HEMT, followed by enhancement-mode (E-mode) devices based on a p-doped GaN gate module for low-voltage GaN power transistors. In 2016, the first fully industrial qualified 600 V E-mode GaN power transistors were released by Panasonic and Infineon [1,2]. However, because GaN-based device technologies have been implemented with a standard silicon process to achieve economic balance, one of the biggest challenges when using GaN devices is their reliability [3].

Empirical methods have been established to understand how the formation of piezoelectric effects dependent on charge distribution can contribute to the presence of the conduction path in GaN HEMTs on a very thin (≤30 nm) sheet—called two-dimensional electron gas (2-DEG) in GaN-based devices—where donor states positively impact performance under high electric field conditions, inducing sheet charges at p-GaN/n-AlGaN and n-AlGaN/i-GaN interfaces [4,5]. Therefore, a simplified behavior model of switching effects on the 2-DEG channel is expected to encourage scholars who are researching switching-mode power circuits based on E-mode GaN-on-Si HEMTs, where mounting techniques are needed for long-term temperature cycles in real-world applications, and gate driver techniques with low impedance and high peak current are recommended for fast switching conduction [6]. To understand the physical behavior of a commercial E-mode GaN-based device, empirical concepts used to explain the performance of a test circuit are a valuable educational resource for undergraduate and graduate students.

It is well known that, although technology computer-aided design (TCAD) software packages for power circuit analysis can be a very useful tool for initial design, they are not a substitute for young professionals’ and experienced engineers’ understanding of the overall performance of GaN device-based circuits, because such packages provided by device manufacturers and researchers are usually commercially private and technologically protected. Consequently, to mitigate the lack of design skills and optimize reliability issues using E-mode GaN-on-Si HEMTs, a typical design process must usually begin with specifications for the circuit application, which can proceed based on previous silicon technology-based designs—including specific components and their tolerances—to achieve the best performance by evaluating some of their key physical parameters from a phenomenological viewpoint [7].

The remainder of this study is organized as follows. In Section 2, we provide general description of the experimental setup to present the effects of switching on the 2-DEG channel. In Section 3, we utilize a physics-based model focused on standard carrier conduction equations of silicon-based semiconductor devices for reducing the workload of parameter’s adjustment, and a test circuit and behavior analysis to examine how switching dependence of 2-DEG channel conduction in the commercial GS-065-004-1-L device occurs, particularly when it is driven at frequencies higher than 250 kHz using a coreless transformer in a test circuit. Conclusions about this work are presented in Section 4.

2. Experimental Procedure

To understand how the effects of switching on the 2-DEG channel behave, an empirical study with accessible measurement instruments for the user is proposed. This study focuses on a physical-based model verified in a test circuit, where a commercial low-power GaN transistor from GaN Systems (Ottawa, ON, Canada) (with part number GS-065-004-1-L) is tested using a range of electrical specifications from the manufacturer’s datasheet. The dimensions for the commercial GS-065-004-1-L device (p-GaN gate structure) shown in Figure 1a comprises an i-GaN buffer, n-AlGaN barrier, p-GaN layer, and three electrodes—namely, drain, source, and gate—where the gate electrode is asymmetrically located at 1/5 L_DS for low-power technology [8,9]. The test circuit in Figure 1b with a reduced number of components is proposed to understand how semiconductor parameters can influence switching effects in the commercial GS-065-004-1-L device.

Although GaN-based devices behave differently to silicon MOSFETs because they can exhibit an average 2-DEG channel resistance during their turn-off time, they are designed to be cooled using the printed circuit board (PCB), where the source/thermal pad is internally connected [5,10]. Thus, to prevent thermal damage, the copper path on the PCB for distributing the gate drive signal was designed to be as short as possible, while copper paths to the source and drain signals were wider, as shown in Figure 2a. The device was mounted on 0.1 mm PCB thickness phenolic resin as the material, and the copper layer under the source/thermal pad was roughly 15 × 15 mm², as shown in Figure 2b.

3. Results and Discussion

3.1. Conduction Modes in the E-Mode GaN-on-Si HEMT

Conduction modes for GaN-based devices must be evaluated using semiconductor parameters (e.g., doping concentration, physical dimensions, and electrical characteristics) and well-known physical principles assembled in carrier conduction equations to study its effects with available mathematics software tools. This results in an educational model that could be useful for the predictive analysis of p-GaN/n-AlGaN/i-GaN heterojunctions. To theoretically analyze the conduction modes as a function of the physical parameters, useful specifications from the manufacturer’s datasheet are summarized in

Table 1. Specifications for commercial GS-065-004-1-L device.

Parameter	Symbol	Value
Maximum drain-to-source voltage	VDS	650 V
Gate-to-source threshold	VT	1.1 to 2.6 V
On resistance	RON	0.45 Ω
Gate-to-source current	IGS	20 µA
Maximum switching frequency	fSW	~10 MHz
Rise time	tR	3 ns
Fall time	tF	11.5 ns
Maximum junction temperature	TJ	150 °C

. Furthermore, semiconductor parameters for GaN at room temperature, as listed in

Table 2. Semiconductor parameters for GaN used to evaluate physics-based model [10,11].

Property	Symbol	Value
Bandgap	EG	3.4 eV
Breakdown field	FBW	~4 × 106 V/cm
Lateral electric field at drift conduction	FL	~1.5 × 104 V/cm
Static dielectric constant	KGaN	9
Intrinsic concentration	ni	~3.5 × 107 cm−3
Hole lifetime	τp	~7 ns
Electron lifetime	τn	~2 ns
Diffusion length of holes	Lp	~0.8 µm
Diffusion length of electrons	Ln	~8.5 µm
Saturation velocity	vS	3 × 107 cm/s
Drift velocity	vd	≤4.5 × 105 cm/s
Surface state density	NSS	2 × 1013 to 5 × 1013 cm−2
Low concentration at i-GaN	Ni	~2 × 109 cm−3
Donor concentration at n-AlGaN	ND	~5 × 1016 cm−3
Acceptor concentration at p-GaN	NA	~2 × 1018 cm−3
2-DEG channel thickness	d2DEG	≤10 nm

from data reported in the scientific literature, are taken into account to understand how conduction effects in the practical structure shown in Figure 1b can impact performance in switching-mode power electronics.

Accordingly, to understand how the p-GaN/n-AlGaN heterojunction can affect 2-DEG channel conduction and transiently stimulate the n-AlGaN/i-GaN heterojunction for reliable conduction in an E-mode GaN-on-Si HEMT, standard equations for silicon devices governing static conduction modes can be established as follows.

At the p-GaN/n-AlGaN heterojunction, where both sides of the heterojunction become the same material, it is supposed that the diffusion currents are similar to a regular p⁺-n junction and the carrier concentrations are relatively much higher inside the depletion region [12]. Therefore, a dipole layer is supported with the built-in potential, ${\Psi }_1$ and applied bias threshold voltage, where surface effects due to ionic charges can cause the formation of depletion regions ${\mathrm{W}}_{Dp}$ and ${\mathrm{W}}_{Dn}$, giving rise to the high injection level that may occur under a relatively small forward bias condition, as shown in the energy band diagram in Figure 3a. The current/voltage characteristics are established using the following expression:

$${\displaystyle \frac{I_T\left({\Psi }_1\right)}{S_{J1}}}=J_0\left[e^{\left({\displaystyle \frac{q{V}_T}{kT}}\right)}-1\right]$$

(1)

where k = 8.62 × 10⁻⁵ eVK⁻¹ is the Boltzmann constant; $T=T_J+273.15$ in degrees Kelvin, where T_J is the junction temperature in degrees Celsius for the analysis proposed in accordance with the manufacturer’s datasheet; ${\mathrm{S}}_{J1}$ is a cross-section area for mobile carries across the p-GaN/n-AlGaN heterojunction; ${\mathrm{V}}_T$ the gate threshold voltage; $J_0=q{n}_i^2\left[L_p{\left({\tau }_p{N}_D\right)}^{-1}+L_n{\left({\tau }_n{N}_A\right)}^{-1}\right]$ is the saturation current density which depends on ${\mathrm{n}}_i$ the intrinsic carrier concentration at room temperature; the carrier lifetime for holes is ${\tau }_p$ and that for electrons is ${\tau }_n$; the diffusion length for holes is ${\mathrm{L}}_P\gg W_{Dp}$ and that for electrons is ${\mathrm{L}}_n\gg W_{Dn}$; and the impurity concentration for the donor is $N_D$ while that for the acceptor is $N_A$.

For the n-AlGaN/i-GaN heterojunction, it can be supposed that the conduction mechanism is similar to that governed by thermionic emission where the electron’s conduction regime is influenced by the barrier height, ${\varphi }_b$ in which high-mobility electrons can be swept in a velocity saturation regime through the 2-DEG channel length [12,13]. Accordingly, the temperature-influenced current density at the n-AlGaN/i-GaN heterojunction can behave similarly to the metal/semiconductor junction given by

$${\displaystyle \frac{I_G\left({\Psi }_2\right)}{S_{J2}}}={\displaystyle \frac{{\Psi }_2{A}^{*}{T}_J}{k}}\left(1-{\displaystyle \frac{V_J}{{\Psi }_2}}\right)e^{\left(-{\displaystyle \frac{q{\Psi }_2}{k{T}_J}}\right)}{e}^{\left(-{\displaystyle \frac{q{\varphi }_b}{k{T}_J}}\right)}\left[e^{\left({\displaystyle \frac{q{V}_J}{k{T}_J}}\right)}-1\right],$$

(2)

where $A^{*}$ = 26.4 × 10⁻³ Acm⁻²K⁻² is the pre-exponential factor (often expressed in terms of the effective Richardson constant for GaN material [11]), ${\Psi }_2$ is the built-in potential at the i-GaN/n-AlGaN interface, $S_{J2}$ is the cross-section area for mobile electrons across the 2-DEG channel, and $V_J$ is the junction voltage at the gate-to-source heterojunction which obeys equation $q{V}_J=q\left({\varphi }_b+{\Psi }_p\right)$ [7,14], where the potential ${{\Psi }_p=qN}^{*}{d}_2^2{\left(2K_{GaN}{ϵ}_0\right)}^{-1}$ is responsible for the trapping reduction and minimizing inactive surface donors at the n-AlGaN barrier of $d_2 ~ 20 \mathrm{n}\mathrm{m}$ (see Figure 1) as a function of the concentration of the ionized donor impurities $N^{*}$ at the i-GaN/n-AlGaN interface, as shown in Figure 3b.

Because the i-GaN buffer is lightly doped, space charge effects independent of the electric field at the n-AlGaN/i-GaN heterojunction can be influenced by ${\varphi }_b$, which is sufficient to fully enhance the conduction dominated by the velocity saturation regime. This is due to the presence of free carrier concentrations along the 2-DEG channel length when the gate voltage V_G > V_T, as shown by the energy band diagram in Figure 3b [8,12]. The drain current arising from flow inside the 2-DEG channel can be accurately given by

$${\displaystyle \frac{I_D\left({\varphi }_b\right)}{S_{2DEG}}}=2\mathrm{ }{K}_{GaN}{ϵ}_0{v}_S{\displaystyle \frac{V_D}{{\left(L+L_D\right)}^2}},$$

(3)

where ${ϵ}_0$ = 8.86 × 10⁻¹⁴ Fcm⁻¹, $v_S$ is the saturation velocity, $S_{2DEG}$ is the cross-section area across the 2-DEG channel length, $L_D=\sqrt{{K_{GaN}{ϵ}_{0}kT\left(q{N}^{*}\right)}^{-1}}$ is the Debye length which defines the start-up for conduction limited by space charge effects inside the 2-DEG channel, and L = 1/2L_DS, where ${L_{DS}=V}_{DS}{F}_{BW}^{-1}$ is initially computed using data from Table 1 and Table 2.

Semiconductor parameters for commercial devices are unrevealed by manufacturers and are very hard to determine. However, for the empirical adjustment of Equations (1)–(3), it is sufficient to know initial values of the manufacturer’s data summarized in Table 1 for the extraction of physical parameters $J_0$, ${\Psi }_2$, ${\varphi }_b$, and $N^{*}$ to accurately reflect the characteristics of the commercial GS-065-004-1-L device. The values of the remaining physical parameters collected in Table 2 are adjusted in accordance with those reported in the scientific literature [10,11].

Based on the energy band diagram of Figure 3 for the p-GaN/n-AlGaN/i-GaN heterojunction, it is pertinent to understand how the junction temperature disturbs the threshold current, I_T, as a function of forward threshold bias V_T ( ${\Psi }_1$), as shown in Figure 3a, as well as gate current I_G, as a function of reverse bias voltage V_J ( ${\Psi }_2$), together with I_D ( ${\varphi }_{\mathrm{b}}$) at the i-GaN/n-AlGaN interface, as shown in Figure 3b. Thus, because the maximum junction temperature for the commercial GS-065-004-1-L device is 150 °C, current/voltage curves are examined for three temperature values: 40 °C, 80 °C, and 120 °C.

The characteristics (I_T–V_T) depicted in Figure 4a show an initial bias current flow at the n-AlGaN/p-GaN heterojunction as a function of the built-in potential ${\Psi }_1$, which is dependent on V_T from 1.1 to 2.6 V, as declared in Table 1. In Figure 4b, for the characteristics (I_G-V_J) under reverse bias at the i-GaN/n-AlGaN heterojunction, the current flow begins to increase in the gate-to-source region as a function of ${\Psi }_P$ in V_J ranging from −4 to −2 V when the drain current starts to flow across the drain-to-source distance, where the 2-DEG channel is created at a high injection level, as shown in the characteristics (I_D-V_D) presented in Figure 4c and governed by ${\varphi }_b$ and the built-in potential, ${\Psi }_2$, dependent on V_D from 0 to 5 V. Nevertheless, to determine how the switching conduction regime in the commercial GS-065-004-1-L device must be assisted, the evaluation of an injection level coefficient, ${\alpha }_I=I_G{I}_T^{-1}$, as presented in Figure 4d, shows how dynamic conduction regime in the p-GaN/n-AlGaN/i-GaN heterojunction is dependent on the gate voltage, V_G, as a pulse pattern applied in the gate electrode where, to achieve an enhanced injection level at the temperature lower than 80 °C, the V_T/V_G ratio must be lower than 0.3.

Because it is assumed that electrons travel near to the saturation velocity, transit time effects can enable the switching conduction mode through the dipole charge sheet (inside the 2-DEG channel) where current flow can lag behind the voltage based on the time-variant distribution of the electron’s density with respect to the ionized donor impurities’ concentration, ${\mathrm{N}}^{*}$, similar to the space charge-limited conduction (SCLC) formalism for the commercial D-mode GaN-on-Si HEMT [7,12]. Therefore, the trapping of electrons occurs close to the n-AlGaN surface when they are displaced from the depleted i-GaN buffer at the i-GaN/n-AlGaN interface, as shown in the energy band diagram of Figure 3, exhibiting capacitance/frequency characteristics at the drain-to-source heterojunction through the gate width (L_G~0.5 µm), establishing a connection between $Q_{SS}$ and ${\Psi }_P$ according to ${C_{2DEG}=dQ}_{SS}/d{\Psi }_P$, assuming ${{dQ}_{SS}=I}_D\left({\varphi }_b\right)dt$. Substituting Equation (3) with ${L\approx L}_G$ and $dt\approx f_{SW}^{-1}$, taking into account that ${2L{L}_D\gg L}^2+L_D^2$, we can define a space charge capacitance equivalent to the depletion capacitance per unit area, given by

$$C_D\approx {\displaystyle \frac{K_{GaN}{\epsilon }_0}{L_D{L}_G}}\left({\displaystyle \frac{v_d}{f_{SW}}}\right),$$

(4)

where ${\mathrm{f}}_{SW}$ is the switching frequency; $v_d\propto {\mu }_{2DEG}{F}_L$ is the drift velocity (average sound velocity), being proportional to the practical 2-DEG electron mobility, ${\mu }_{2DEG}$, which is highly dependent on a lateral electric field $F_L$ inside the gate-to-drain space, and caused by longitudinal and transverse strains at i-GaN buffer and scattering mechanisms at the n-AlGaN barrier [5,10,11].

Furthermore, the progressive reduction in $N^{*}$ at the n-AlGaN/i-GaN interface and scattering mechanisms along the 2-DEG channel length can slightly impact electron mobility when the temperature rises, as shown in Figure 4c. This is because diffusion mechanisms in the drain-to-source space can occur due to the saturation of the surface state density, and the dependence of $N_{SS}$ on ${\Psi }_P$ rises during 2-DEG channel conduction.

3.2. Switching Dependence of Coreless Transformer

It is well known that the output power capability delivered by the coreless transformer to the load for square wave signal excitation [15] can be approximately defined from the stored energy density in the coreless transformer as follows:

$$P_{OUT}=0.5A_E^2{dB}_{air}{f}_{sw}{10}^{-6},$$

(5)

where $A_E$ is the core effective area in cm²; B_air is the air gap flux density; $f_{sw}$ is the switching frequency; and $d=1.5 \mathrm{A}{\mathrm{m}\mathrm{m}}^{-2}$ is the current density of wires for low-power transformer windings operating at high frequencies, where surface eddy currents are supposed to reinforce the main current flow but oppose it toward the center of the winding [16]. As a result, the induced voltage at the secondary winding of the number of turns, ${\mathrm{N}}_2$, could increase as $f_{sw}$ rises, being highly dependent on the primary inductance, L₁, empirically given by

$$L_1={\displaystyle \frac{n}{2I_2{f}_{SW}}}\left(D{V}_{CD}\right),$$

(6)

where ${{n=N}_1{N}_2^{-1}=I}_2{I}_1^{-1}$ is the turn’s ratio and D is the duty cycle, defined as the turn-on time/full wave time ratio of a square wave signal with voltage supply ${\mathrm{V}}_{CD}$ and average current flow $I_2$ from the secondary winding.

Applying a pulse pattern of a short turn-on time at the gate, as deduced in Figure 4d, the power density transferred to the resistive load from the coreless transformer in Figure 1b could be improved [16,17]. Accordingly, as almost all magnetic energy is stored in air gaps and insulation between conductors, the current flowing around the windings’ surface must be taken into account in terms of skin effects to determine the distribution of B_air as a function of its depth, $\delta =\sqrt{{\left(\pi {\mu }_0{\sigma }_C{f}_{SW}\right)}^{-1}}$, using an expression defined according to the empirical Faraday’s law and $\delta \left(f_{SW}\right)$ definition, given by

$${\displaystyle \frac{\left(D{V}_{CD}\right){10}^8}{2B_{air}{N}_1{A}_E}}={\displaystyle \frac{1}{\pi {\mu }_0{\sigma }_C{\delta }^2}},$$

(7)

where $N_1$ is the number of turns for the primary winding of the coreless transformer, $A_E$ is the core’s effective area in cm², ${\mu }_0=4\pi \times {10}^{-7}\mathrm{H}\mathrm{y}{\mathrm{m}}^{-1}$ is the permeability of vacuum, and ${{\sigma }_C=5.82\times 10}^{7 }\mathrm{S}{\mathrm{m}}^{-1}$ is the conductivity of the copper wire of the windings.

To achieve good power transfer from the input to the load and to circumvent power losses, optimized analysis has been commonly supported using TCAD software packages [14,18]. Nevertheless, instead of using these powerful computer programs for behavior analysis, from empirical Equations (5)–(7), governing the coreless transformer performance can be useful in manufacturing it, because power transfer from a phenomenological viewpoint as a function of physical parameters can be realized in specifications for a practical design, including dimensions, the number of primary and secondary turns, and their operating capabilities at high switching frequencies when series-connected to the depletion capacitance deduced from Equation (4) to understand how GaN-based devices must be operated in the real world and empirically model the drain-to-source heterojunction behavior of the commercial GS-065-004-1-L device intended to be operated in low-power electronics applications. Here, in a theoretical design for the test circuit in Figure 1b, operating specifications such as V_CD = 100 V, D = 0.3, 100 µH < L₁ < 400 µH, A_E = 1 cm², and n = 5 are assumed to ensure that a coreless transformer could be reliably developed [19]. The results in Figure 5a–c were computed using the MATHEMATICA 5 software to demonstrate the feasibility of the coreless transformer and space charge capacitance as a function of the switching frequency, $f_{SW}$, in the range from 300 to 700 kHz using Equation (4), as shown in Figure 5d at room temperature.

Figure 5a confirms that B_air increases when the power capability rises but, when using an $L_1$ higher than 200 µH, as shown in Figure 5b, the $I_2$ at the secondary winding might decrease at switching frequencies higher than 350 kHz. However, when the skin depth is taken into account, as shown in Figure 5c, where $N_1$ is higher than 150 T (turns), the induced voltage at $L_2$ inside the coreless transformer in Figure 1b might be creased within an acceptable B_air level. Hence, it is theoretically confirmed that the coreless transformer manufactured using conventional winding techniques may be applied for switching-mode power circuits at high frequencies, although the winding temperature should be lower than 50 °C for copper wires [18,19]. The depletion capacitance C_D decreases as switching frequency rises, as shown in Figure 5d, but its variation as a function of the electron density trapped at three different N* concentrations, 2 × 10¹³ cm³, 5 × 10¹³ cm⁻³, and 9 × 10¹³ cm⁻³, is examined.

This confirmed that stable operations can be achieved only at a low injection level (N* = 2 × 10¹³ cm⁻³) to ensure an off-state condition at the V_OUT in Figure 1b (though lower than ½ V_DS; see Table 1), and quasi-resonance phenomena, observed with stored magnetic energy at L₁ and stored electric energy inside the 2-DEG channel, can result in negligible electrical breakdown effects at switching frequencies higher than 300 kHz.

3.3. Analysis of Test Circuit

In accordance with the theoretical results in Figure 5, the test circuit in Figure 1b was built and its performance was experimentally evaluated by connecting a pulse pattern of the positive square-wave signal with D = 0.25 to V_IN, where a series resistor R = 10 Ω was connected on the gate electrode. A coreless transformer series-connected to the drain electrode was built whose specifications are N₁ = 200 T (L₁~250 µH) of 26 AWG wire, N₂ = 40 T of 22 AWG wire, A_E~1 cm². The load resistor R_L = 26.6 Ω (small incandescent lamp for automobile application) was used. The input voltage, V_IN, and output voltage, V_OUT, waveforms were measured using a digital storage oscilloscope (Tektronix (Beaverton, OR, USA), TDS1012C 100 MHz) to determine the physical effects of switching conduction on the 2-DEG channel in the commercial GS-065-004-1-L device.

A typical driver circuit for the switching performance of GaN devices must comprise one comparator with a programmable turn-on time [20], where the resistor R₂ can be used to adjust D in the range of 10 to 30%, and two CMOS logic inverter circuits, as shown in Figure 6a, where the capacitor C₁ and resistor R₁ are both used to adjust the chosen switching frequency. Because the driver circuit used for high-frequency operation requires a bias voltage (V_GS = 6 V) at the gate-to-source heterojunction to ensure stable performance, the blocks specified in Figure 6a are integrated inside the 7555 timer circuit, which was implemented to provide signals, V_IN, in the test circuit (see Figure 1b) for experimental analysis.

The precision integrated-circuit temperature sensor (type LM35DZ; Texas Instruments (Kuala Lumpur, Malaysia)) packaged in TO-92 plastic and designed for a full −55 °C to 150 °C range was chosen to evaluate heat dissipation. The test setup is shown in Figure 6b. It was assembled ensuring that the LM35DZ was as close as possible to the device surface soldered on the PCB and, due to the linear +10 mV per °C scale factor in the LM35DZ, it was easily applied to measure voltage linearly at its output pad using an analog meter.

The experimental waveforms displayed in Figure 7a–d show how the commercial GS-065-004-1-L device behaves when the square wave signal with V_IN = 6 V and $f_{SW}$ is in the range of 300 to 700 kHz; moreover, to avoid premature damage, V_CD = 60 V was chosen for the test circuit shown in Figure 1b to satisfy acceptable output power capability, P_OUT, from Figure 5a and junction temperature, T_J, lower than 80 °C from Figure 4c; therefore, an equivalent series R_ON-L₁-C_D circuit was identified, where two voltage peaks in the V_OUT signals are observed; the first surge peak is shorter in duration, which is related to the transient behavior of the series R_ON-L₁ circuit where stored magnetic energy at L₁ is fixed on the C_D of the drain-to-source heterojunction and the second lower peak of the increasing width in time corresponds to the stored electric energy in the space charge capacitance, C_D, with 60 V in magnitude. This behaves similarly to the series L₁-C_D quasi-resonant circuit due to the oscillating exchange energy between L₁ and C_D during the off-state, as shown in Figure 7.

The test circuit’s performance results are as follows: At $f_{SW}$ = 350 kHz, an oscillating phenomenon is observed at the second peak with a negligible damping effect, but when $f_{SW}$ = 450 kHz, the oscillating phenomenon increases while the critical damping effect starts to become comparable to the first peak magnitude, resulting in deficient stored magnetic energy at L₁ and lower induced voltage to the R_L from the coreless transformer. Furthermore, the switching conduction mode was observed at $f_{SW}$ = 550 kHz and $f_{SW}$ = 650 kHz, where the oscillating event is more negligible, but there is still stored magnetic energy at L₁ in the test circuit.

It was observed that the magnitude of the surge peak, V_DS, decreases as the switching frequency increases, which means that the frequency response of the test circuit verified in Figure 7 is governed by resonance phenomena between L₁ and C_D at the commercial GS-065-004-1-L device and is strongly dependent on the electrical breakdown and strain effects of i-GaN buffer. This is because the turn-off protection (freewheeling diodes and snubber networks) in the test circuit is missing [19,21], but to retain the intention of the reduced number of components, its test circuit was securely operated at V_CD < 100 V and the drain-to-source junction operated at V_DS < 300 V, as confirmed in Figure 7.

Because reactivation of flux residues from no-clean soldering paste may cause unwanted conduction paths in GaN devices, scattering mechanisms on the surface of the n-AlGaN barrier under switching conditions as a function of the T_J can impact 2-DEG channel conduction [10,22]; therefore, it is aimed to understand how heat dissipation in the source pad on the bottom side of the commercial GS-065-004-1-L device behaves when the device package temperature, T_P, remains below 100 °C during cooling cycles. The T_P was measured as indicated by the experimental results in Figure 7, showing how the temperature dependence of the 2-DEG channel changed when T_P increased from 40 to 55 °C and $f_{SW}$ increased, while the damping effects in the wide peak of lower magnitude became negligible, as the oscillating frequency of the equivalent series R_ON-L₁-C_D circuit began to be equal to the switching frequency of the pulse pattern applied to the gate. This suggests that critical strains due to the lattice and thermal expansion coefficient mismatches at the p-GaN/n-AlGaN/i-GaN heterojunction did not contribute to the presence of the surface donor states at the i-GaN/n-AlGaN interface based on anomalous piezoelectric effects [5,10,14] and the non-uniform distribution of the electric field peaks along the 2-DEG channel length [22].

To know how the temperature-dependent dynamic conduction in the 2-DEG channel behaves, a theoretical analysis was evaluated for temperatures ranging from 25 °C to 150 °C, where the commercial GS-0D65-004-1-L device must operate reliably. Figure 8a shows curves describing how the depletion capacitance, $C_D\left(T_J,f_{SW}\right)$, from Equation (4) acts as a function of T_J for the four examined switching frequencies, providing useful confirmation of the charge fluctuations in the graphs in Figure 7, where $C_D\left(T_J,f_{SW}\right)$ gradually reduces as T_J increases at a medium-ionized impurity level (N* = 5 × 10¹³ cm⁻³). However, low-field electron mobility, ${\mu }_{2DEG}\left(V_{DS},T_J\right)$, when $v_S ~ v_d$ from Equation (3), results in V_DS and T_J dependence of ${\varphi }_b$ = 1.5 eV under a low-ionized impurity level (N* = 2 × 10¹³ cm⁻³), whereas for the three different temperatures, namely, 50 °C, 100 °C, and 150 °C, shown in Figure 8b, it was found that ${\mu }_{2DEG}\left(V_{DS},T_J\right)$ rapidly reduces as V_DS increases, although it slightly decreases as T_J rises. For the empirical adjustment of Equation (3) describing ${\mu }_{2DEG}\left(V_{DS},T_J\right)$ as a function of the V_DS and T_J, the average values of $I_D=4A$ and ${S_{2DEG}=7.5\times 10}^{-4 }{\mathrm{c}\mathrm{m}}^2$ were used to accurately reflect the tendency in the curves of Figure 8b for the commercial GS-065-004-1-L device.

The above-mentioned results indicate that C_D ≤ 100 µFcm⁻² and $f_{SW}$ ≥ 450 kHz, as well as ${\mu }_{2DEG}$ ≥ 10 cm² V⁻¹ s⁻¹, allowing us to provide a stable conduction mode with a surge V_DS peak magnitude lower than 350 V and T_J < 100 °C in accordance with the current/voltage characteristics in Figure 4. The examined results in Figure 7 and predictive analysis in Figure 8 confirm the semiconductor parameters’ dependence of $I_T\left({\Psi }_1\right)$, $I_G\left({\Psi }_2\right)$, $I_D\left({\varphi }_b\right)$, $C_D\left(T_J,f_{SW}\right)$, and ${\mu }_{2DEG}\left(V_{DS},T_J\right)$ in the commercial GS-065-004-1-L device.

Furthermore, the curves in Figure 8 confirm that an ionization level, N*, between 2 × 10¹³ and 5 × 10¹³ cm⁻³ can be responsible for the stable conduction mode of the E-mode GaN-on-Si HEMT when switching conduction in the 2-DEG channel conforms to N*d_2DEG >> N_SS, but its package temperature can increase in a runaway manner above 150 °C generating conductive paths during turn-off time which occur between the drain and Si (111) substrate, as well as between the i-GaN/n-AlGaN interface and Si (111) substrate, which would presumably be responsible for unfavorable transient changes in the occupation of interface states determined by N_SS, as shown in the energy band diagram in Figure 3b, leading to time-dependent breakdown effects as Si (111) is a material with 10 times lower $F_{BW}$ compared to GaN [10,18,22].

4. Conclusions

This research is focused on the effects of switching on the 2-DEG channel of an E-mode GaN-on-Si HEMT to understand how semiconductor parameter-dependent conduction modes can be influenced. Firstly, fine tuning of the current/voltage curves was performed using geometric dimensions ${S_{J1}=1.5 \times 10}^{-14}{\mathrm{c}\mathrm{m}}^2$, ${S_{J2}=4.5 \times 10}^{-14 }{\mathrm{c}\mathrm{m}}^2$, and ${S_{2DEG}=7.5 \times 10}^{-4 }{\mathrm{c}\mathrm{m}}^2$. Secondly, a physical parameter-based test circuit was proposed and built within a coreless transformer series-connected to the drain-to-source junction of a commercial GS-065-004-1-L device. Using empirical equations and a simple experiment, reliable performance was demonstrated with a voltage supply lower than 100 V and switching frequencies higher than 300 kHz, validating acceptable heat dissipation in the commercial GS-065-004-1-L device during switching-mode conduction. Based on a didactic physical-based model, this investigation offers a suitable means for behavior analysis and further research to both students and experienced specialists who may face challenges when transitioning to GaN-based devices.