A Non-Isolated High Voltage Gain DC–DC Converter Suitable for Sustainable Energy Systems

Abstract

A non-isolated high gain DC–DC converter with magnetic coupling and a VM circuit is proposed in this study. By the use of the appropriate coupled inductor turn ratio, the output voltage of the recommended topology can be raised. The VM circuit is used to boost the voltage gain even further as well as to clamp the voltage spike across the switch, which results in a lower voltage on the switch. As a result, a MOSFET switch with a lower ON-state resistance (R_DS-ON) is used which, in turn, causes the conduction losses to be reduced and the entire system efficiency to be raised. Another advantage of the proposed structure is the ZCS of the diodes, which reduces the voltage drop losses caused by the regenerative diodes. The function modes analysis and the theoretical equations are accomplished. A comparison survey with other prior works is being developed to investigate the competency of the proposed converter. Based on this, the higher voltage gain and efficiency as well as the lower voltage stress on the semiconductors can be achieved by the proposed converter compared to the other converters. The effectiveness of the proposed converter is confirmed by the experimental results at a laboratory-scale operating under 150 V output voltage with a 96% efficiency at the 150 W full load and a 25 kHz switching frequency.

1. Introduction

Consumer demand for renewable energy sources has increased throughout the world [1]. The primary disadvantages of using fossil fuels include environmental issues, the greenhouse effect, and climate change. On the other hand, the scarcity of fossil fuels encourages people to develop utilization of green energy sources, such as PV, wind turbines, and fuel cells [2]. Photovoltaic sources are one of the essential methods for absorbing greener energy, accounting for most power generation among all renewable energy choices [3]. However, renewable energy output voltage and power levels are low and must be improved for many high-power applications [4]. As a result, a transformer-less high voltage gain DC–DC topology with excellent efficiency is used to boost the voltage and power rating of renewable energy sources [5]. The typical boost converter may provide a high output voltage at a high-duty cycle, which raises the maximum voltage across the semiconductors and reduces overall system efficiency [6,7]. Furthermore, the conventional boost converter cannot achieve high efficiency because passive components are incompatible with renewable systems [8]. One of the primary downsides of boost architectures is the reverse recovery of output diodes, which causes the converter to run at a high duty cycle. As a result, the generated losses increase, and an EMI problem exists [9,10]. Hence, non-isolated converters utilized in renewable applications should have a high voltage gain, decreased input current ripple, and lower semiconductor maximum voltage [11].

Research Literature

Many different sorts of studies have been conducted to create DC–DC structures with high voltage gains [12]. Transformer-less DC–DC topologies with magnetizing inductors are used to achieve high voltage gain with a more extended source voltage gain and at a reduced cost [13,14,15]. The coupled inductor functions as a transformer, increasing the output voltage by selecting the suitable turn ratio [16]. However, the presence of inductive components reduces the efficiency of designs based on coupled inductors at kilowatt power levels [17]. Magnetic coupling converters benefit from clamped circuits with soft switching capabilities for quick switching in ZVS and ZCS. Nevertheless, they increase the topology’s complexity and raises the converter’s price [18]. One method uses converters, integrated coupled inductors, and switched capacitors to give a high voltage gain with a lower maximum voltage throughout the semiconductor elements and a reduced input current [19,20]. However, the ripple intensity via the output voltage and input current is significant, as is the cost of these systems due to the large number of passive and active components used [21]. By including a diode–capacitor circuit, the converter presented in [22] may prepare a high voltage gain with a smaller maximum voltage across the switch. The diode–capacitor circuit raises the output voltage at high-duty cycles by requiring semiconductors with high voltage and current ratings. This converter is inefficient and is not suggested for high power usage [23]. The switching capacitor and boost structures are mixed to provide a high voltage conversion ratio. These structures’ advantages include decreased current ripple and EMI [24]. The basic disadvantage of these topologies is their high maximum voltage across the diodes and considerable switching losses [25]. There is a transformer-free interleaved DC–DC structure with a high voltage gain [26]. These topologies are defined by their high output voltage, minimal losses, and compact volume and dimension [27]. However, these topologies have several flaws, including a reverse recovery problem, a high ripple content throughout the switch current, a high peak voltage of the controllable switch, and substantial switching losses [28,29,30,31].

Table 1. Overview of non-isolated DC–DC structures with high voltage gain.

High Gain Converters	Advantages	Disadvantages
High gain DC–DC structure with magnetic coupling	The extended input voltage, low price	In kilowatt levels, the efficiency is low (due to inductive elements)
High gain DC–DC structure with switched capacitors	High efficiency	High current stress of switches
High gain DC–DC structure with inductors and magnetizing inductors	Low peak voltage of the switch in comparison with the boost structure, high efficiency	High ripple of the input current and output voltage
High gain DC–DC structure with magnetic coupling and switching capacitors	Low maximum voltage on switch	High ripple contents
High gain interleaved converters	Low input ripple	Low output voltage rate, the high maximum voltage throughout the switch, high current ripple of the switch

briefly overviews transformer-less high gain DC–DC converters [32,33].

This paper recommends a transformer-less DC–DC boost converter for sustainable systems. The advantages of the proposed configuration can be summarized as follows:

• Higher voltage gain in comparison with others in the literature by the use of a coupled inductor and a voltage multiplier circuit.
• Reduced maximum voltage of the switch due to the existence of the voltage multiplier circuit used as a clamp unit.
• Operation of the diodes under ZCS, which reduces their reverse recovery losses.
• Simple control system because of the one active switch used in the arrangement of the converter.

In the next sections, the proposed converter function in CCM is analyzed. Finally, a 150 W laboratory prototype at a 25 kHz switching frequency for 20 V input voltage and the 150 V output voltage is supplied to demonstrate the validity of the theoretical survey of the proposed topology.

Table 2. Nomenclature.

Abbreviation/Variable	Description	Abbreviation/Variable	Description
DC	Direct current	${\lambda }_b$	Base failure rate with a constant value
VM	Voltage multiplier	${\pi }_A$	Application factor
PV	Photovoltaic	${\pi }_Q$	Quality factor
ZCS	Zero current switching	${\pi }_E$	Environmental factor
EMI	Electromagnetic interference	${\pi }_T$	Temperature factor
ZVS	Zero voltage switching	$R_{\theta jA}$	Ambient thermal resistance
CCM	Continuous conduction mode	Ta	Ambient temperature
ESR	Equivalent series resistant	PLoss_S	Total power switches loss
MTTF	Mean time to failure	${\pi }_D$	Diodes voltage stress factor
FR	Failure rate	${\pi }_C$	Diodes contact construction factor
TS	Switching period	$V_D$	Applied voltage of diodes/rated voltage
D	Duty cycle	THS	Hot spot temperature
$\Delta T$	Average rise in temperature	${\pi }_V$	Capacitors’ voltage stress factor
AL	Radiating surface magnetic device’s area	${\pi }_{Cap}$	Capacitance factor
${\pi }_{SR}$	Series resistance factor	SC	Operating voltage of capacitors/rated voltage

lists the nomenclatures used in this paper.

2. Material and Methods of Analysis the Proposed Converter

Figure 1 depicts the proposed prototype. This design includes a DC supply at the input, an input inductor (L_in), a magnetic coupling with two windings N₁ (winding number of primary sides), and N₂ (winding number of secondary sides), a VM circuit (consisting of a capacitor C₂ and diodes D₁, D₂, an output diode (D_o), and an output capacitor (C_o)). It should be noted that the coupled inductor is modeled using an ideal transformer with two windings, namely magnetizing inductance (L_m) and leakage inductance (L_k). To have a simple analysis of the operation modes, the following suppositions are carried out:

• The input DC source is consistent.
• The calculations do not consider the elements’ ESR values (capacitors and inductors), diode ohmic losses, and active switch conducting resistance.
• The intervals of transient state are ignored in the operating mode analysis.
• The leakage inductor (L_k) has a small value and may be ignored during the operation.

The two time intervals occur during the one T_S. The main switch is powered ON for (DT_S), and the main switch is powered OFF for ((1 − D)T_S).

2.1. CCM Method Description

The basic waveforms, with their equivalent circuit of the suggested structure in CCM operation, have been indicated in Figure 2a–c, respectively. Thus, the following modes can be defined for CCM as follows:

Mode 1 [t₀ − t₁]: During this temporary period, the primary switch is in a conducting state at t = t₁. Diodes D₁ and D_o are reverse-biased by the voltage V_C3 and V_o − V_C3, respectively. The energy from the input supply is transferred to L_in and the magnetic coupling.

Mode 2 [t₁ − t₂]: In this switching interval, the main switch is activated, and the diodes D₁ and D_o are in a reverse-biased state. Only diode D₂ is conducting. As depicted in Figure 2a, diode D₂ is switched off under the ZCS condition, effectively reducing the regenerative diode’s reverse recovery losses. The input inductor, L_in, and the secondary winding of the magnetic coupling inductor, L_n2, are charged by a DC power supply, causing the current, i_Lin, to increase linearly. Consequently, the stored energy in L_n2 charges the capacitors C₁ and C₂. During this phase, capacitor C_o releases its energy to the load. The current flow path is depicted in Figure 2b. According to Figure 2b, the following Equations (1)–(3) can be derived in this switching operation:

$$V_{Lin}=V_{in}+V_{C1}-V_{C3}$$

(1)

$$V_{Lm}=k\left(V_{C3}-V_{C2}-V_{C1}\right)$$

(2)

$$V_{n2}=V_{C3}-V_{C1}$$

(3)

Mode 3 [t₂ − t₃]: During this transient switching period, the primary switch is obstructed at t = t₃, and diode D₂ is blocked by the voltage V_sw. The accumulated energy stored in L_T2 is transferred to the magnetizing inductor (L_m). The inherent recycling effect of L_k plays a crucial role in controlling the behavior of diode D₂. Using this advantage, the diode current experiences a gradual decline during the OFF mode, confirming the presence of the ZCS condition.

Mode 4 [t₃ − t₄]: This time interval occurs when the main switch is deactivated and diode D₂ is blocked. Diodes D₁ and D_o are conducting. It is worth noting that diode D₁ undergoes turn-off under the ZCS condition within this interval. The magnetizing inductor current (i_Lm) rises linearly as it stores energy from the input inductor during the first mode. L_n2 discharges its energy, transferring it to C₃, resulting in the charging of the capacitor C₃. The filter capacitor, C_o, charges by utilizing the reserved energy from both the input inductor and the coupled inductor. At this particular moment, the maximum voltage throughout the power switch is suppressed by V_C3. The current flow path is demonstrated in Figure 2c. Related to this figure, Equations (4)–(6) are obtained as follows:

$$V_{Lin}=V_i+V_{C1}-V_o$$

(4)

$$V_{Lm}=k\left(V_o-V_{C1}-V_{C2}\right)$$

(5)

$$V_{n2}=V_o-V_{C1}-V_{C3}$$

(6)

Mode 5 [t₄ − t₅]: The power switch is turned on in t = t₅. During this transition instant, diodes D₂ and D_o are blocked. The input source charges the input inductor and L_T2.

Based on the voltage–second balance law, the inductor voltage is zero in one T_S. Therefore, the capacitor voltages in (7)–(9) can be achieved by applying this law as follows:

$$V_{C1}=\frac{{(D-1)}^2}{1-D}{V}_o+\frac{(2D-1)}{1-D}{V}_{in}$$

(7)

$$V_{C2}=V_{in}$$

(8)

$$V_{C3}={\frac{V_{in}}{1-D}}_{}$$

(9)

It is clear that (V_n1/V_n2 = N). Therefore, using this ratio and the voltages in (7)–(9), the voltage gain in CCM operation (M_CCM) can be given as the following Equation (10):

$$M_{CCM}=\frac{V_o}{V_{in}}=\frac{2kN-1}{(kN-1)(1-D)}$$

(10)

Based on (10), the current gain is determined as follows in Equation (11):

$$\frac{I_{in}}{I_o}=\frac{2kN-1}{(kN-1)(1-D)}$$

(11)

By noticing the obtained voltages for capacitors in (7)–(9), the peak voltage on the semiconductors can be written as follows in Equations (12)–(14):

$$V_S=V_{C3}=\frac{kN-1}{2kN-1}{V}_o$$

(12)

$$V_{D1}=V_S=\frac{kN-1}{2kN-1}{V}_o$$

(13)

$$V_{D2}=V_{Do}=V_o-V_{C3}=\frac{kN}{2kN-1}{V}_o$$

(14)

2.2. Current Calculation Method of the Components

As demonstrated in Figure 2b, the basic switch is powered ON in the first switching time mode. Hence, the current relations of capacitors in (15)–(18) can be expressed in this mode as follows:

$$I_{{}_{C1}}^{on}=I_{n1}+I_{n2}-I_{in}$$

(15)

$$I_{{}_{C2}}^{on}=I_{n1}$$

(16)

$$I_{C3}^{on}=-I_{C1}^{on}$$

(17)

$$I_{Co}^{on}=-I_o$$

(18)

Figure 2c shows that the active switch is powered OFF. Hence, the current of the capacitors can be given as follows in Equations (19)–(22):

$$I_{C1}^{off}=I_{n1}+I_{n2}-I_{in}$$

(19)

$$I_{C2}^{off}=I_{n1}$$

(20)

$$I_{C3}^{off}=I_{n2}$$

(21)

$$I_{Co}^{off}=-I_{C1}^{off}-I_o$$

(22)

By employing the ampere–second balance principle for the capacitors, and given that the average current of diodes is the same as the output current I_o, the average current which flows through the capacitors in each operation mode is defined as follows in Equations (23) and (24):

$$I_{C1}^{on}=I_{C2}^{on}=-I_{C3}^{on}=\frac{I_o}{D}$$

(23)

$$I_{C3}^{off}=-I_{C1}^{off}=-I_{C2}^{off}=\frac{I_o}{1-D}$$

(24)

By remarking that N = 2, the current through the coupled inductor primary and secondary winding, diodes, and switch is calculated as in the following Equations (25)–(29):

$$I_{n1}=I_{C2}^{on}=\frac{I_o}{D}$$

(25)

$$I_S=I_{n2}=\frac{3I_o}{1-D}$$

(26)

$$I_{D1}=I_{n2}=\frac{3I_o}{1-D}$$

(27)

$$I_{D2}=I_{C1}^{on}=\frac{I_o}{D}$$

(28)

$$I_{Do}=-I_{C1}^{off}=\frac{I_o}{1-D}$$

(29)

2.3. Components Selection

Substituting V_C1 and V_C3 from (7) and (9) into (1), the required input inductor can be obtained as in the following Equation (30):

$$L_{in}=\frac{2D{V}_{in}}{f_s\Delta I_{in}}$$

(30)

where ΔI is the ripple content throughout the inductor. The ripple content of the input current should be low in PV systems, increasing the life span of PV arrays. Based on the currents flowing through the capacitors in Equations (23) and (24), the capacitance of the capacitors C₁, C₂, C₃, and C_o can be expressed, as in the following Equations (31) and (32):

$$C_{1,2,3}=\frac{I_o}{f_s\Delta V_{C1,2,3}}$$

(31)

$$C_o=\frac{D{I}_o}{f_s\Delta V_{Co}}$$

(32)

where ΔV is the voltage ripple throughout the capacitor, which is typically within the range of 5% to 10% of the average voltage. The value of the capacitors is selected to balance the load voltage, which is essential to decline the voltage ripple.

3. Efficiency Discussion of the Suggested Structure

This part presents the power losses and efficiency calculations of the suggested high step-up topology. The efficiency is expressed as in the following Equation (33):

$$Eff\%=\frac{P_o(W)}{P_{in}(W)}\times 100\%=\frac{P_o(W)}{P_{in}(W)+P_{Loss}(W)}\times 100\%$$

(33)

Furthermore, the total power loss of the structure has been defined as Equation (34), which includes switch, diodes, magnetic devices, and capacitors loss, as follows:

$$P_{Loss}\left(W\right)=P_{Loss}^{Switch}+P_{Loss}^{Diodes}+P_{Loss}^{Magnetic}+P_{Loss}^{\mathrm{c}\mathrm{a}\mathrm{p}\mathrm{a}\mathrm{c}\mathrm{i}\mathrm{t}\mathrm{o}\mathrm{r}\mathrm{s}}$$

(34)

The power switch’s loss consists of switching and conducting losses, as follows in Equation (35):

$$P_{Loss}^{Switch}=P_{Loss}^{Switching}+P_{Loss}^{Conducting}=\frac{1}{2}\left(t_{rise}+t_{fall}\right)I_{SW}^{avg}{V}_{SW}{f}_s+R_{ds\left(ON\right)}{\left(I_{SW}^{RMS}\right)}^2$$

(35)

where t_rise and t_fall are the rise and fall time during switching of the switch. Considering the ESR of elements, the total power loss of diodes, magnetic components, and capacitors can be obtained using the following Equations (36)–(38):

$$P_{Loss}^{Diodes}={\displaystyle \sum _{j=1}^{Num. diodes}{R}_{diodes{\left(ON\right)}_j}{\left(I_{S{W}_j}^{RMS}\right)}^2}$$

(36)

$$P_{Loss}^{Magnetic}=R_{ESR-n_1}{\left(I_{n_1}^{RMS}\right)}^2+R_{ESR-n_2}{\left(I_{n_2}^{RMS}\right)}^2$$

(37)

$$P_{Loss}^{\mathrm{c}\mathrm{a}\mathrm{p}\mathrm{a}\mathrm{c}\mathrm{i}\mathrm{t}\mathrm{o}\mathrm{r}\mathrm{s}}=\sum _{j=1}^{Num.\mathrm{c}\mathrm{a}\mathrm{p}\mathrm{a}\mathrm{c}\mathrm{i}\mathrm{t}\mathrm{o}\mathrm{r}}{R}_{ESR-C_j}{\left(I_{C_j}^{RMS}\right)}^2$$

(38)

4. Reliability Discussion and Method

To show the proposed converter’s ability to respond to practical failures, the reliability analysis is provided based on [30]. The reliability study’s primary purpose is to quantify a power converter’s MTTF once it is incorporated through an application. As a reliability metric, MTTF is used to determine a system’s maximum life length. Also, it can be defined as the time until the first failure. The FR of the used elements in the converter’s circuit is evaluated to determine the MTTF. The probability function (r(t)) is described as not experiencing failure duration t, as follows [30]:

$$r\left(t\right)={\mathrm{e}}^{\left(-F{R}_{converter} \times t\right)}$$

(39)

where $F{R}_{converter}$ is the proposed converter’s failure rate. Also, MTTF is defined as (40) [30]:

$$MTTF={\displaystyle {\int }_0^{\infty }r\left(t\right)dt}=\frac{1}{F{R}_{converter}}$$

(40)

where $F{R}_{converter}$ includes the failure rates of semiconductors, inductors, and capacitors, as follows:

$$F{R}_{converter}=F{R}_{Switches}+F{R}_{Diodes}+F{R}_{Magnetics}+F{R}_{Capacitors}$$

(41)

The failure rate of the power switch S is attained as follows:

$$F{R}_{Switches}={\displaystyle \sum _{l=1}^{1}F{R}_{S_j}}={\displaystyle \sum _{j=1}^1\left({\lambda }_{b_j} {\pi }_{T_j} {\pi }_{A_j} {\pi }_{Q_j} {\pi }_{E_j}\right)}$$

(42)

And T_j is defined as in the following Equations (43) and (44):

$${\pi }_{T\_S}=e^{\left[-1925\left(\frac{1}{T_j + 273}-\frac{1}{298}\right)\right]}$$

(43)

$$T_j=T_a+R_{\theta jA}{P}_{Loss\_S}$$

(44)

The failure rate of diodes (D₁, D₂, and D_o) is determined as follows:

$$F{R}_{Diode}={\displaystyle \sum _{l=1}^{3}F{R}_{D_j}}={\displaystyle \sum _{j=1}^3\left({\lambda }_{b_j} {\pi }_{T_j} {\pi }_{D_j} {\pi }_{C_j} {\pi }_{Q_j} {\pi }_{E_j}\right)}$$

(45)

Equations (46)–(48) are presented to determine the ${\pi }_D$ and ${\pi }_T$ of diodes, and T_D, respectively.

$${\pi }_D={\left(V_D\right)}^z$$

(46)

$${\pi }_{T\_D}=e^{\left[-2100\left(\frac{1}{T_D + 273}-\frac{1}{298}\right)\right]}$$

(47)

$$T_D=R_{\theta jA}{P}_{Loss\_D}+T_a$$

(48)

The magnetic components (input inductor and coupled inductor) failure rate can be obtained by the following Equation (49):

$$F{R}_{Magnetics}=F{R}_{L_{in}}+F{R}_{L_{CL}}=\left({\lambda }_{b_{Lin}}{\pi }_{T_{Lin}}{\pi }_{Q_{Lin}}{\pi }_{E_{Lin}}\right)+\left({\lambda }_{b_{CL}}{\pi }_{T_{CL}}{\pi }_{Q_{CL}}{\pi }_{E_{CL}}\right)$$

(49)

where the ${\pi }_T$ of inductors, T_HS, and $\Delta T$ are defined as in the following Equations (50)–(52):

$${\pi }_{T\_L}=e^{\left[-\frac{0.11}{8.67 \times {10}^{-5}}\left(\frac{1}{T_{HS} + 273}-\frac{1}{298}\right)\right]}$$

(50)

$$T_{HS}=T_a+1.2\Delta T$$

(51)

$$\Delta T=\frac{125P_{Loss\_L}}{A_L}$$

(52)

Additionally, the failure rate of capacitors (C₁, C₂, C₃, and C_o) is calculated as follows:

$${\lambda }_{Capacitors}={\displaystyle \sum _{j=1}^4{\lambda }_{C_j}}={\displaystyle \sum _{j=1}^4\left({\lambda }_{b_j} {\pi }_{T_j} {\pi }_{V_j} {\pi }_{C_j} {\pi }_{Q_j} {\pi }_{E_j} {\pi }_{Ca{p}_j} {\pi }_{S{R}_j}\right)}$$

(53)

$${\pi }_V={\left(\frac{S_C}{0.6}\right)}^n$$

(54)

$${\pi }_{Cap}={\left(C in \mu F\right)}^m$$

(55)

The temperature factor for capacitors can be reached by Equation (56), as follows:

$${\pi }_{T\_C}={\mathrm{e}}^{\left[-\frac{0.35}{8.67 \times {10}^{-5}}\left(\frac{1}{T + 273}-\frac{1}{298}\right)\right]}$$

(56)

The content of the used parameters is presented in

Table 3. Parameters utilized for reliability analysis.

Parameter	Value	Parameter	Value
${\lambda }_b$ for switches	0.012	${\pi }_Q$	8
${\lambda }_b$ for diodes	0.0038	πE	1
${\lambda }_b$ for capacitors	0.002	${\pi }_C$	1
${\lambda }_b$ for magnetics	0.004	${\pi }_{SR}$	1
Ta	25 °C	AL	7
$R_{\theta jA}$ for switches	40.5 °C/W	z	2.43
$R_{\theta jA}$ for diodes	62 °C/W	n	3
πA	8	m	0.23

. The total FR of the suggested high step-up topology is determined as follows:

$$\begin{array}{l}F{R}_{converter}=\left(F{R}_{Switch}=3.01\right)+\left(F{R}_{Diode}=2.87\right)+\left(F{R}_{Magnetic}=1.92\right)+\left(F{R}_{Capacitor}=1.56\right)\\ =9.36 \frac{failure}{1 \mathit{million} \mathit{hours}}\Rightarrow \hspace{1em}{\lambda }_{converter}=0.0819 \frac{failure}{year}\end{array}$$

(57)

Thus, MTTF is obtained as follows:

$$MTTF={\displaystyle {\int }_0^{\infty }r\left(t\right)dt}=\frac{1}{F{R}_{converter}}=12.21 years$$

(58)

It should be noticed that when increasing the converter’s rated power, current level, power losses, temperature, and failure rate are increased, which leads to lower reliability.

5. Discussion on the Feature Proposed Converter and Other Converters

Table 4. Comparison of the proposed converter features with other converters.

Converter	[10]	[11]	[13]	[14]	[17]	[18]	[21]	[22]	Boost	Proposed Converter
Voltage conversion ratio	$\frac{1 + ND}{1 - D}$	$\frac{1}{D(1 - D)}$	$\frac{N + 2}{1 - D}$	$\frac{\left(1 + ND\right)2}{1 - D}$	$\frac{2 + N - D}{1 - D}$	$\frac{N}{1 - D}$	$\frac{N + 1}{1 - D}$	$\frac{3 + D}{1 - D}$	$\frac{1}{1 - D}$	$\frac{2N - D}{1 - D}$
Mswitch	$\frac{1}{1 + ND}$	1	$\frac{1}{N + 2}$	0.5	$\frac{1}{2 + N - D}$	$\frac{1}{N}$	$\frac{1}{N}$	$\frac{2}{3 + D}$	1	$\frac{N - 1}{2N - 1}$
Mdiode	$\frac{N}{1 + ND}$	1	$\frac{N + 1}{N + 2}$	0.5	$\frac{1 + ND}{2 + N - D}$	1	$\frac{N}{N + 1}$	$\frac{2}{3 + D}$	1	$\frac{N - 1}{2N - 1}$
No of Diodes	2	2	3	4	2	4	1	4	1	3
No of Switches	1	2	1	2	1	1	3	1	1	1
No of capacitors	3	2	3	2	2	4	3	4	1	4
No of inductors	2	2	-	0	-	1	-	2	1	1
No of coupled inductors	1	-	1	1	1	1	1	-	-	1
Total devices no.	9	8	8	9	6	11	8	11	4	10
Efficiency	94	94.2	92.5	92.8	93.6	96.2	94	92.25	90	96
Soft Switch	No	No	Yes	No	No	Yes	Yes	No	-	Yes

compares the proposed design to various prior topologies regarding voltage conversion ratio, maximum voltage across the switch (M_switch), maximum voltage through the diode (M_diode), component contents, soft switching capabilities, and efficiency. The given converter has a high voltage rate and fewer losses with a smaller maximum voltage throughout the semiconductors, making it suitable for renewable applications, such as solar. When the value of N is near 1, a high load voltage with a tiny peak voltage can be obtained across the diode and the switch. By reducing the value of N, the converter volume, the number of cores, and the cost of the proposed topology are reduced. Table 4 shows the proposed construction’s advantages and disadvantages compared to alternative converters. Figure 3a–c illustrates the voltage gain curve about the duty cycle, the maximum voltage of the switch about the duty cycle, and the maximum voltage throughout the diode about the duty cycle.

Table 4 shows the relationships between the presented structure voltage rate and duty cycle and existing converters (a). For all conversions, N = 2 is taken into account. Concerning Figure 3a, it is clear that the recommended topology has a higher load voltage ratio in comparison to the other topologies. The converters shown in [13,14] have a significant voltage gain, but their overall losses are substantial in contrast to the suggested converter, which is not recommended for use in high-power applications. The converter proposed in [18] can achieve high voltage conversion ratios with substantial losses, but it uses many components, raising the cost. Furthermore, the voltage rate of the given structure is higher when N and duty cycle are modest. As a result, the suggested structure may be used in various power level systems for quick, sustainable energy, LED drivers, and so on.

Figure 3 depicts the maximum voltage of the power switch curve dependent on the duty cycle (b). The peak voltage of the switch can be reduced by reducing the turn relation (for N > 1) of the magnetic coupling. As a result, just one switch with a lower resistance R_DS-ON may be selected, resulting in lower conduction losses. The maximum voltage stress is high across the converters introduced in [10,14,18,21], necessitating a high-power switch at a high cost. However, by selecting an appropriate turn relation of the magnetic coupling (N), a converter with a high voltage ratio and a lower peak voltage across the switch may be given at a cheaper cost. As a result, the efficiency of the suggested converter can be raised.

As seen in Figure 3c, the suggested structure’s maximum voltage through the diode is low compared to alternative configurations. The voltage stress on the diode of the recommended converter is limited to 0.18 for N = 1.3, resulting in the usage of diodes with reduced voltage stress and cost. The peak voltage across the diode in the described converters [11,17,22] is high, and single switching is used in these architectures.

6. Result and Discussion

The laboratory verified the specified structure to corroborate the theoretical and mathematical analyses.

Table 5. Specifications of the used elements.

Parameter	Specifications
Output Power (Po)	150 W
Power supply voltage (Vin)	20 V
Load voltage (Vo)	150 V
Operation frequency of the switch (fs)	25 kHz
Turn ratio of the coupled inductor N(N1/N2)	2/1
Magnetizing inductance (Lm)	250 µH
Input inductor (Lin)	500 $\mathrm{\mu }\mathrm{H}$
MOSFET (S)	STW55NM60
Diodes	RHRP15120
The used capacitors (C1, C2, C3)	100 µF/220 V
Output capacitor (Co)	470 µF/400 V

shows the essential specifications of the shown converter. The ATEMEGA16 microcontroller was used to control and generate the gate signal necessary to implement the given converter.

Figure 4, Figure 5 and Figure 6 show the experimental waveforms of the suggested topology in the CCM procedure. It should be noted that the recommended converter is written in D = 0.61 (duty-cycle). The primary switch’s OFF-state voltage waveform and drain-source current are shown in Figure 4a with a value of 51 V and 15 A, respectively. The peak voltage across the switch is far lower than the load voltage. The input current waveform is indicated in Figure 4b. In accordance with Figure 4b, the input side’s flowing current is continuous, extending the power supply’s lifetime. Furthermore, the input current ripple is about 8%, which is poor compared to the previous works. The diode’s voltage stress and current waveforms are illustrated in Figure 5a–c, respectively. According to Figure 5a, the peak voltage through the diode D₁ is about 51 V, and also the i_D1 = 12 A. According to Figure 5a, it is apparent that the diode D₁ is switched off in the ZCS condition. The voltage and current waveform of diode D₂ have been shown in Figure 5b, and the peak voltage throughout diode D₂ is about 99 V. Related to Figure 5b, in the zero instant of the current, the diode turns off, confirming the ZCS condition for the proposed converter. According to Figure 5b, i_D2 is about 2 A. Figure 5c depicts the voltage and current waveforms of the diode D_o, which are about 99 V and 4.1 A, respectively. The output voltage and capacitors C₁, C₂, C₃, and C_o voltage waveforms are displayed in Figure 6a–d, respectively. Figure 6a illustrates that the value of the capacitor voltage C₁ is about 69 V. In Figure 6b, V_C2 is about 20 V. V_C3 is approximately 51 V, as illustrated in Figure 6c. As displayed in Figure 6d, it can be noticed that the input voltage of the 20 V has increased to 150 V. From Figure 6d, it is also apparent that the output voltage ripple is very poor, and it can be ignored. The first and secondary side winding of the coupled inductor current have been shown in Figure 7a. From the technical survey and experimental tests, it is concluded that the laboratory waveforms verify the technical and mathematical formulas.

The theoretical analysis and findings show that the proposed structure is a viable option for green energy sources for instant PV panels (due to the low content of input current ripple and higher load voltage ratio). It may be utilized for varied power levels due to using a single power switch, lower peak voltage via the semiconductors, and higher voltage gain.

Figure 8 illustrates the efficiency curve for various power ratings, and Figure 9 illustrates an experimental prototype of proposed converter. The efficiency is controlled by taking into account parameters, such as N = 2, D = 0.61, and f_s = 25 kHz. At an input voltage of 20 V and an output power of 150 W, the mentioned topology achieves a maximum efficiency of around 96%, as depicted in Figure 8. The overall load efficiency is approximately 95.2% at 300 W. It is apparent that the efficiency of the recommended topology exhibits a narrow margin when the load fluctuates between 150 W and 300 W. Hence, the overall efficiency of the suggested topology at all power levels is greater than 95%, which is recommended for sustainable utilization for instant PV generation.

7. Conclusions

This paper suggested a transformer-less DC–DC converter suitable for sustainable energy systems. According to the mathematical analysis and comparison survey, the contributions of this research can be presented as follows:

• A coupled inductor-based DC–DC converter with higher voltage gains in comparison with other topologies in the literature. As a result, the proposed converter can achieve higher voltage gains with smaller values of the duty cycles than others.
• Simple control system of the converter thanks to the existence of one switch.
• Reduced input current ripple, which can increase the lifetime of the used input source, such as a PV or a battery.
• Operation of the diodes under ZCS conditions reduces the reverse recovery losses of the regenerative diode.
• The lower peak voltage on the switch makes it possible to select a MOSFET switch with a lower nominal voltage which, in turn, can reduce the conduction and switching losses.

Finally, an experimental prototype with a power level of 150 W was implemented to validate the effectiveness of the suggested structure. The experimental results stated that the proposed converter can operate under the 150 V output voltage with an efficiency of 96% at full load. In general, the described structure may be a suitable option for energy conversion applications, such as PV power production and fuel cells.

Despite the advantages mentioned above, this converter has some limitations that can be the basis for further research. In this converter, the soft switching operation has not been provided. Furthermore, the bidirectional power flow in which the power can be transferred from the output to the input, or a storage system can be added.