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Article

Research on a Sliding Mode Self-Disturbance-Rejection Control Strategy for Three-Phase Interleaved Buck Converters

College of Electrical and Information Engineering, Beihua University, Jilin 132021, China
*
Author to whom correspondence should be addressed.
Energies 2026, 19(8), 1846; https://doi.org/10.3390/en19081846
Submission received: 8 March 2026 / Revised: 27 March 2026 / Accepted: 31 March 2026 / Published: 9 April 2026

Abstract

To address the issues of slow dynamic response and poor disturbance rejection in three-phase interleaved parallel buck converters under disturbance conditions such as voltage or load transients, an improved sliding mode auto-disturbance rejection control (SM-ADRC) strategy is proposed. Firstly, the traditional ADRC algorithm suffers from reduced disturbance observation accuracy in the extended state observer (ESO) due to discontinuous switching of the nonlinear function at segment boundaries. To address this, a novel nonlinear function is designed using an interpolation fitting method. Concurrently, an improved ESO is constructed based on deviation-control principles, utilising the deviation between each state variable and its observed value. Secondly, an enhanced state error feedback law combines an improved exponential approach law with an integral sliding mode surface, thereby enhancing the control system’s robustness. Finally, simulation comparisons of output voltage fluctuations and power response speeds under various operating conditions validate the superiority and feasibility of the proposed SM-ADRC strategy over both the conventional ADRC strategy and PI control strategy.

1. Introduction

With the rapid advancement of modern power electronics, buck-type DC–DC converters serve as pivotal components in power conversion, playing a crucial role in diverse power management and industrial applications. Interleaved parallel technology extends the output power of buck converters while reducing input and output current ripple, enabling their widespread adoption in energy storage systems [1,2,3]. Optimising the control strategy of buck converters enhances output voltage stability, thereby improving the system’s dynamic performance.
However, the stability and control performance of three-phase interleaved parallel buck converters remain challenging due to factors such as power supply fluctuations, load variations, and environmental disturbances [4,5,6]. Presently, numerous advanced nonlinear control methodologies have been applied to the control of interleaved parallel buck converters, such as sliding mode control (SMC) [7], active disturbance rejection control (ADRC) [8], passive control [9], and model predictive control [10]. Among these, traditional ADRC still exhibits certain limitations. To further enhance the control performance and disturbance rejection capability of ADRC, various improvement techniques have been proposed. These can be broadly categorised into two groups. The first group focuses on optimising the nonlinear function of the extended state observer (ESO). For instance, ref. [11] introduces a least-squares parameter identification method to modify the nonlinear function, while refs. [12,13] replace it with an anti-chattering factor to improve control performance. Although these approaches enhance observation accuracy to some extent, the underlying nonlinear functions remain piecewise-defined and are non-differentiable at segment boundaries, which can induce high-frequency oscillations and degrade observation precision. The second group adjusts the gain in the large-error segment of the regulation function [14,15]. However, these modifications do not fundamentally resolve the discontinuous switching issue inherent in the ESO structure, leaving room for further improvement in both observation smoothness and dynamic response.
Among various control algorithms, sliding mode control (SMC) has garnered significant attention for its simplicity, high precision, and strong robustness [16,17,18]. A key research focus has been the improvement of the reaching law, which directly affects both convergence speed and chattering suppression. Existing improvement approaches can be broadly categorised into two types. The first category enhances the reaching law by introducing system state variables into its structure. Early efforts, such as [19,20], incorporate state variables into the constant and exponential terms of traditional reaching laws, achieving limited chattering reduction. Reference [21] further refines this idea by designing a state-variable-based reaching law to reduce steady-state error; however, the high switching frequency of the sign function still induces considerable chattering, compromising the dynamic quality of the reaching motion. The second category focuses on modifying the switching function itself to suppress chattering. Studies such as [22,23,24] adopt system-state-adaptive nonlinear coefficients that approach zero near the sliding surface, effectively mitigating chattering caused by fixed gains. Nevertheless, this approach increases nonlinear computational complexity, leading to slower dynamic response and higher real-time implementation difficulty. Reference [25] replaces the sign function with a saturation function to control chattering and overshoot, but its computational process remains complex and limits practical applicability. In summary, existing improved reaching laws struggle to simultaneously achieve fast convergence, low chattering, and low computational burden—a gap that motivates the design of the modified exponential reaching law in this work.
Table 1 summarises the categorisation and limitations of existing ADRC and SMC improvement approaches. However, the aforementioned improvements to ADRC and SMC have been developed largely along separate paths. A composite strategy that synergistically integrates an enhanced ESO with a refined sliding mode reaching law remains underexplored, particularly for three-phase interleaved buck converters operating under complex disturbance conditions. Specifically, two critical gaps persist in the existing literature:
(1)
Regarding ADRC, although various modifications to the nonlinear function and gain parameters have been proposed, the fundamental issue of discontinuous switching in the ESO—caused by the non-differentiability of the nonlinear function at segment boundaries—has not been fully resolved. This limitation impairs observation smoothness and dynamic response.
(2)
Regarding SMC, existing improved reaching laws struggle to simultaneously achieve fast convergence, effective chattering suppression, and low computational complexity. Approaches that introduce state variables offer limited chattering reduction, while those that modify the switching function often incur increased computational burden or slower dynamic response.
To bridge these gaps, this paper proposes an enhanced sliding mode active disturbance rejection control (SM-ADRC) composite strategy. The main contributions are threefold: First, a fundamentally new nonlinear function is designed using interpolation fitting with a combination of sine and tangent functions. Unlike existing piecewise functions, this new function is continuous and differentiable across the entire domain, eliminating the high-frequency oscillations caused by non-differentiable points in traditional ESO. Second, building upon this new nonlinear function, an improved ESO is constructed based on deviation control principles. By incorporating the tracking deviations between state variables and their observations as additional control inputs, this structural enhancement accelerates system convergence and further improves observation accuracy. Third, a modified exponential reaching law is proposed by integrating a tuning function and system state variables into the traditional reaching law. This improved law retains the advantages of conventional approaches while achieving faster convergence and more effective chattering suppression. Finally, by combining the improved ESO with the modified reaching law, the proposed SM-ADRC strategy offers an integrated solution that simultaneously addresses observation accuracy, convergence speed, and chattering suppression. Simulation results validate the superiority of this strategy over conventional ADRC and PI control under various operating conditions.

2. Description of the Three-Phase Interleaved Parallel Buck Converter

The three-phase interleaved parallel buck converter is illustrated in Figure 1. Its circuit topology employs a multi-phase interleaved parallel configuration, where all switching devices operate at identical frequencies with fixed phase-shifted triggering. Through the superposition of three-phase inductor currents, ripple-generating components partially cancel each other out, significantly reducing output current ripple.
As depicted, the three-phase interleaved parallel buck converter comprises three identical buck converters connected in parallel, where U in and U o denote input and output voltages, respectively, C represents the filter capacitor, S 1 ~ S 6 are the switching transistors, C 1 and C 2 denote input and output filter capacitors, respectively, L 1 ~ L 3 is the inductor, i L 1 , i L 2 , i L 3 is the three-phase inductor current, and R is the load. The duty cycles of the switching transistors S 1 ,   S 3 ,   S 5 are identical, with trigger phase angles differing by 120 ° . This results in a phase shift of 120 ° between the PWM drive waveforms of each phase.
The three-phase interleaved parallel buck converter operates by alternating three converters modules, whose mathematical model can be simplified to that of a single buck converter, as shown in Figure 2. The circuit operates in two states. State 1: Switch S 1 is on, S 2 is off, and the anti-parallel diode D 1 ,   D 2 is off; State 2: Both switches S 1 ,   S 2 are off, the anti-parallel diode D 1 is off, and D 2 is on. Applying Kirchhoff’s laws yields the differential equations for both states:
Neglecting the effects of component parasitic parameters and applying Kirchhoff’s laws, the state–space equations for the symmetrical three-phase interleaved buck converter can be expressed as:
d i L d t d U o d t = 0 1 L 1 C 1 C R i L U o + U i n L 0 d
where i L represents the inductor current; L denotes the power inductor; and d is the duty cycle. Applying the Laplace transform yields the transfer function from inductor current to output voltage G v i s :
G v i s = U o s i L s = R R C s + 1

3. Overall Control Strategy Design

The overall control block diagram is shown in Figure 3. The voltage outer loop incorporates the nal function and deviation control principle to enhance the traditional extended state observer, thereby improving observation accuracy and enabling monitoring of both output voltage and disturbances. Sliding mode control is applied to the state error feedback law, replacing the conventional proportional control component to enhance output voltage tracking speed and compensation. In Figure 3, Z 1 represents the observed value of the converter’s output voltage, while Z 3 denotes the observed value of the converter’s total disturbance. These observed values are then employed as reference inputs for the current inner loop. The current inner loop adopts a PI current-sharing phase-shift control method to independently regulate the three-phase inductor currents. Finally, a PWM waveform is generated to control the switching of the converter’s power transistors.

3.1. Voltage Outer-Loop Control Strategy Design

3.1.1. Improved Extended State Observer

The controller design is derived from the mathematical model expression in Equation (1). To meet the requirements of self-disturbance-rejection control, the input-to-output expression is rewritten as:
y = a y + b 0 I i n + w = b 0 u + f ( y , I i n , w )
where a denotes the output variable coefficient; I i n represents the inner-loop current reference; y signifies the converter output voltage; w denotes external disturbances, encompassing parameter variations, sampling errors, and unmodelled dynamics; f d t constitutes the converter’s overall disturbance function; and b 0 indicates disturbance compensation, with b 0 = 1 / G and u = I i n .
Let the state variables be defined as: x 1 = y , x 2 = x ˙ 1 = y ˙ , x 3 = f d t . Then the system’s state equations are:
x ˙ 1 = x 2 x ˙ 2 = x 3 + b 0 u x ˙ 3 = f ˙ d t y = x 1
The design equations for the traditional ESO are thus derived as:
e = z 1 y z ˙ 1 = z 2 l 1 e z 2 = z 3 l 2 fal ( e , α 1 , δ ) + b 0 u z ˙ 3 = l 3 fal ( e , α 2 , δ )
The nonlinear function f a l ( e , a , δ ) employed in the traditional ESO is piecewise defined at the horizontal coordinates 0 and ± δ , exhibiting continuity at these junctures. At x > 0 , taking the first derivative of f a l ( e , a , δ ) yields Equation (6):
d d x fal ( e , a , δ ) = a x a 1 , e > δ 1 δ 1 a , 0 < e δ
Substituting e = δ into the above yields:
a δ a 1 1 δ 1 a
Equation (7) indicates that f a l ( e , a , δ ) is not differentiable at e = δ , and similarly not differentiable at e = δ . This will cause the system to generate high-frequency oscillations, adversely affecting control performance and reducing the observation accuracy of the ESO module.
To resolve these issues, an interpolation-based approach is employed to design an improved nonlinear function n a l ( e , a , δ , k ) as follows:
n a l ( e , a , δ , k ) = η 1 sin ( e ) + η 2 sin 2 ( e ) + η 3 tan ( e ) , | e | δ sign ( e ) | e | α , δ < | e | < k sign ( e ) | k | α , k | e |
n a l ( e , a , δ , k ) Formed by the linear combination of sin ( e ) , sin 2 ( e ) , and tan ( e ) , the combined use of sine and tangent functions renders n a l ( e , a , δ , k ) smoother within the interval and exhibits stronger convergence. To ensure the function is continuous and differentiable at e = δ , the following condition must be satisfied:
n a l ( e , a , δ , k ) = δ a , x = δ n a l ( e , a , δ , k ) = δ a x = δ n a l ( e , a , δ , k ) = a δ a 1 x = δ n a l ( e , a , δ , k ) = a δ a 1 x = δ
Solving yields:
η 1 = δ a a δ a 1 cos 2 δ tan δ sin 3 δ η 2 = 0 η 3 = δ a cos δ a δ a 1 sin δ sin δ tan 2 δ
To validate the nonlinear function n a l ( e , a , δ , k ) , simulations were conducted. When α = 0.2 , δ = 0.5 , and k = 1 , the characteristic curve simulation results for the traditional nonlinear function f a l ( e , a , δ ) and the improved nonlinear function n a l ( e , a , δ , k ) are shown in Figure 4. The ratio of the function to the error e is termed the error gain; the error gain curves for both functions are depicted in Figure 5.
The core principle of deviation control lies in dynamically adjusting the control input based on the deviation between the system setpoint and actual output. This progressively reduces or eliminates the deviation, enabling the system output to gradually converge towards the desired trajectory. Self-disturbance-rejecting control operates precisely on this deviation adjustment mechanism. By continuously calculating the error between the reference input and actual output, it modifies the control quantity accordingly to suppress disturbances and optimise system performance.
Traditional ESO operates by tracking the system state variables x 1 , x 2 , and x 3 in real time through the system state variables z 1 , z 2 , and z 3 . It adjusts the deviation e between z 1 and x 1 by modifying the derivative of z 1 , adhering to the error principle. However, the tracking of system state variables by z 1 , z 2 , and z 3 follows a specific sequence. First, z 1 tracks x 1 ; next, z 2 tracks x 2 ; finally, z 3 tracks z 3 . When z 1 completes tracking of x 1 , the extremely small deviation e renders z 2 unable to track x 2 and z 3 unable to track z 3 . At this point, substantial gains l 2 and l 3 would be required to complete tracking successfully. However, this operation would significantly impact the ESO’s performance, potentially causing oscillations or even system instability. Therefore, by calculating the deviation e 2 between z 2 and x 2 , and the deviation e 3 between z 3 and x 3 , these values serve as control quantities for z 2 and z 3 , thereby enhancing the system’s convergence speed.
From Equation (5), the conventional ESO can be expressed as:
z 1 = e + x 1 z 2 = z ˙ 1 + l 1 e z 3 = z 2 + l 2 f al ( e , α 1 , δ ) b 0 u
Based on Equation (4), it can be obtained that:
z ˙ 1 = x ˙ 1 + e ˙ = x 2 + e ˙ z ¨ 2 = z ¨ 1 + l 1 e ˙ = x ˙ 2 + e ¨ + l 1 e ˙ = x 3 + e ¨ + l 1 e ˙ + b 0 u
Substituting Equation (12) into Equation (11) yields:
z 1 = x 1 + e z 2 = x 2 + e ˙ + l 1 e z 3 = x 3 + e ¨ + l 1 e ˙ + l 2 fal ( e , α 1 , δ )
From Equation (13), it can be observed that the deviation between z 1 and x 1 is e , the deviation between z 2 and x 2 is e ˙ + l 1 e , and the deviation between z 3 and x 3 is e ¨ + l 1 e ˙ + l 2 fal ( e , α 1 , δ ) . Combined with n a l ( e , a , δ , k ) , the reconstructed improved ESO is:
e = z 1 x 1 z ˙ 1 = z 2 l 1 e z ˙ 2 = z 3 l 2 n al ( e ˙ + l 1 e , α 1 , δ , k ) + b 0 u z ˙ 3 = l 3 nal ( e ¨ + l 1 e ˙ + l 2 nal ( e , α 1 , δ , k ) , α 2 , δ , k )

3.1.2. Stability Proof of the Improved ESO

Error Dynamics
The system state equations are given by (4):
x ˙ 1 = x 2 x ˙ 2 = x 3 b 0 u x ˙ 3 = f ˙ d ( t )
Define the observation errors as e 1 = z 1 x 1 , e 2 = z 2 x 2 , e 3 = z 3 x 3 .
The improved ESO is described by:
e = z 1 x 1 = e 1 z ˙ 1 = z 2 l 1 e z ˙ 2 = z 3 l 2 n a l e ˙ + l 1 e , α 1 , δ , k + b 0 u + b 0 u z ˙ 3 = l 3 n a l e ¨ + l 1 e ˙ + l 2 nal ( e , α 1 , δ , k ) , α 2 , δ , k  
where n a l ( ) is the improved nonlinear function defined in (8), satisfying 0 < nal ( x ) x k f for x 0 .
From the structure, we observe that the inputs to the nonlinear functions represent the deviation control terms:
ε 2 = e ˙ + l 1 e = ( z 2 x 2 ) + l 1 ( z 1 x 1 ) = e 2 + l 1 e 1
ε 3 = e ¨ + l 1 e ˙ + l 2 nal ( e , α 1 , δ , k ) = e ˙ 2 + l 1 e 2 + l 2 nal ( e 1 )
These are precisely the error-based deviation quantities that accelerate convergence.
Subtracting the system dynamics from the observer dynamics and using the above relationships, the error dynamics can be derived as:
e ˙ 1 = e 2 l 1 e 1 e ˙ 2 = e 3 l 2 nal ( ε 2 ) ε 2 ε 2 e ˙ 3 = l 3 nal ( ε 3 ) ε 3 ε 3 f ˙ d ( t )
By defining γ 2 = nal ( ε 2 ) ε 2 and γ 3 = nal ( ε 3 ) ε 3 , we have 0 < γ 2 , γ 3 k f from Assumption 2.
Matrix Form and Assumptions
The error system can be written in compact form:
E ˙ = A ( E ) E + B f ˙ d ( t )
where E = [ e 1 , e 2 , e 3 ] T ,
A ( E ) = l 1 1 0 l 2 γ 2 l 2 γ 2 l 1 1 l 3 γ 3 ( l 2 γ 2 ) l 3 γ 3 ( l 1 + l 2 γ 2 l 1 ) l 3 γ 3 ,   B = 0 0 1
Note that the elements of A ( E ) are bounded due to 0 < γ 2 , γ 3 k f .
Assumption 1. 
f ˙ d ( t )  is bounded:    f ˙ d ( t ) M 1 .
Assumption 2. 
The nonlinear function satisfies  0 < nal ( x ) x k f  for all  x 0 .
Parameter Condition and Lyapunov Function
Choose observer gains satisfying:
l 1 > 0 ,   l 2 > 1 l 1 ,   l 3 > l 2 l 1 k f
Construct the Lyapunov function V ( E ) = E T P E with:
P = l 1 2 + l 2 + l 3 2 l 1 2 1 2 l 1 2 1 0 1 2 0 1
Under condition (22), P is positive definite.
Stability Analysis
Differentiating V and substituting (20):
V ˙ = E T   ( A T P + P A ) E + 2 E T   P B f ˙ d ( t )
Define Q = ( A T P + P A ) . It can be shown that under (22) and given the boundedness of γ 2 , γ 3 , the matrix Q is positive definite for all E . Therefore,
V ˙ λ min ( Q ) E 2 + 2 P B   E   | f ˙ d ( t ) |
Using Assumption 1 ( f ˙ d ( t ) M 1 ) and letting C = 2 P B M 1 :
V ˙ λ min ( Q ) E 2 + C E = E λ min ( Q ) E C
Hence, V ˙ < 0 whenever E > C / λ m i n ( Q ) , which implies that the observation errors are uniformly ultimately bounded.
When f ˙ d ( t ) = 0 , we obtain V ˙ λ m i n ( Q ) E 2 0 , guaranteeing asymptotic stability of the origin.

3.1.3. Design of an ESO-Based Sliding Mode Controller

After estimating the system state and total disturbance via ESO, sliding mode control is employed to regulate the output voltage. The output voltage tracking error is treated as the state variable of the sliding surface, with the sliding surface selected as:
s = e + c 0 t e d t
where e denotes the output voltage tracking error, e = V r e f U o , and c > 0 .
The derivative of the sliding surface is:
s ˙ = e ˙ + c e = V ˙ r e f U ˙ o + c e = f b 0 u + c ( V r e f U o )
To accelerate the convergence speed of the system state, ensuring convergence within a finite time while mitigating chattering phenomena, an exponential convergence rate is employed in the design of the sliding mode controller.
d s d t = ε sgn ( s ) k s ,       ε > 0 , k > 0 ,
Traditional exponential approach law: When ε is set to a high value, the speed at which the sliding surface is reached increases, but this introduces significant chattering. When ε is set to a low value, chattering is suppressed, but the approach process is prolonged, resulting in slower dynamic response. To address this issue, this paper proposes an improved exponential approach law:
s ˙ = k G ( s ) s ε F ( s ) tanh ( s ) G ( s ) = ln ( | s | + e ) F ( s ) = | x | a | x | e | x | / b + 1 / ( | s | + 1 ) , ε > 0 , k > 0 , a > 1 , b > 0 lim t | x | = 0
where x denotes the system state variable; tanh ( s ) represents the hyperbolic tangent function, employed here as a continuous switching function; ε adjusts the convergence strength of the sliding surface S; k influences the global convergence rate; and e is the natural constant.
To demonstrate the stability of the sliding mode controller, the Lyapunov function is selected as:
V = 1 2 s 2
Taking the derivative with respect to V and substituting into (26) yields:
V ˙ = s s ˙ = s k G ( s ) s ε F ( s ) sign ( s ) = k G ( s ) s 2 ε F ( s ) s tanh s
Equation (32) satisfies: G ( s ) > 0 ,   s 2 > 0 ,   F s > 0 ,   s · tanh s > 0 , yielding:
V ˙ = k G ( s ) s 2 ε F ( s ) s tanh ( s ) 0
where equality holds only when s = 0 . Hence, V ˙ is negative definite.
Thus, the system can reach the sliding surface within finite time. This indicates that the novel exponential convergence law not only guarantees the asymptotic stability of the system but also possesses the property of finite-time convergence.
From the preceding analysis, it follows that Equation (14) yields the estimated output voltage z 1 and the estimated total disturbance z 3 . Thus, the control law can be expressed as:
u = 1 b 0 k ln ( | s | + e ) s + ε | V r e f U o | a | V r e f U o | e V r e f U o / b + 1 | s | + 1 tanh ( s ) + c V r e f U o f
As analysed previously, the observer yields estimates z 1 for the output voltage U o and z 3 for the total disturbance. Consequently, the control law can be expressed as:
u = 1 b 0 k ln ( | s | + e ) s + ε | V r e f z 1 | a | V r e f z 1 | e V r e f z 1 / b + 1 | s | + 1 tanh ( s ) + c ( V r e f z 1 ) z 3
Equation (35) reveals that the sliding mode control law comprises an equivalent control term u e q = 1 b 0 c V r e f z 1 z 3 and a switching control term u s w = 1 b 0 k ln ( | s | + e ) s + ε | V r e f z 1 | a | V r e f z 1 | e V r e f z 1 / b + 1 | s | + 1 tanh ( s ) . The equivalent control guides the system state towards the sliding surface, while the switching control maintains the system state in motion upon the sliding surface. The ESO observes system disturbances and feeds them back to the sliding mode controller, thereby reducing the sliding coefficients, alleviating the pressure on the sliding mode controller, suppressing controller chattering, and enhancing the system’s disturbance rejection capability. Figure 6 illustrates the designed voltage outer-loop control structure.
To validate the effectiveness of the proposed sliding mode control, simulation analysis is conducted using a typical second-order system as an example, referencing Equation (1). The system design is as follows:
x ˙ 1 = x 2 x ˙ 2 = g u ( t ) + x 1 + h ( t )
The above equation assumes that the signals satisfy g = 10 , the disturbance signal is h = 10 sin ( π t ) , u ( t ) represents the controlled output, and θ denotes the position signal.
The sliding surface is defined as:
s = e ˙ + c e
where e denotes the position error and e ˙ denotes the position error rate of change, expressed as:
e = θ r e f θ , e ˙ = θ ˙ r e f θ ˙ ,
In the equation, θ r e f represents the desired position and θ denotes the actual position.
Combining Equations (36) to (38), we obtain
d s d t = c θ ˙ r e f θ ˙ + θ ¨ r e f θ g u ( t ) h ( t )
Substituting Equation (30) into Equation (39) yields the output of the sliding mode controller
u ( t ) = 1 g c θ ˙ r e f θ ˙ + θ ¨ r e f θ h ( t ) + k ln ( | s | + e ) s + ε | x | a | x | e x / b + 1 | s | + 1 tanh ( s )
The initial value of the controlled object x ( 0 ) is set to [ x 1 ,   x 2 ]   =   [ 2 ,   2 ] . Simulation parameters are configured as follows: traditional exponential approach law control parameters: ε = 12 , k = 25 , c = 15 ; approach law control parameters designed in Section 3.1.3: ε = 12 , k = 25 , c = 15 , α = 2 , b = 6 . The desired system position θ r e f = sin t and step signal are specified. The simulation comparison results for the approach laws are shown in Figure 7. Comparative analysis of dynamic responses under sinusoidal and step signals demonstrates that the proposed approach exhibits superior overall performance compared to traditional exponential approaches in terms of enhanced convergence speed, improved trajectory tracking accuracy, and effective suppression of system chatter.

4. Simulation Analysis

To validate the effectiveness of the proposed control strategy, a three-phase interleaved parallel buck converter was modelled in MATLAB/Simulink R2024a, which verified the correctness of the theoretical analysis while enabling a comparison of the dynamic performance of the proposed control, PI control, and conventional LADRC under identical circuit parameters. To ensure a fair comparison, all controllers were tuned using systematic methods with consistent design objectives. Specifically, the PI controller was tuned using the modulus optimum method, while the conventional ADRC and the proposed SM-ADRC share the same observer bandwidth ω o = 1200   rad / s and controller bandwidth ω c = 400   rad / s , following the bandwidth parameterisation approach. For ADRC, the observer gains are set as β 1 = 3 ω o , β 2 = 3 ω o 2 , β 3 = ω o 3 ; for SM-ADRC, the same bandwidth-parameterised gains l 1 = 3 ω o , l 2 = 3 ω o 2 , l 3 = ω o 3 are used, together with sliding mode parameters c = 100 , λ = 500 , k = 0.1 , and a = 5 , selected to achieve a comparable closed-loop bandwidth. This consistent parameter selection ensures that any observed performance differences reflect structural advantages rather than tuning discrepancies. Due to space constraints, key circuit topology parameters are listed in Table 2, while the control circuit parameters for all three strategies are summarised in Table 3.
The switching frequency is set to 100 kHz, which is typical for ZVS operation. The proposed SM-ADRC strategy, with its fixed-frequency PWM and interleaved structure, is inherently compatible with ZVS implementation. Recent studies, such as [26], have demonstrated the integration of advanced control with soft-switching in high-frequency converters. A detailed ZVS analysis is planned for future work.

4.1. Expected Voltage Step Change Comparison

In the absence of other disturbances, an experiment was designed to compare desired output voltage step changes. The desired voltage was set to change sequentially from 300 V to 200 V and then to 400 V after 0.5 s. The control results are shown in Figure 8a. It can be observed that the output terminal can track the desired voltage system settings relatively quickly. Compared to traditional ADRC and PI control, the SM-ADRC exhibits a faster response speed and smaller steady-state error. Figure 8b and Figure 8c, respectively, illustrate the variations in three-phase interleaved inductor currents and output current during SM-ADRC. The results demonstrate effective current-sharing and rapid response during the control process.

4.2. Comparison of Load Disturbance Responses

Considering load transients, the system’s disturbance immunity is verified. Load resistance R was initially set to 20   Ω , abruptly changing every 0.5 s to 10   Ω , 20   Ω , and 10 3   Ω . Results are shown in Figure 9a, exemplifying the 0.5 s load disturbance. When the load suddenly decreased to 10   Ω at 0.5 s, the output voltage fluctuated. Under SM-ADRC, the peak voltage fluctuation reached 9.9 V with a recovery time of 18   ms . In contrast, under ADRC and PI control, peak voltage fluctuations were 20.2 V and 17.1 V respectively, with recovery times of 44   ms and 39   ms . Figure 9b depicts the variation in three-phase interleaved inductor current during the SM-ADRC process. Following a load disturbance at 0.5 s, the load decreases while the input current correspondingly increases, satisfying the principle of energy conservation. Figure 9c illustrates the output current variation in SM-ADRC during three-phase interleaved parallel operation. The current response during control is observed to be relatively rapid. Consequently, under load transients, the proposed control strategy effectively suppresses voltage fluctuations, shortens recovery time, and demonstrates superior disturbance rejection performance.

4.3. Comparison of Input Voltage Disturbances

To compare the dynamic performance of the three control strategies under input voltage disturbances, the input voltage was abruptly stepped to 650 V, 850 V, and 600 V at 0.5 s intervals. The results are shown in Figure 10a, taking the input voltage disturbance at 0.5 s as an example. At 0.5 s, the input voltage abruptly changed from 750 V to 650 V, causing fluctuations in the output voltage. Under SM-ADRC, the peak output voltage fluctuation was 5.3 V, with a recovery time of 15   ms . Under PI and ADRC, the peak output voltage fluctuations were 11.6 V and 11.2 V, respectively, with recovery times of 31   ms and 42   ms . The proposed control strategy demonstrated significant superiority over traditional ADRC and PI control strategies in terms of voltage overshoot and dynamic response speed.
To provide a more quantitative comparison of the three control strategies, the key performance metrics extracted from the simulation results are summarised in Table 4.

5. Conclusions

This paper addresses the issue of fluctuating DC bus voltages in battery energy storage systems by proposing an enhanced SM-ADRC composite control strategy. Theoretical analysis and simulation comparisons validate the superiority of the proposed control strategy, yielding the following conclusions:
(1)
By modifying the nonlinear function in conventional ADRC and recalculating the deviation of the ESO state variable as the control input based on deviation control principles, the observer’s disturbance estimation accuracy and dynamic response speed are enhanced.
(2)
The modified state error feedback law employs integral sliding mode control to enhance robustness, while an improved exponential convergence rate mitigates steady-state degradation caused by chattering, thereby strengthening the disturbance rejection capability.
(3)
Comparative analysis of overshoot magnitude and duration under load and input voltage disturbances reveals that the proposed SM-ADRC strategy demonstrably outperforms conventional ADRC and PI control schemes in disturbance rejection and transient performance enhancement, exhibiting significant engineering applicability.
In addition to the performance improvements demonstrated in simulation, the proposed SM-ADRC strategy is designed with practical implementation in mind. The selected controller bandwidth w c = 400 corresponds to a sampling frequency of 10   kHz , which is readily achievable with standard digital signal processors and leaves sufficient margin for computation. The improved ESO inherently estimates and compensates for total disturbances, including parameter mismatches and model uncertainties, thereby maintaining robustness under non-ideal conditions. The modified reaching law employs a continuous hyperbolic tangent function, which effectively reduces high-frequency switching noise compared to conventional sliding mode control. The additional computational burden introduced by the nal function and the hyperbolic tangent is moderate and well within the real-time capabilities of modern microcontrollers. Experimental validation on a hardware prototype is planned for future work to further substantiate the practical applicability of the proposed method.

Author Contributions

Conceptualization, S.X. and Y.C.; Methodology, S.X. and C.L.; Software, Y.C.; Validation, S.X.; Formal analysis, K.L.; Investigation, Y.C.; Resources, C.L.; Writing—original draft, K.L.; Writing—review & editing, C.L. and K.L. All authors have read and agreed to the published version of the manuscript.

Funding

This article was supported by the General Innovation Funding Programme for Graduate Students of Beihua University (Grant No. YCHZ [2025]057) for the project “Research on Control Strategy of Boost Converter for New Energy Vehicles”, and by the Jilin Provincial Development and Reform Commission Project “Monitoring and Early Warning of High-Power Rectifier Devices and Energy Efficiency Evaluation System” (Grant No. 2022C045-11).

Data Availability Statement

The original contributions presented in the study are included in the article, further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Topology of a three-phase interleaved parallel buck converter.
Figure 1. Topology of a three-phase interleaved parallel buck converter.
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Figure 2. Equivalent circuit of buck converter.
Figure 2. Equivalent circuit of buck converter.
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Figure 3. Control principle of three-phase interleaved parallel buck converter.
Figure 3. Control principle of three-phase interleaved parallel buck converter.
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Figure 4. Comparison of characteristic curves for traditional and improved nonlinear functions.
Figure 4. Comparison of characteristic curves for traditional and improved nonlinear functions.
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Figure 5. Comparison of error gain curves for traditional and improved nonlinear functions.
Figure 5. Comparison of error gain curves for traditional and improved nonlinear functions.
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Figure 6. Voltage outer-loop control structure.
Figure 6. Voltage outer-loop control structure.
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Figure 7. Simulation comparison of traditional approach law and designed approach law: (a) sine wave response under disturbance 10 sin ( π t ) ; (b) convergence test of sliding surface under; (c) step response under disturbance 10 sin ( π t ) ; (d) step error under disturbance 10 sin ( π t ) ; (e) sliding mode convergence rate for external disturbance signal.
Figure 7. Simulation comparison of traditional approach law and designed approach law: (a) sine wave response under disturbance 10 sin ( π t ) ; (b) convergence test of sliding surface under; (c) step response under disturbance 10 sin ( π t ) ; (d) step error under disturbance 10 sin ( π t ) ; (e) sliding mode convergence rate for external disturbance signal.
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Figure 8. Comparison of output voltage control and SM-ADRC-controlled inductor current changes during desired voltage step transitions. (a) Comparison of output voltage control during desired voltage transients; (b) three-phase inductor currents under SM-ADRC during desired voltage step changes; (c) output current under SM-ADRC during desired voltage step change.
Figure 8. Comparison of output voltage control and SM-ADRC-controlled inductor current changes during desired voltage step transitions. (a) Comparison of output voltage control during desired voltage transients; (b) three-phase inductor currents under SM-ADRC during desired voltage step changes; (c) output current under SM-ADRC during desired voltage step change.
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Figure 9. Comparison of output voltage control and SM-ADRC-controlled inductor current variation during load disturbance. (a) Comparison of output voltage during load disturbance; (b) three-phase inductor current under load disturbance with SM-ADRC; (c) output current of SM-ADRC during load disturbance.
Figure 9. Comparison of output voltage control and SM-ADRC-controlled inductor current variation during load disturbance. (a) Comparison of output voltage during load disturbance; (b) three-phase inductor current under load disturbance with SM-ADRC; (c) output current of SM-ADRC during load disturbance.
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Figure 10. Control comparison of output voltage and variation in inductor current under SM-ADRC during input voltage disturbance. (a) Comparison of output voltage during input voltage disturbance; (b) output current under SM-ADRC during input voltage disturbance.
Figure 10. Control comparison of output voltage and variation in inductor current under SM-ADRC during input voltage disturbance. (a) Comparison of output voltage during input voltage disturbance; (b) output current under SM-ADRC during input voltage disturbance.
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Table 1. Categorisation and limitations of improved ADRC and improved reaching law studies.
Table 1. Categorisation and limitations of improved ADRC and improved reaching law studies.
Technical CategoryReferenceCore Technique/MethodProblem AddressedLimitation/Gap Filled by This Work
ADRC Improvements
Optimisation of ESO Nonlinear Function[11]Least-squares parameter identification to modify the nonlinear functionEnhances ADRC disturbance rejection capabilityThe nonlinear function remains piecewise-defined and non-differentiable at segment boundaries, which may induce high-frequency oscillations and limit observation accuracy
[12,13]Introduction of an anti-chattering factor to replace the conventional nonlinear functionReduces chattering and improves control performanceThe function remains piecewise and non-differentiable; no structural improvement to the ESO is made
Adjustment of Regulation Function Gain[14,15]Gain adjustment in the large-error segment of the regulation functionEnhances disturbance rejection under large-error conditionsDoes not resolve the discontinuous switching issue inherent in the ESO; observation smoothness and dynamic response remain to be improved
SMC Improvements
Introduction of State Variables into Reaching Law[19,20]Incorporation of system state variables into the constant and exponential terms of the reaching lawMitigates chatteringChattering suppression is limited; convergence speed and dynamic response are not significantly improved
[21]State-variable-based reaching law designReduces steady-state errorThe high switching frequency of the sign function still induces considerable chattering, compromising the dynamic quality of the reaching process
Modification of Switching Function[22,23,24]Adoption of system-state-adaptive nonlinear coefficients that approach zero near the sliding surfaceSuppresses chattering caused by fixed gainsIncreased nonlinear computational complexity leads to slower dynamic response and greater difficulty in real-time implementation
[25]Replacement of the sign function with a saturation functionControls chattering and overshootThe computation process remains complex, limiting practical applicability
This Work Continuously differentiable nonlinear function (sine-tangent interpolation);
Improved ESO structure based on deviation control; Modified exponential reaching law incorporating system state variables
Simultaneously improves ESO observation accuracy, convergence speed, and chattering suppression while maintaining low computational complexityProvides an integrated SM-ADRC framework that combines an enhanced ESO with an improved reaching law, addressing the gap left by previous studies, which failed to balance observation smoothness, dynamic response, and chattering suppression
Table 2. Circuit topology parameters.
Table 2. Circuit topology parameters.
ParameterValue
Output voltage reference value V r e f / V 300
Phase Filter Inductor L / mH 1.56
Filter capacitance C / μ F 500
Switching frequency f / kHz 100
Input voltage U i n / V 750
Load R / Ω 20
Table 3. Control circuit parameters.
Table 3. Control circuit parameters.
Control StrategyVoltage Outer LoopCurrent Inner Loop
PI k p v = 0.5 k p i = 0.7 , k i i = 6
k i v = 150
LADRC w 0 = 1200 , b 0 = 9 × 10 5
w c = 400
SM-ADRC w 0 = 1200 , b 0 = 9 × 10 5
α 1 = 0.5 , α 2 = 0.25
δ = 0.02 , ε = 4
k = 50 , c = 260
a = 3 , b = 10
Table 4. Quantitative performance comparison of three control strategies.
Table 4. Quantitative performance comparison of three control strategies.
Disturbance ScenarioPerformance MetricPIADRCSM-ADRC
Output voltage step change (300 V → 200 V)Peak voltage fluctuation (V)12.58.13.0
Time to reach steady state (ms)374321
Load disturbance (20 Ω → 10 Ω)Peak voltage fluctuation (V)17.120.29.9
Time to reach steady state (ms)394418
Input voltage disturbance (750 V → 650 V)Peak voltage fluctuation (V)11.611.25.3
Time to reach steady state (ms)314215
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MDPI and ACS Style

Xing, S.; Cui, Y.; Liu, C.; Liu, K. Research on a Sliding Mode Self-Disturbance-Rejection Control Strategy for Three-Phase Interleaved Buck Converters. Energies 2026, 19, 1846. https://doi.org/10.3390/en19081846

AMA Style

Xing S, Cui Y, Liu C, Liu K. Research on a Sliding Mode Self-Disturbance-Rejection Control Strategy for Three-Phase Interleaved Buck Converters. Energies. 2026; 19(8):1846. https://doi.org/10.3390/en19081846

Chicago/Turabian Style

Xing, Shihao, Yang Cui, Cheng Liu, and Ke Liu. 2026. "Research on a Sliding Mode Self-Disturbance-Rejection Control Strategy for Three-Phase Interleaved Buck Converters" Energies 19, no. 8: 1846. https://doi.org/10.3390/en19081846

APA Style

Xing, S., Cui, Y., Liu, C., & Liu, K. (2026). Research on a Sliding Mode Self-Disturbance-Rejection Control Strategy for Three-Phase Interleaved Buck Converters. Energies, 19(8), 1846. https://doi.org/10.3390/en19081846

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