Modulation with Full-Range Zero Voltage Switching and Current Peak Optimization for AC–DC Converter

Abstract

To address the issues of limited soft-switching range and high inductor current peak in traditional single phase shift (SPS) modulation for AC–DC converters under a wide range of voltage conversion ratio conditions, this paper proposes an optimized modulation strategy based on SPS modulation. First, the steady-state operating characteristics under SPS modulation are analyzed, and the current-transfer equation is derived. A conversion coefficient is then introduced to transform the conventional phase-shift ratio into a new variable. Based on this, the time-domain characteristics of the inductor current peak and the constraints for zero voltage switching (ZVS) are analyzed. An analytical expression of the conversion coefficient is obtained, which ensures ZVS operation for all switches in the dual-active-bridge (DAB) converter and minimizes the inductor current peak. Finally, experiments verify the effectiveness and feasibility of the proposed modulation strategy.

1. Introduction

Against the backdrop of the profound transformation of the global energy structure, renewable power generation technologies, represented by wind and solar energy, are being integrated into all facets of the power system at an unprecedented rate. However, the inherent intermittency and volatility pose a significant challenge to the stable operation of the power grid. This urgently necessitates the introduction of flexible and efficient energy storage means to achieve smooth regulation of power [1,2].

Against this background, Mobile Energy Storage Systems (MESSs), as an emerging solution, have been garnering significant attention due to their flexibility and mobility. Typically integrated into electric vehicles or dedicated mobile platforms, MESSs can be rapidly deployed to critical nodes experiencing power shortages, insufficient reliability, or requiring fault recovery, in direct response to grid demands. This capability effectively enhances the resilience of the distribution network and provides robust support for the large-scale integration of renewable energy [3]. The core of an MESS lies in efficient, reliable, and bidirectional power exchange with the grid. As the pivotal component responsible for this interface, the AC–DC power converter must possess key capabilities, including bidirectional power flow and galvanic isolation [4,5].

Conventional AC–DC converters typically employ a two-stage structure, consisting of a front-stage power factor correction (PFC) rectifier and a rear-stage DC–DC converter. Although this configuration benefits from simple control and technological maturity, it suffers from inherent drawbacks such as a large volume, high cost, and limited efficiency [6,7]. To mitigate the limitations of this conventional structure, the single-stage AC–DC converter has garnered increasing attention. By integrating the rectification and isolated DC–DC conversion functions into a single power stage, this topology offers a more compact structure and higher efficiency, making it particularly suitable for scenarios requiring bidirectional power exchange. Among these topologies, the DAB-based AC–DC converter has become a major research focus due to its characteristics of high-frequency isolation, soft-switching capability, and inherent bidirectional power flow [8,9].

However, the single-stage DAB converter faces a number of challenges in practical applications. The conventional SPS modulation is widely regarded as the most basic control strategy among its peers. However, since it possesses only one control variable, and this variable is primarily used to satisfy the PFC requirement, it leaves no degree of freedom for performance optimization. Consequently, the SPS modulation suffers from high current stress and a narrow soft-switching range. Its performance severely deteriorates under light-load conditions or when the voltage ratio deviates from the nominal value [10,11]. To enhance the overall performance of converters, scholars have proposed various improved modulation strategies. Expanding the count of phase-shift ratios, modulation strategies such as extended phase shift (EPS) [12,13], double phase shift (DPS) [14], and triple phase shift (TPS) [15,16] have been developed. However, these advanced strategies are primarily developed for DAB-based DC–DC converters. They are not directly applicable to the AC–DC case, where the fundamental requirement of grid-side PFC imposes an additional and critical constraint on the modulation design.

For DAB AC–DC converters, by modeling the subsequent DAB converter as a resistive load, PFC and lower total harmonic distortion (THD) in the input current are achieved in [17]; however, the optimization of soft switching and current stress remains unaddressed. In [18], by adopting an EPS modulation strategy that combines fixed-frequency and variable-frequency operation, both PFC and ZVS across the entire power range are achieved. Additionally, researchers have proposed a modulation strategy that integrates multiple operation modes [19,20,21]. To resolve the current-distortion issue in the variable-frequency EPS modulation strategy under light-load conditions, researchers have, respectively, employed fixed-frequency SPS [19] and fixed-frequency TPS [20]. In [21], a hybrid triangular modulation (TRM)-trapezoidal modulation (TZM) scheme is proposed to reduce the THD without compromising the root mean square (RMS) current performance.

Although existing modulation strategies employing sophisticated mode-switching or multiple phase-shift schemes can enhance performance, their inherent complexity entails substantial real-time processing, making them less suitable for practical implementation. Currently, some scholars have simplified control complexity. In [22], based on the EPS inner mode, the modulation was simplified by setting the initial current to zero and defining a control variable as the voltage conversion ratio. This achieved zero current switching (ZCS) of AC-side switches and ZVS of DC-side switches. In [9], based on the EPS outer mode, one control variable was defined as half of the other. Combined with frequency control, this approach achieved ZVS. However, the authors did not consider the optimization of current stress.

In summary, existing approaches in the literature mainly suffer from three limitations. First, the modulation strategies are primarily designed for DC–DC converters and are not directly applicable to AC–DC topologies. Second, the enhanced performance of complex multi-mode or multi-phase-shift schemes comes at the cost of significantly increased control complexity. Third, simplified modulation strategies typically focus on a single-objective optimization. In contrast, this paper proposes a novel approach based on the fundamental SPS modulation by introducing variable-frequency control. This strategy successfully achieves full-range soft switching and optimizes current stress, while maintaining comparatively low control complexity.

The remainder of this paper is structured as follows: Section 2 details the system topology; Section 3 investigates the developed modulation approach; Section 4 focuses on optimizing current peak; Section 5 examines the implementation of ZVS; Section 6 details the key parameter selection and experimental verification; Section 7 encapsulates the core findings and contributions.

2. Topology Structure

Figure 1 illustrates the topology employed in this paper. This topology was first introduced in [23]. It is an improved version of the DAB-based AC–DC converter. The front-end rectifier full bridge is composed of switches Q₁–Q₄, while the rear-end DAB converter is formed by switches S₁–S₆. L₁ is the AC-side input filter inductor. C₁ and C₂ are the filter capacitors, and C₃ is the DC-link capacitor. The transformer leakage inductance is denoted as L_σ. A HF transformer T with a turn ratio of n links the primary and secondary sides of the DAB.

Since switches Q₁–Q₄ operate only at the line frequency for rectification, their switching losses are negligible compared to the high frequency switching losses of the subsequent DAB converter. Therefore, the modulation analysis focuses primarily on the rear-end DAB stage. The magnetizing inductance L_m typically ranges from several hundred microhenries to a few millihenries, which is in the order of tens of times larger than the leakage inductance L_σ. Therefore, it is often neglected to simplify the analysis. Based on the above assumptions, an equivalent circuit of the DAB converter is established to simplify the analysis, as shown in Figure 2. The power transfer is governed by the voltages V_AB and nV_CD, which are applied across the transformer leakage inductance L_σ.

3. Proposed Modulation Strategy

3.1. Phase-Shift Operational Principle

As illustrated in Figure 3, the primary-side voltage V_AB is a two-level square wave with an amplitude of ±|v_ac|/2. When referred to the primary side, the secondary-side voltage V_CD becomes nV_CD, which is a two-level square wave with an amplitude of ±nV_dc. The phase-shift ratio between switches S₁ and S₄ is defined as D, where D ranges from 0 to 1, and T_hs is the half-switching period, given by T_hs = 1/(2f_s), with f_s being the switching frequency.

The fundamental relationship that governs the slope of the leakage inductor current i_L(t) is defined by the voltage difference applied across L_σ, as given by the following expression:

$${\displaystyle \frac{d{i}_{\mathrm{L}}(t)}{dt}}={\displaystyle \frac{V_{\mathrm{AB}}(t)-n{V}_{\mathrm{CD}}(t)}{L_{\mathsf{\sigma }}}}$$

(1)

Based on Equation (1) and the operational waveforms in Figure 3, the expression for the leakage inductance current can be derived:

$$i_{\mathrm{L}}(t)=\left\{\begin{array}{l}{i}_{\mathrm{L}}(t_0)+{\displaystyle \frac{\left|v_{\mathrm{ac}}\right|/2+n{V}_{\mathrm{dc}}}{L_{\sigma }}}\Delta t,t\in [t_0,t_1)\\ i_{\mathrm{L}}(t_1)+{\displaystyle \frac{\left|v_{\mathrm{ac}}\right|/2-n{V}_{\mathrm{dc}}}{L_{\sigma }}}\Delta t,t\in [t_1,t_2)\end{array}\right.$$

(2)

As can be seen from Figure 3, assuming the initial time instant is t₀ = 0, all subsequent time instants can be expressed as follows:

$$\left\{\begin{array}{l}{t}_1=D{T}_{\mathrm{hs}}\\ t_2=T_{\mathrm{hs}}\end{array}\right.$$

(3)

Based on the half-period symmetry characteristic of the inductor current, the values of the inductor current at key time instants can be determined:

$$\left\{\begin{array}{l}{i}_{\mathrm{L}}(t_0)={\displaystyle \frac{n{V}_{\mathrm{dc}}}{8L_{\sigma }{f}_{\mathrm{s}}}}(-4D-K+2)\\ i_{\mathrm{L}}(t_1)={\displaystyle \frac{n{V}_{\mathrm{dc}}}{8L_{\sigma }{f}_{\mathrm{s}}}}(2KD-K+2)\\ i_{\mathrm{L}}(t_2)={\displaystyle \frac{n{V}_{\mathrm{dc}}}{8L_{\sigma }{f}_{\mathrm{s}}}}(4D+K-2)\end{array}\right.$$

(4)

where K is the voltage conversion ratio, defined as K = |v_ac|/nV_dc.

The expression for the DAB current can be derived by calculating the average value of the inductor current through integration over a half-period:

$$i_{\mathrm{DAB}}={\displaystyle \frac{1}{2T_{\mathrm{hs}}}}{\displaystyle {\int }_{t_0}^{t_2}{i}_{\mathrm{L}}(t)dt=\frac{n{V}_{\mathrm{dc}}}{4L_{\sigma }{f}_{\mathrm{s}}}}D(1-D)$$

(5)

As evidenced by the equation above, only a single control variable D is available. This variable must be dedicated to maintaining in-phase AC input voltage and current to achieve PFC. Consequently, there is no degree of freedom left to optimize other performance metrics such as current stress, RMS current, or soft-switching operation. This inherent limitation means that SPS modulation exhibits a constrained soft-switching range and high peak current, particularly under a wide voltage conversion ratio.

3.2. Variable Frequency Modulation Strategy

To address this limitation, a new control variable θ is introduced. The original variable D is converted to this new variable by defining D = 1 − cθ, where c is a conversion coefficient. Subsequently, Equation (5) is modified as follows:

$$i_{\mathrm{DAB}}={\displaystyle \frac{n{V}_2}{4L_{\sigma }{f}_{\mathrm{s}}}}(c-c^2\theta )\theta$$

(6)

From the constraint 0 ≤ D ≤ 1, the permissible range for θ in the equation can be obtained as follows:

$$0\le \theta \le {\displaystyle \frac{1}{c}}$$

(7)

By introducing a virtual frequency f_a, the switching frequency f_s is defined as:

$$f_{\mathrm{s}}=f_{\mathrm{a}}(c-c^2\theta )$$

(8)

As depicted in Figure 4, the maximum value of f_s increases with the parameter c. Furthermore, a larger value of f_a results in a wider variation range of f_s throughout the entire transmission range. If the values of the virtual frequency f_a and the coefficient c are excessively large, the actual phase angle θ will exceed the constraint given by Equation (7). Simultaneously, the switching frequency f_s will attain negative values around ωt = 90°.

Substituting Equation (8) into Equation (6) yields:

$$i_{\mathrm{DAB}}={\displaystyle \frac{n{V}_{\mathrm{dc}}}{4L_{\sigma }{f}_{\mathrm{a}}}}\theta$$

(9)

To achieve PFC on the AC side, the following condition must be satisfied:

$$i_{\mathrm{DAB}}=I_{\mathrm{ref}}|\sin (wt)|$$

(10)

where I_ref denotes the amplitude of the AC-side input current, which can be calculated using Equation (11):

$$I_{\mathrm{ref}}={\displaystyle \frac{2P_{\mathrm{rate}}}{V_{\mathrm{ac}}}}$$

(11)

where P_rate denotes the rated power and V_ac denotes the amplitude of the AC input voltage.

Thus, the expression for θ under the PFC condition is derived as:

$$\theta ={\displaystyle \frac{4L_{\sigma }{f}_{\mathrm{a}}{I}_{\mathrm{ref}}|\sin (wt)|}{n{V}_{\mathrm{dc}}}}$$

(12)

4. Current Peak Optimization

As observed in Figure 3, the inductor current attains its maximum I_max at t₁.

$$I_{\max }={\displaystyle \frac{n{V}_{\mathrm{dc}}}{8L_{\sigma }{f}_{\mathrm{s}}}}(2KD-K+2)$$

(13)

Substituting the expression D = 1 − cθ and Equation (8) into Equation (13) yields:

$$I_{\max }={\displaystyle \frac{n{V}_{\mathrm{dc}}}{8L_{\mathsf{\sigma }}{f}_{\mathrm{a}}}}{\displaystyle \frac{-2Kc\theta +K+2}{c-c^2\theta }}$$

(14)

Calculate the partial derivative of I_max with respect to c:

$$A={\displaystyle \frac{\partial I_{\max }}{\partial c}}={\displaystyle \frac{n{V}_{\mathrm{d}c}}{8L_{\sigma }{f}_{\mathrm{a}}}}{\displaystyle \frac{-2K{\theta }^2{c}^2+2\theta c(K+2)-K-2}{c^2{(1-\theta c)}^2}}$$

(15)

With respect to ωt, I_max reaches its peak value at ωt = 90°. When ωt = 90°, the variation in A with c is shown in Figure 5. As c increases, the value of A changes from negative to positive. Hence, a minimum point exists. The simulation parameters are as follows: the rated power P is 100 W, the transformer turns ratio n is 1, the AC input voltage v_ac is 50 V at 50 Hz, the DC output voltage V_dc is 50 V, the leakage inductance L_σ is 25 μH, and the virtual frequency f_a is 35 kHz.

Setting A = 0 yields:

$$c={\displaystyle \frac{2\theta (K+2)-\sqrt{4{\theta }^2{(K+2)}^2-8(K+2)K{\theta }^2}}{4K{\theta }^2}}$$

(16)

It should be noted that when ωt = 90°, K and θ are equal to K_max and θ_max.

$$K_{\max }=\left|V_{\mathrm{ac}}\right|/n{V}_{\mathrm{dc}}$$

(17)

$${\theta }_{\max }={\displaystyle \frac{4L_{\sigma }{f}_{\mathrm{a}}{I}_{\mathrm{ref}}}{n{V}_{\mathrm{dc}}}}$$

(18)

As shown in Figure 6, under the same parameters as above, A equals zero when ωt = 90° and c = 3.57. At this point, the minimum value of I_max, approximately 9.66 A, is achieved.

5. Analysis and Implementation of Soft Switching

To realize ZVS for every switch over the full operating range, the inductor current must satisfy the following constraint at all times:

$$\left\{\begin{array}{l}{i}_L(t_0)\le 0\\ i_L(t_1)\ge 0\end{array}\right.$$

(19)

Substituting Equation (4) into Equation (19) yields the constraint on D for achieving ZVS:

$$\left\{\begin{array}{l}D\ge {\displaystyle \frac{1}{2}}-{\displaystyle \frac{K}{4}}\\ D\ge {\displaystyle \frac{1}{2}}-{\displaystyle \frac{1}{K}}\end{array}\right.$$

(20)

Since K > 0, the ZVS condition is always satisfied when D > 1/2.

A further analysis reveals that for K ≤ 2, if D ≥ 1/2 − K/4 holds, the condition D ≥ 1/2 − 1/K is always satisfied. Conversely, for the case when K > 2, if D ≥ 1/2 − 1/K holds, the constraint D ≥ 1/2 − K/4 is automatically satisfied. From Equation (16), it is required that the expression under the square root must be non-negative, which leads to the condition K ≤ 2. Thus, with the proposed modulation strategy, only the condition D ≥ 1/2 − K/4 needs to be considered.

Substituting D = 1 − cθ into the inequality D ≥ 1/2 − K/4, the condition for θ to achieve ZVS when D < 1/2 is derived as follows:

$${\theta }_{\max }\le {\displaystyle \frac{1}{2c}}+{\displaystyle \frac{K}{4c}}$$

(21)

Therefore, if it satisfies the constraint specified in Equation (21), it ensures that all switching devices in the DAB converter achieve ZVS across the entire transmission power range.

Substituting Equation (18) into Equation (21) yields the constraint on c required for ZVS:

$$c\le {\displaystyle \frac{(2+K)n{V}_{\mathrm{dc}}}{16L_{\sigma }{f}_{\mathrm{a}}{I}_{\mathrm{ref}}}}$$

(22)

Combining Equations (16) and (22), ensuring the realization of ZVS when D < 1/2 requires satisfying:

$$c_1>c_2$$

(23)

where:

$$c_1={\displaystyle \frac{(2+K)n{V}_{\mathrm{dc}}}{16L_{\sigma }{f}_{\mathrm{a}}{I}_{\mathrm{ref}}}}$$

(24)

$$c_2={\displaystyle \frac{2{\theta }_{\max }(K_{\max }+2)}{4K_{\max }{\theta }_{\max }^2}}-{\displaystyle \frac{\sqrt{4{\theta }_{\max }^2{(K_{\max }+2)}^2-8(K_{\max }+2)K_{\max }{\theta }_{\max }^2}}{4K_{\max }{\theta }_{\max }^2}}$$

(25)

Equation (23) is equivalent to an inequality:

$${\displaystyle \frac{2+K_{\max }x}{4}}>{\displaystyle \frac{(K_{\max }+2)-\sqrt{(K_{\max }+2)(2-K_{\max })}}{2K_{\max }}}$$

(26)

where x = |sin(ωt)|.

Solving the above inequality yields:

$$x_1={\displaystyle \frac{4-2\sqrt{4-K_{\max }^2}}{K_{\max }^2}}\le x\le x_2={\displaystyle \frac{4+2\sqrt{4-K_{\max }^2}}{K_{\max }^2}}$$

(27)

Since x₂ ≥ 1 holds for all K < 2, it suffices to ensure x > x_1. In this case, D ≤ 1/2 is equivalent to 1/2c₁ ≤ θ ≤ 1/c₁, which can be transformed into:

$$x_{\min }={\displaystyle \frac{-1+\sqrt{1+2K_{\max }}}{K_{\max }}}<x<{\displaystyle \frac{-1+\sqrt{1+4K_{\max }}}{K_{\max }}}=x_{\max }$$

(28)

Therefore, satisfying the condition x_min > x₁ is sufficient to ensure ZVS achievement when D < 1/2. Solving this yields a maximum voltage conversion ratio of K_max < 1.677. Consequently, by setting an appropriate transformer turns ratio n and output DC voltage such that the converter operates with K < 1.677, ZVS for all high frequency switches can be achieved concurrently with minimized peak current.

As shown in Figure 7, all switches consistently meet the ZVS condition for D > 1/2. While for D < 1/2, ZVS can also be guaranteed provided that the value of c satisfies the condition given in Equation (22).

6. Experimental Verification

6.1. Experimental Setup

This experimental prototype serves as a proof-of-concept platform, with the primary aim of validating the effectiveness of the proposed modulation strategy. To this end, the system was configured with a 50 Vrms/50 Hz AC input and a 50 V DC output., resulting in a voltage conversion ratio of K ≈ 1.4, which satisfies the necessary condition K < 1.677. Furthermore, based on the analysis presented in Figure 4, and to avoid excessively high switching losses, the switching frequency was selected as f_a = 35 kHz.

The transformer turns ratio was set to unity (n = 1), a configuration that helps minimize both the RMS and peak currents in the transformer windings [24].

Beyond the turns ratio, the leakage inductance represents the most critical parameter in the transformer design. Based on Equation (9) and the method for calculating the leakage inductance presented in [24], the leakage inductance can be derived through the following procedure:

The maximum power transfer under SPS modulation is given by:

$$P_{SPS}={\displaystyle \frac{n{V}_{ac}{V}_{dc}}{4L_{\sigma }{f}_a}}{\theta }_{\max }$$

(29)

P_SPS must be designed to exceed the maximum actual power transmitted. Therefore, the following condition must be satisfied:

$$P_{\mathrm{SPS}}\ge 2P_{\mathrm{rate}}$$

(30)

Consequently, the constraint condition for the leakage inductance is derived as follows:

$$L_{\mathsf{\sigma }}\le {\displaystyle \frac{n{V}_{\mathrm{ac}}{V}_{\mathrm{dc}}}{8f_{\mathrm{a}}{P}_{\mathrm{rate}}}}{\theta }_{\max }$$

(31)

By substituting the parameters from

Table 1. Key experimental parameters.

Parameters	Value
AC voltage (vac)	50 VRMS, 50 Hz
DC voltage (Vdc)	50 V
Leakage inductance (Lσ)	25 μH
Turns ratio (n)	1
Filter capacitor (C1/C2)	5 μF
Filter inductor (L1)	1 mH
Virtual frequency (fa)	35 kHz
Output power (P)	100 W

(n = 1, $V_{\mathrm{ac}}=50\sqrt{2}V$, V_dc = 50 V, f_a = 35 kHz, P_rate = 100 W, c = 3.57) into Equation (31) in conjunction with Equation (7), the calculation yields a constraint for the leakage inductance as L < 35.37 μH.

To ensure a sufficient design margin, a value of L = 25 μH was deliberately chosen. In the experimental prototype, a precise external inductor was connected in series with the primary winding of the high-frequency transformer to achieve the total designed leakage inductance of 25 μH.

The specific PWM module employed in this experiment is depicted in Figure 8.

Based on the experimental parameters listed in Table 1, an experimental platform was built around a TMS320F28335 DSP, as shown in Figure 9, with its connection block diagram shown in Figure 10.

6.2. Experimental Results Analysis

As shown in Figure 11, the control range of the phase-shift angle α is [52.77°, 180.00°], and that of the switching frequency f_s is [36.63, 124.95] kHz.

Figure 12 shows the waveforms of the AC-side input voltage and AC- side input current. The peak value of the AC voltage is 72 V, and the peak value of the AC current is 2.8 A. Based on these values, the input power is calculated to be approximately 100.8 W. Moreover, the input voltage and current maintain the same phase, demonstrating effective PFC operation.

Figure 13 displays the input voltage V_rec, output voltage V_dc, and output current I_dc of the DAB side at rated power. It should be specifically mentioned that the DAB input voltage V_rec is obtained by rectifying the AC voltage and is therefore of a pulsating DC nature. The average value of the output DC voltage is 50.1 V and the average output DC current is 1.84 A. From these measurements, the output power is calculated to be approximately 92.184 W. The corresponding efficiency under this condition is approximately 91.45%. It is worth noting that the reported efficiency was measured on the experimental prototype. Following further optimization for product development, the converter efficiency is expected to be improved.

As illustrated in Figure 14, the waveforms of the voltage across the transformer and the inductor current are shown. Two-level square waves are observed on both the primary and secondary sides of the transformer, in line with theoretical analysis. It is noteworthy that the measured inductor current exhibits slight resonant characteristics during switching transients. This is attributed to the parasitic capacitances in practical devices resonating with the inductance during the switching process. This resonance primarily occurs within the dead time. Subsequent experimental results have demonstrated that this resonant behavior does not affect the successful implementation of ZVS.

As shown in Figure 15, which compares the current stress between the proposed modulation strategy and the method from reference [24], the maximum current stress of the proposed strategy is 10 A, compared to 12 A for the method in reference [25]. This represents a reduction in current stress of approximately 16.7%.

Figure 16 shows the drain-source voltage V_ds1 and gate drive signal V_gs1 of switch S₁ under line-frequency conditions. The voltage V_ds1 varies with the phase angle ωt, reaching its minimum under light-load conditions, around ωt = 0°, and its maximum under heavy-load conditions, around ωt = 90°.

Figure 17 shows the gate drive signal V_gs1 and the voltage V_ds1 across the primary-side switch S₁ under light and heavy load conditions. It can be observed that the voltage across S₁ drops to zero before the arrival of the gate drive signal. This clearly demonstrates that ZVS is effectively achieved across the entire load range.

The drain-source voltage V_ds3 and gate drive signal V_gs3 of switch S₃ are presented in Figure 18. The V_ds3 waveform collapses to approximately zero when the switch is turned on, and rises to a constant value representing the DC output voltage when the switch is off. Over the entire grid cycle, the V_ds3 exhibits a square wave with constant amplitude.

Figure 19 presents the gate drive signal V_gs3 and the voltage V_ds3 across the secondary-side switch S₃ under light and heavy load conditions. Prior to the gate drive signal being applied, the voltage across switch S₃ attains zero, as verified. This clearly demonstrates that ZVS is effectively achieved for the secondary-side switch across the entire load range.

The drain-source voltage V_ds5 and gate drive signal V_gs5 of switch S₅ are presented in Figure 20. The V_ds5 waveform collapses to approximately zero when the switch is turned on, and rises to a constant value representing the DC output voltage when the switch is off. Over the entire grid cycle, the V_ds5 exhibits a square wave with constant amplitude.

Figure 21 shows the gate drive signal V_gs5 and drain-to-source voltage V_ds5 of the switch S₅ under light and heavy load conditions. Clear ZVS is achieved across the entire operating range, as the voltage across S₅ drops to zero prior to gate signal activation.

In summary, due to the complementary and symmetric nature of the two switches in each bridge leg, ZVS is achieved for all switches in the rear-end DAB converter across the entire power-transfer range.

Figure 22 shows the efficiency curve of the converter. A peak efficiency of approximately 91.78% is achieved, with an efficiency of 91.45% at the rated power.

As summarized in

Table 2. Comparison with other works.

Comparison Items	DAB AC/DC [6]	DAB AC/DC [8]	DAB AC–DC [19]	Proposed One
Operating modes	Two modes	Two modes	Three modes	One mode
Switch numbers	12	8	12	10
Power direction	Unidirectional	Bidirectional	Bidirectional	Bidirectional
ZVS scope	Partial	Partial	Full	Full
Max switching frequency	100 kHz	100 kHz	500 kHz	124.95 kHz

, the proposed method achieves full-range ZVS in a single mode of operation while maintaining the switching frequency within a low range.

7. Conclusions

This paper presents a hybrid modulation strategy integrating phase-shift and variable-frequency control to overcome the limitations of conventional SPS modulation, particularly its narrow soft-switching range and high current stress. The proposed method ensures ZVS across the entire operating range for all power switches while significantly reducing the peak current stress. Experimental comparison shows that the current stress is reduced by approximately 16.7% compared to existing methods. The proposed strategy achieves a steady-state efficiency of 91.45% at the rated power on the prototype platform, with potential for further improvement through optimization. These results validate the effectiveness and correctness of the proposed approach. Furthermore, compared to complex mode-switching or multi-phase-shift modulation methods, the proposed strategy offers lower control complexity, providing a solution for single-stage AC–DC converters.