Internal Power Loss Modeling and Efficiency Evaluation of Full-Bridge DC–DC Converters Based on Load-Current-Dependent Loss Coefficients

Abstract

In this paper, a theoretical methodology is proposed for the systematic analysis of the power conversion efficiency of a full-bridge converter. Using the steady-state analysis results derived from the equivalent circuit, we introduced the concept of “loss coefficients” by categorizing parameters based on their correlation with load power and current. In particular, the loss factors for key components were organized in a tabular format according to their respective contributions to the load current. Furthermore, this study presented the contribution of the rectifier’s internal loss and overall power conversion efficiency through graphical representations to facilitate intuitive understanding. Finally, to verify the validity of the efficiency analysis incorporating the proposed loss factors, a loss and efficiency analysis was conducted on a 300 W-class full-bridge converter, and the results were compared with measured data from an experimental prototype. The results demonstrate that, at maximum load power, the discrepancy between the experimental and theoretical power conversion efficiency values ranged from a maximum of 1%. Consequently, it was confirmed that the proposed analysis method based on effective currents of key components and loss coefficients reflecting internal parasitic elements provides a valid approach for characterizing internal power loss and conversion efficiency relative to load current.

1. Introduction

In the contemporary landscape of power electronics, the demand for high-performance and high-efficiency power conversion devices has reached an unprecedented level. As global industries undergo a rapid transition toward electrification and digitalization, the role of DC–DC converters has expanded from simple voltage regulation to becoming the critical backbone of complex energy ecosystems. From electric vehicles (EVs) and renewable energy systems to hyperscale data centers, telecommunication base stations, and sophisticated industrial automation, the efficient management of electrical energy is now a primary determinant of system reliability, operational cost, and environmental sustainability [1,2,3].

Among these diverse applications, the modern transportation sector, particularly the electric vehicle (EV) industry, stands as a prime example of where power conversion efficiency is paramount. In an EV, the efficiency of on-board DC–DC converters is not merely a technical specification; it is a critical factor that directly influences the vehicle’s driving range, thermal management requirements, and battery longevity. As charging infrastructures move toward ultra-fast charging capabilities and battery management systems (BMS) require higher precision, there is an intensifying push to achieve extreme miniaturization and weight reduction. These requirements act as major design drivers, accelerating technological advancements in high-power-density converters that can operate reliably under stringent low-profile and high-temperature conditions.

In response to these rigorous demands, the industry has seen a paradigm shift toward Wide Bandgap (WBG) semiconductors and advanced switching topologies. Leading power semiconductor companies, such as Texas Instruments (TI), have demonstrated the potential of these technologies by achieving peak efficiencies exceeding 99.5% in specialized switching power supplies. Such high-water marks in efficiency highlight that the traditional margins for design error have vanished. Achieving these performance levels requires not only superior components but also a profound understanding of every internal loss mechanism within the converter.

Despite the critical need for precision, conventional loss modeling approaches for DC–DC converters often present a trade-off between accuracy and practical utility. Classical physics-based models provide deep insights into individual component behavior—such as the nonlinear switching characteristics of MOSFETs or the complex core loss mechanisms in magnetic materials—but they are frequently too computationally intensive or specific to be applied effectively during the initial system-level design phase. Conversely, simplified behavioral models often fail to account for the impact of parasitic elements and variable load conditions, leading to significant discrepancies between theoretical predictions and real-world prototype performance. Relying on complex iterative simulations can hinder the rapid optimization process necessary for fast-paced product development cycles [4,5,6].

This study aims to bridge this gap by proposing a systematic theoretical methodology for analyzing the power conversion efficiency of a full-bridge DC–DC converter, which remains one of the most widely utilized and versatile topologies for high-power on-board applications. The core contribution of this paper is the introduction of a unified analytical framework based on the concept of “Loss Coefficients.” By conducting a rigorous steady-state analysis of the equivalent circuit, we categorize the myriad internal power loss factors—ranging from conduction and switching losses to parasitic resistance and core losses—into three distinct coefficients based on their mathematical correlation with the load current. This coefficient-based approach provides several significant advantages. First, it simplifies the complex interactions of parasitic elements into a manageable set of parameters, allowing designers to intuitively visualize and predict the efficiency curve across the entire load spectrum. Second, it identifies the dominant loss factors at specific operating points, enabling targeted optimization to improve either light-load or full-load performance. Third, the proposed framework is highly adaptable to modern high-performance components. In this research, we incorporate the characteristics of cutting-edge devices, such as Infineon’s MOSFETs with ultra-low on-resistance and Tokyo Denki Kagaku’s (TDK’s) advanced high-frequency magnetic materials, ensuring the model’s relevance to current industrial standards.

The structure of this paper is organized as follows. Section 2 provides a detailed steady-state analysis of the full-bridge converter and defines the equivalent circuit including all relevant parasitic components. Section 3 derives the systematic methodology for extracting the loss coefficients and establishes the theoretical efficiency equations. Section 4 presents a comprehensive loss analysis and explores the sensitivity of the system to various design parameters. In Section 5, the validity of the proposed model is rigorously tested against experimental data obtained from a 150 W-class prototype circuit. The comparison includes performance metrics across a wide load range, from 10% (light-load) to 100% (rated-load) conditions, to verify the scientific accuracy and tolerance limits of the theoretical model. Finally, Section 6 concludes the paper by discussing the potential for extending this methodology to other isolated DC–DC topologies and identifying future research directions. Through this integrated approach, this study contributes to the ongoing efforts toward the miniaturization and optimization of next-generation power conversion systems for aerospace, defense, and EV applications.

2. Steady-State Characteristics of a Full-Bridge Converter

2.1. Basic Circuit of a Full-Bridge Converter

Figure 1 illustrates the fundamental circuit configuration of the full-bridge converter [7,8,9,10]. The diagram depicts the DC input voltage, a center-tapped transformer, four switches on the primary side, synchronous rectifier (SR) switches on the secondary side, an output filter consisting of an inductor and capacitor, and the load resistance. In general, the full-bridge converter allows the entire input voltage to be applied across the primary winding of the high-frequency transformer by utilizing four switching devices. This structural characteristic provides significantly higher power conversion capability compared to other topologies, such as half-bridge or flyback converters. Furthermore, through high-speed switching operations, the transformer flux is utilized symmetrically and balanced in both forward and reverse directions, inherently preventing magnetic core saturation. This feature is well-known for maximizing transformer efficiency and facilitating miniaturization, which is advantageous for high-power-density system designs [11,12,13,14,15].

Figure 2 shows the equivalent circuit of the full-bridge converter. In this representation, the transformer is modeled with its primary side magnetizing inductance $L_M$ in parallel with an ideal center-tapped transformer. Typically, since the transformer in a full-bridge converter lacks an internal air gap in the magnetic core, it exhibits a large magnetizing inductance $L_M$. This characteristic complicates flux density saturation and ensures stable transformer operation. Additionally, the main switching devices $S_{1–4}$ are modeled as ideal switches. Assuming that the cutoff frequency of the output LC filter is significantly lower than the switching frequency, the output capacitor $C_F$ can be treated as a constant voltage source $V_o$ under steady-state conditions. Here, the ideal switch is characterized by zero conduction resistance in the ON state and infinite impedance in the OFF state. In the figure, the arrows indicate the direction of the current, and the black dots indicate the winding direction of the transformer. The arrows indicate the direction of the current, and the black dots indicate the winding direction of the transformer. For the analysis, gate drive losses and losses associated with parasitic components are neglected. Furthermore, the internal resistances of the transformer and inductor, as well as the core losses, are assumed to be zero [16,17,18,19,20,21].

2.2. Steady-State Analysis

Since the full-bridge converter configures a total of four switches $S_{1,\mathrm{2,3},4}$ on the primary side in a bridge topology, a short-circuit condition occurs if two switches in the same leg (upper and lower) are turned on simultaneously. Therefore, power is transferred from the input to the output only when the diagonally positioned switches are turned on at the same time. Due to the presence of the transformer’s magnetizing inductance $L_M$, a specific period is required to reset the magnetizing current $i_M$; during this interval, all four switches remain in the OFF state. Consequently, under a constant switching frequency, the operation within a single switching cycle can be characterized by four distinct operating modes. Figure 3 illustrates the equivalent circuits for each operating state when the full-bridge converter shown in Figure 2 operates under steady-state conditions. In the figure, the yellow line represents the circulating current. The blue arrow in the picture indicates the direction of the current. Furthermore, Figure 4 presents the steady-state operational waveforms of the key components. Blue line indicates the operating status of switches $S_{2,3}$, and red line indicates the operating status of switches $S_{1,4}$. From top to bottom, the waveforms in Figure 4 represent the gate driving voltages, the primary-side voltage of the transformer $v_p$, the primary-side current $i_p$, the synchronous rectifier currents $i_{A,B}$, and the output inductor current $i_L$ [22,23,24,25,26,27].

In Figure 3, it is assumed that the four switches $S_{1,\mathrm{2,3},4}$ operate in pairs $S_{1,4}$ and $S_{2,3}$ at a constant frequency and a fixed duty cycle. The description for Mode 1 is as follows. As shown in Figure 3a, at time $t_0$, switches $S_2$ and $S_3$ are turned on, while $S_1$ and $S_4$ are turned off. A negative input voltage is applied across the transformer’s primary-side magnetizing inductance $L_M$, as expressed in (1). The output inductor voltage $v_L$ and current $i_L$ are derived according to the transformer turns ratio $N$, as shown in (3) and (4), respectively. The magnetizing current $i_M$ decreases linearly, with its maximum and minimum values defined by (5) and (6). Mode 1 concludes at time $t_1$.

$$v_p=-V_{IN}$$

(1)

$$v_L=-v_{sB}-V_o={\displaystyle \frac{V_{IN}}{N}}-V_o$$

(2)

$$N∆i_L={\displaystyle \frac{D}{L_F{f}_s}}\left({\displaystyle \frac{V_{IN}}{N}}-V_o\right)={\displaystyle \frac{V_o\left(1-2D\right)}{2L_F{f}_s}}$$

(3)

$$I_{M max}=-{\displaystyle \frac{∆i_M}{2}}={\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$$

(4)

$$I_{M min}={\displaystyle \frac{∆i_M}{2}}=-{\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$$

(5)

The description for Mode 2 is as follows. As illustrated in Figure 3b, at time $t_1$, all switches—$S_1$, $S_2$, $S_3$, and $S_4$—are turned off. During this interval, the magnetizing inductor current $i_M$ remains constant, maintaining the same minimum value as defined in (6). The variation in the output inductor current $i_L$ is expressed in (9). Due to the voltage at the transformer secondary side, both synchronous rectifier switches, $S_A$ and $S_B$, conduct simultaneously. The respective currents $i_{sA,B}$ flowing through these two synchronous switching devices are given by (10) and (11). Mode 2 concludes at time $t_2$.

$$i_p=-i_M={\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$$

(6)

$$i_{sA}+i_{sB}=i_L$$

(7)

$$i_T=i_M+i_p=0$$

(8)

$$∆i_L=-{\displaystyle \frac{V_{o}D}{L_F{f}_s}}$$

(9)

$$i_{sA}={\displaystyle \frac{1}{2}}\left(i_L+N{i}_p\right)={\displaystyle \frac{1}{2}}\left(i_L-N{i}_M\right)$$

(10)

$$i_{sB}={\displaystyle \frac{1}{2}}\left(i_L-N{i}_p\right)={\displaystyle \frac{1}{2}}\left(i_L+N{i}_M\right)$$

(11)

The description for Mode 3 is as follows. The equivalent circuit and operational waveforms for Mode 3 are illustrated in Figure 3c and Figure 4, respectively. In Mode 3, switches $S_1$ and $S_4$ are turned on at time $t_2$, while $S_2$ and $S_3$ are turned off. The input voltage is applied across the transformer’s magnetizing inductance $L_M$, and the magnetizing current $i_M$ is defined by (12). The current variation $∆i_L$ and voltage $v_L$ of the output inductor are given by (13) and (14), respectively. Furthermore, the primary-side current $i_T$ of the transformer is expressed as shown in (15). Mode 3 concludes at time $t_3$.

$$∆i_M={\displaystyle \frac{D{V}_{IN}}{L_M{f}_s}}={\displaystyle \frac{N{V}_o}{2L_M{f}_s}}$$

(12)

$$∆i_L={\displaystyle \frac{D}{L_F{f}_s}}\left({\displaystyle \frac{V_{IN}}{N}}-V_o\right)={\displaystyle \frac{V_o\left(1-2D\right)}{2L_F{f}_s}}$$

(13)

$$v_L=v_s-V_o={\displaystyle \frac{V_{IN}}{N}}-V_o$$

(14)

$$i_T=i_M+{\displaystyle \frac{i_{sA}}{N}}=i_M+{\displaystyle \frac{i_L}{N}}$$

(15)

The description for Mode 4 is as follows. The equivalent circuit and operational waveforms for Mode 4 are presented in Figure 3d and Figure 4, respectively. In Mode 4, all four switches $S_1$, $S_2$, $S_3$ and $S_4$ are turned off at time $t_3$. The voltage across the transformer’s magnetizing inductance becomes zero, and the minimum values at this time are defined by (16) and (17). Due to the transformer’s secondary-side voltage, both synchronous rectifier switches, $S_1$ and $S_B$, conduct simultaneously. The currents $i_{sA,B}$ flowing through these two synchronous switching devices are expressed in (18) and (19). Mode 4 concludes at time $t_4$.

$$I_{M min}=-{\displaystyle \frac{D{V}_{IN}}{2L_M{f}_s}}=-{\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$$

(16)

$$i_p=-i_M={\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$$

(17)

$$i_{sA}={\displaystyle \frac{1}{2}}\left(i_L+N{i}_p\right)={\displaystyle \frac{1}{2}}\left(i_L-N{i}_M\right)$$

(18)

$$i_{sB}={\displaystyle \frac{1}{2}}\left(i_L-N{i}_p\right)={\displaystyle \frac{1}{2}}\left(i_L+N{i}_M\right)$$

(19)

Meanwhile, assuming that the average value of the inductor current is equal to the load current, the current flowing through the synchronous rectifiers can be simplified as shown in the following equation.

$$I_{sA}\cong {\displaystyle \frac{1}{2}}\left(I_o+{\displaystyle \frac{N^2{V}_o}{4L_M{f}_s}}\right) I_{sB}\cong {\displaystyle \frac{1}{2}}\left(I_o-{\displaystyle \frac{N^2{V}_o}{4L_M{f}_s}}\right)$$

(20)

$$I_{sA}\cong {\displaystyle \frac{1}{2}}\left(I_o-{\displaystyle \frac{N^2{V}_o}{4L_M{f}_s}}\right) I_{sB}\cong {\displaystyle \frac{1}{2}}\left(I_o+{\displaystyle \frac{N^2{V}_o}{4L_M{f}_s}}\right)$$

(21)

3. Power Loss of Major Components Linked to Load Current

3.1. Current Effective Value of Main Components

In this paper, to analyze the internal losses and power conversion efficiency of the full-bridge converter, we propose a unified and simplified analytical framework that builds upon existing methodologies. This approach is intended to facilitate efficient converter design during the initial stage. First, the power loss model within the full-bridge converter circuit is defined herein as the “Power Loss Coefficient.” This coefficient serves as a collective term for all factors contributing to internal power dissipation and is expressed as a proportionality constantly relative to power consumption. For this analysis, internal power losses are categorized into four types: conduction loss, switching loss, magnetic loss, and auxiliary power loss.

Generally, conduction losses occurring when current flows through semiconductor or passive components depend on the internal resistance of these devices. Meanwhile, switching losses, which occur during the transition between ON and OFF states, are independent of the load current but depend on parasitic capacitance and switching frequency. Since switching losses increase significantly at high operating frequencies, careful selection of the switching frequency is required. In particular, among the major components used in switching rectifiers, the inductor accounts for both magnetic flux losses which are size- and frequency-dependent and resistive losses caused by internal resistance. In general, internal power loss leads to heat dissipation and acts as a primary factor that degrades the overall efficiency of the power supply system.

Table 1. Characteristic equation and RMS current in steady state.

Parameter	Value	Unit
Voltage gain	$M$	${\displaystyle \frac{N{V}_o}{V_{IN}}}=2D$
Turns ratio	$N$	${\displaystyle \frac{2D V_{IN}}{V_o}}$
Minimum duty ratio	$D_{min}$	${\displaystyle \frac{N V_o}{2V_{IN max}}}$
Transformer primary RMS current	$I_{T rms}$	${\displaystyle \frac{I_o\sqrt{2D}}{N}}\sqrt{1+{\displaystyle \frac{1}{48}}{\left({\displaystyle \frac{N^2{V}_o}{I_o{f}_s}}\right)}^2{\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)}^2}$
Transformer secondary RMS current	$I_{S rms}$	${\displaystyle \frac{I_o}{2}}\sqrt{1+2D}$
Main switch RMS current	$I_{s1 rms}$	${\displaystyle \frac{I_o\sqrt{D}}{N}}\sqrt{1+{\displaystyle \frac{1}{48}}{\left({\displaystyle \frac{N^2{V}_o}{I_o{f}_s}}\right)}^2{\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)}^2}$
SR switch RMS current	$I_{SA rms}$	${\displaystyle \frac{I_o}{2}}\sqrt{1+2D}$
Inductor RMS current	$I_{L rms}$	$I_o\sqrt{1+{\displaystyle \frac{{\left(1-2D\right)}^2}{48}}{\left({\displaystyle \frac{V_o}{I_o{L}_F{f}_s}}\right)}^2}$
Capacitor RMS current	$I_{C rms}$	${\displaystyle \frac{V_o\left(1-2D\right)}{\sqrt{48}{f}_s{L}_F}}$
Transformer ripple current	$∆i_T$	${\displaystyle \frac{V_{o}N}{2f_s}}\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)$
Inductor ripple current	${∆i}_L$	${\displaystyle \frac{V_o\left(1-2D\right)}{2L_F{f}_s}}$
Magnetizing ripple current	$∆i_M$	${\displaystyle \frac{N{V}_o}{2L_M{f}_s}}$
Maximum magnetizing current	$I_{M max}$	${\displaystyle \frac{N{V}_o}{4L_M{f}_s}}$
Maximum inductor current	$I_{L max}$	$I_o+{\displaystyle \frac{V_o\left(1-2D\right)}{4L_F{f}_s}}$
Maximum transformer current	$I_{Tmax}$	${\displaystyle \frac{I_o}{N}}+{\displaystyle \frac{V_{o}N}{4f_s}}\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)$
Output capacitance	$C_o$	$\ge {\displaystyle \frac{V_o\left(1-{2D}_{min}\right)}{32f_s^2{L}_F{V}_{cpp}}}$
Output inductance	$L_F$	$\ge {\displaystyle \frac{V_o\left(1-2D_{min}\right)}{4f_s{I}_{o min}}}$
Magnetizing inductance	$L_M$	$\ge {\displaystyle \frac{9N^2{L}_F{V}_o}{4L_F{f}_s{I}_{o max}+V_o\left(1-2D_{min}\right)}}$

summarizes the characteristic equations for key components derived through the steady-state analysis of the full-bridge converter in the preceding section. This table provides the essential formulas for converter design along with the root mean square (RMS) current values for major components. Notably, the RMS currents are expressed in terms of the load current, demonstrating a proportional relationship between the load current and the RMS values.

3.2. Efficiency and Loss Factor Linked to Load Current

As indicated in Table 1, the RMS current values of the key components can be categorized into those proportional to the load current and those independent of it. Consequently, the internal power loss of the converter can be generalized as shown in (22). In this equation, the power loss is expressed as a quadratic function of the load current, where each term includes a corresponding proportionality constant. Specifically, in (22), the losses independent of the load current are denoted by the $I_o^0$ term, while the losses proportional to the load current and the square of the load current are represented by the $I_o^1$ and $I_o^2$ terms, respectively. In this paper, the coefficients for these power losses, organized by their dependence on the load current, are defined as $K_0$, $K_1$, and $K_2$, which are collectively referred to as the “Loss Coefficients”. The loss coefficient K represents the power loss factor of the components related to the load current; it is determined once the circuit topology is established and is characterized by the specific parameters of the circuit elements. Furthermore, since the internal power loss of the converter is the difference between the input and output power, the power conversion efficiency can be expressed as shown in (23). As evident from the equation, the power loss is not fundamentally caused by the load current itself but rather depends on the loss coefficients $K$. To improve efficiency, it is crucial to minimize these loss coefficients, particularly noting that $K_2$ has the most significant impact on the overall loss.

$$P_L=K_0\times I_o^0+K_1\times I_o^1+K_2\times I_o^2$$

(22)

$$E=\left({\displaystyle \frac{P_o}{P_o+P_L}}\right)\times 100$$

(23)

Table 2. Power loss of major components related to loss coefficient $K_0$.

Parameter	Value	Unit
Main switch switching loss	$P_{FB\_sw}$	${\displaystyle \frac{1}{2}}·V_{in}^2·C_{FB}·f_s\times 4$
SR switch switching loss	$P_{SR\_sw}$	${\displaystyle \frac{1}{2}}·{\left({\displaystyle \frac{V_{in}}{N}}\right)}^2·C_{SR}·f_s\times 2$
Transformer magnetic core loss	$P_{coreT}$	$5.88\times {10}^{-7}·B_m^{2.7}·f_s^{2.12}·V_e$
Inductor magnetic core loss	$P_{coreL}$	$3.50\times {10}^{-6}·B_m^{2.5}·f_s^{1.4}·V_e$
Output capacitor esr loss	$P_{co}$	${\displaystyle \frac{1}{48}}{\left[{\displaystyle \frac{V_o\left(1-2D\right)}{f_s{L}_F}}\right]}^2·r_{esr}$

summarizes the internal power losses associated with the coefficient $K_0$. As indicated in (22), the loss coefficient $K_0$ is independent of the load current. These include, from top to bottom, the switching losses due to the parasitic capacitance of the primary switches, the switching losses of the synchronous rectifiers, the transformer core loss, the inductor core loss, and the conduction loss of the output capacitor.

Table 3. Power loss of major components related to loss coefficient $K_2$.

Parameter	Value	Unit
Main switch conduction loss	$P_{FB\_cond}$	${\displaystyle \frac{D}{N^2}}\left[I_o^2+{\displaystyle \frac{1}{48}}{\left({\displaystyle \frac{N^2{V}_o}{f_s}}\right)}^2{\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)}^2\right]·r_{FB}·4$
SR switch conduction loss	$P_{SR\_cond}$	${\displaystyle \frac{\left(1+2D\right)}{4}}·r_{SR}·2$
Transformer conduction loss	$P_{T1\_cond}$	${\displaystyle \frac{2D}{N^2}}\left[1+{\displaystyle \frac{1}{48}}{\left({\displaystyle \frac{N^2{V}_o}{I_o{f}_s}}\right)}^2{\left({\displaystyle \frac{1}{L_M}}+{\displaystyle \frac{1-2D}{N^2{L}_F}}\right)}^2\right]·r_{T1}$
Transformer conduction loss	$P_{T2\_cond}$	${\displaystyle \frac{\left(1+2D\right)}{4}}·r_{T2}·2$
Inductor wire conduction loss	$P_{L\_cond}$	$\left[1+{\displaystyle \frac{{\left(1-2D\right)}^2}{48}}{\left({\displaystyle \frac{V_o}{I_o{L}_F{f}_s}}\right)}^2\right]·r_L$

presents the internal power losses related to the coefficient $K_2$. The $K_1$ term, which accounts for losses linearly proportional to the load current, is primarily associated with the constant forward voltage drop of semiconductor diodes. In this study, the adoption of Synchronous Rectifiers (SR) with low on-resistance significantly mitigates such linear losses. Consequently, the internal loss is predominantly governed by the constant switching/core losses $K_0$ and the quadratic conduction losses $K_2$, rendering the impact of the $K_1$ term negligible under the given operating conditions. The $K_2$-related losses, listed from top to bottom, consist of the conduction losses of the primary switches, the conduction losses of the synchronous rectifier switches, the primary and secondary winding losses of the transformer, and the conduction loss of the output inductor. As described above, the transformer and inductor losses are categorized into magnetic core losses and resistive conduction losses from the windings. Regarding the capacitor, the conduction loss is attributed to its internal equivalent resistance. In this case, the loss is independent of the load current and depends instead on the input voltage. This characteristic arises because the DC component of the current is blocked by the capacitor, while only the AC ripple current passes through.

4. Design and Construction of an Experimental Full-Bridge Converter

4.1. Design of an Experimental Full-Bridge Converter

In this paper, to verify the validity of the internal power loss and power conversion efficiency analysis based on the loss coefficients, a 300 W full-bridge converter prototype was constructed, and the experimental results are compared. First,

Table 4. Electrical specifications of the experimental circuit.

Parameter		Value	Unit
Input voltage range	$V_{IN}$	36–75	Vdc
Output voltage	$V_o$	5.0	Vdc
Maximum output power	$P_{o max}$	300	W
Maximum output current	$I_{o max}$	60	A
Switching frequency	$fs$	$240$	kHz
Efficiency	$\eta$	90	%

presents the electrical specifications of the experimental circuit. The input voltage was set to 36–75 V, which is the standard input range for telecommunication power supplies. The output voltage $V_o$ is 5 V, with a maximum output current $I_{o max}$ of 60 A and a total rated power of 300 W. The switching frequency is 240 kHz. The values of the key components can be determined using the steady-state characteristic equations provided in Table 1. The transformer turns ratio $N$, as shown in (24), was set to 6:1 for the transformer fabrication. The transformer’s magnetizing inductance $L_M$ can be calculated using (25), and the values for the output capacitor $C_F$ and output inductor $L_F$ are determined as expressed in (27) and (28), respectively.

$$N={\displaystyle \frac{2D V_{IN}}{V_o}}=6.3$$

(24)

$$L_M\ge {\displaystyle \frac{9N^2{L}_F{V}_o}{4L_F{f}_s{I}_{o max}+V_o\left(1-2D_{min}\right)}}=260 \mu \mathrm{H}$$

(25)

$$D_{min}={\displaystyle \frac{N V_o}{2V_{IN max}}}=0.42$$

(26)

$$C_o\ge {\displaystyle \frac{V_o\left(1-{2D}_{min}\right)}{32f_s^2{L}_F{V}_{cpp}}}=40 \mu \mathrm{F}$$

(27)

$$L_F\ge {\displaystyle \frac{V_o\left(1-2D_{min}\right)}{4f_s{I}_{o min}}}=1.5 \mu \mathrm{H}$$

(28)

4.2. Configuration of an Experimental Full-Bridge Converter

Figure 5 illustrates the equivalent circuit of the full-bridge converter, incorporating internal parasitic resistances. Each resistance represents a component that contributes to conduction loss, such as the on-resistance of the switches and the winding resistance of the transformer. As indicated in (22), the power dissipation caused by these parasitic resistances is reflected in the loss coefficient $K_2$.

Table 5. Manufacturer and model of main components.

Parameter	Name	Model	Maker
Main switch	$S_{1–4}$	FDMS86101	Fairchild (TX, USA)
SR switch	$S_{A,B}$	FDMS86101	Fairchild (TX, USA)
Transformer	$T_1$	PA0908NL	Pulse (CA, USA)
Inductor	$L_F$	SER2814H	Coilcraft (IL, USA)
Capacitor	$C_F$	47µF	Murata (Japan)

details the specifications of the primary components used in the experimental prototype. For the main switches $S_{\mathrm{1,2},\mathrm{3,4}}$ of the full-bridge converter, low-loss FETs (FDM86101 from Onsemi, Phoenix, AZ, USA) were employed. For the synchronous rectifier switches $S_{A,B}$, BSC026N08NSS from Infineon (Neubiberg, Germany) was selected because of its low on-resistance and low-profile package. While the proposed model demonstrates high accuracy, certain limitations exist regarding the selection of specific components. The Infineon (Neubiberg, Germany) BSC026N08NSS MOSFET used in this experiment features extremely low on-resistance and an optimized low-profile package; therefore, applying general-purpose components with lower performance specifications may lead to variations in the power loss model coefficients. The main switches feature a rated voltage of 100 V, an on-resistance of 80 mΩ, and an internal parasitic capacitance of 0.5 nF. TDK magnetic cores were used for both the transformer and the inductor. Notably, the windings were designed using PCB patterns, which significantly reduced the overall height of the system.

Table 6. Parasitic element values of key elements.

Parameter	Unit	Value
Inductance	μH	140
Cross-sectional area of core	cm2	0.12
Volume of core	cm3	3.4
Wire resistance	mΩ	20
Switch capacitance	nF	0.5
Switch on resistance	mΩ	80
Capacitor ESR	Ω	0.4
Auxiliary power	W	1.0

lists the parasitic parameter values of the key components; these values were primarily sourced from the manufacturers’ datasheets, while the parameters for the transformer and inductor were obtained through direct measurement. For experimental measurements, a Takasago (Japan) ZX-800LA (800 W) DC power supply and a Keisokugiken (Japan) LN-1000C-G7 (1 kW) electronic load were utilized. Power analysis was performed using a Yokogawa (Japan) WT1600 power meter. Operational waveforms were observed with a Teledyne LeCroy (New York, USA) HDO6104 oscilloscope, complemented by AP015 current probes and HVD3106 differential probes. Figure 6 presents the configuration of the experimental circuit and the measurement setup. In particular, the control stage utilized a TI (Dallas, TX, USA) UCD3138 digital controller to ensure flexibility and scalability for the system.

5. Comparative Analysis of Experimental Circuits

Figure 7 illustrates the primary operational waveforms of the experimental full-bridge converter. The measurements were conducted at a load current of 15 A with input voltages of 38 V and 70 V. From top to bottom, the waveforms represent the transformer primary voltage, the secondary-side synchronous rectifier switch voltage, and the output inductor current. As shown in the figure, at the minimum input voltage of 38 V, a wide switching interval is observed, which is attributed to the duty cycle compensation for low input voltage conditions. Conversely, while the duty cycle is at its minimum when the input voltage is 70 V, the amplitude of the inductor current ripple reaches its peak. Furthermore, since the AC component of the inductor current flows through the capacitor, the conduction loss of the output capacitor is expected to be highest at an input voltage of 70 V.

The following graphs present the analysis of the internal losses and efficiency characteristics of the 300 W prototype. Figure 8 shows the power conversion efficiency and internal power loss analyzed at the minimum input voltage of 34 V. In Figure 8a, the power conversion efficiency is compared between the theoretical and experimental values. The theoretical values were calculated using (22) and (23), while Figure 8b depicts the internal power loss. The maximum efficiency recorded was 93.11%, with a maximum internal loss of 37.6 W. Specifically, at full load, the theoretical and experimental efficiencies were 89.42% and 88.9%, respectively; overall, the efficiency and loss curves exhibited a very similar trend with a maximum deviation of less than 1%. To evaluate the scientific accuracy of the proposed model, a detailed comparative examination was conducted across specific load segments. As requested by the reviewer, the efficiency trends were analyzed to identify discrepancies between theoretical and practical values. In the light-load region (0–15 A), the efficiency predicted by the theoretical model was slightly higher than the practically measured values. This minor discrepancy is attributed to the increased dominance of auxiliary power consumption and parasitic switching losses that are challenging to characterize fully at very low currents. Conversely, in the medium-to-full load range (30–60 A), the theoretical efficiency was observed to be slightly lower than the practical results in certain points, although the curve closely tracked the measured data overall.

Such anomalies between theory and practice are well-recognized in power electronics research due to the complex nonlinear behavior of components under varying thermal and electromagnetic conditions. However, the maximum error margin between the calculated and measured efficiency remained below 1.0% across the entire load spectrum. Given that a tolerance limit of 1% to 5% is generally accepted in literature as a standard for validating scientific accuracy, the results presented in Figure 8 and Figure 9 confirm that the proposed loss-coefficient-based framework is highly reliable. Specifically, Figure 9 illustrates the comparative analysis at a nominal input voltage of 48 V. As depicted in Figure 9a,b, the converter achieved a measured maximum efficiency of 92.1%. At the 100% rated load, the theoretical efficiency of 89.6% aligns exceptionally well with the experimental value of 89.7%, resulting in a negligible discrepancy of only 0.1%. This high degree of correlation, with error margins well below the 1–5% permissible limit, demonstrates that the proposed methodology effectively captures the impact of both constant losses and load-dependent conduction losses.

Figure 10 illustrates the performance at the maximum input voltage of 70 V. The maximum efficiency was 90.4%, with a maximum internal loss of 37.72 W. Although the theoretical and experimental efficiencies at full load were 89.4% and 88.8%, respectively, the curves maintained a similar profile within a 1% error margin. The proposed model’s accuracy was rigorously tested across a wide load spectrum. As depicted in Figure 8, Figure 9 and Figure 10, the efficiency analysis includes light-load data points (such as 10% and 20% of the rated load), where the theoretical curves closely align with the experimental measurements with an error of less than 1%. This consistency validates that the loss coefficients effectively capture both constant and load-dependent losses.

The data show that power conversion efficiency and internal power loss at 34 V, 48 V, and 70 V input differ by less than 1% between experimental and theoretical values. Furthermore, the internal loss and efficiency curves demonstrated consistent trends across the entire load current range. The proposed loss coefficient analysis method, which uses the RMS currents of major components and internal parasitic elements, effectively predicts internal power loss and efficiency at the initial design stage.

6. Conclusions

In this paper, a novel analytical approach is proposed for the precise and systematic evaluation of power conversion efficiency in full-bridge converters. A steady-state analysis was conducted based on the equivalent circuit of the full-bridge converter, leading to the introduction of the “Loss Coefficient” concept. This concept redefines loss factors based on their correlation with load power and load current. Specifically, to clarify the impact on overall system efficiency, loss coefficients originating from major active and passive components were categorized according to their dependence on the load current. These coefficients were tabulated to provide a quantitative breakdown of the loss distribution. Furthermore, beyond mathematical derivation, this study visualized the correlation between internal losses and overall power conversion efficiency through graphical representations. These intuitive graphs enable designers to easily identify loss distributions and facilitate the achievement of optimal efficiency.

To verify the effectiveness and reliability of the proposed analytical technique, a 300 W full-bridge converter prototype was fabricated and tested. The theoretically derived loss and efficiency analysis results were quantitatively compared with the data measured from the experimental circuit. The results demonstrate that under full-load conditions, the error between theoretical and experimental efficiency values remained within a very narrow margin of less than 1%. This confirms that the analytical model proposed in this study accurately reflects the operational characteristics of the actual hardware. In conclusion, the loss coefficient analysis method incorporating the RMS currents of key components and internal parasitic elements has proven to be a highly effective means of predicting internal power loss trends and power conversion efficiency characteristics relative to load current variations. The proposed loss coefficient-based analysis provides a versatile framework that can be extended to various isolated DC–DC converter topologies, provided that the RMS current relations of the components are established. While this study focused on fixed-frequency full-bridge converters, future research will explore the adaptation of this model to frequency-modulated systems, further enhancing its applicability in diverse power conversion scenarios.