A Reproducible Weak-Grid Benchmark with Switching-Averaged EMT Validation for Battery-Backed Grid-Forming Control in PV Microgrids

Abstract

Controller comparisons for grid-forming battery inverters are often confounded by simultaneous changes in the plant model, saturation law, measurement filtering, and disturbance envelope. This paper addresses that problem through a reproducible weak-grid benchmark and a switching-averaged EMT validation layer for a battery-backed PV microgrid. Droop, virtual synchronous machine (VSM), and power-synchronization control (PSC) are compared under identical plant data, load disturbance, grid-strength reduction, voltage sag, current limit, and metric-extraction rules. The benchmark reveals a consistent trade-off: VSM provides the best frequency moderation, droop provides the fastest post-fault restoration and the lowest implementation burden, and PSC provides the most balanced compromise across recovery, stability, EMT, and implementation metrics. The averaged EMT layer preserves the low-order restoration ordering and sharpens the waveform trade-off during the fault window. Additional analyses quantify the converter-angle excursions during the sag, clarify the reduced lag tolerance of VSM as the grid becomes weaker, and test the local robustness of the reported ranking against representative tuning perturbations. The resulting message is benchmark-specific but operationally useful: controller selection should follow the dominant project objective—frequency quality, restorative efficiency, or balanced performance—before controller-specific switching EMT, hardware-in-the-loop, and plant-level studies are launched.

1. Introduction

Battery-backed grid-forming converters are increasingly expected to stabilize photovoltaic microgrids that operate with limited synchronous support and weak feeder conditions [1,2,3]. Converter-dominated operation changes the design question from simple power injection to the coordinated delivery of voltage formation, frequency moderation, weak-grid stability, and recoverable current-limited support [4,5,6]. Recent reviews converge on the same practical issue: controller families are well classified, but matched engineering benchmarks that isolate the controller effect from the surrounding plant assumptions are still comparatively scarce [7,8,9].

Droop control remains attractive because of its compact structure and implementation transparency [10]. VSM control introduces an additional inertia-like state that can improve frequency moderation and can be tuned in a language familiar to power-system engineers [11]. PSC, in turn, uses an active-power-driven phase law that is often regarded as a strong candidate for weak-grid operation because it preserves source-forming behavior without a separate inertia state [8,9,12]. The distinctive contribution of the present paper is not another broad taxonomy of these families, but a matched benchmark that keeps the plant, disturbance sequence, current-limit law, voltage loop, measurement-lag structure, and post-processing rules fixed while only the controller-family logic is changed.

Existing reviews already highlight why such a benchmark is needed. Khan et al. synthesize GFM operation and system-stability implications at the power-system level [7]. Qaisar and Fang emphasize weak-grid behavior, current limiting, and the practical trade-offs among GFM implementations [8]. Evald et al. identify implementation realism, validation depth, and low-inertia integration as defining next-step issues rather than settled questions [9]. Meanwhile, current-limiting and protection reviews show that the apparent controller ranking can change once saturation, lag, and post-fault recovery are treated seriously [13,14,15]. The gap addressed here, therefore, lies between broad review-level synthesis and project-specific EMT design: the paper develops a reproducible benchmark that yields a controller-selection message under matched assumptions and then tests whether that message survives an averaged EMT consistency layer.

The manuscript contributes five elements. First, it defines a reproducible weak-grid benchmark for a battery-backed PV microgrid exposed to a load increase, an SCR reduction, and a current-limited voltage sag. Second, it compares droop, VSM, and PSC under identical plant, filter, and disturbance assumptions. Third, it adds a switching-averaged EMT layer to determine whether waveform-level recovery preserves the low-order ranking. Fourth, it audits the validity of the low-order power-transfer approximation during the deep-sag interval and reports the actual converter-angle excursions reached by each controller. Fifth, it supplements the benchmark with explicit linearization notes, discrete-time implementation steps, and a local tuning-sensitivity analysis so that the benchmark can be reproduced and interpreted more rigorously.

The paper is organized as follows. Section 2 presents the benchmark configuration, controller models, tuning workflow, and EMT validation layer. Section 3 defines the quantitative indicators and the implementation-burden method. Section 4 reports the dynamic, fault-response, EMT, stability, and scorecard results. Section 5 converts the numerical outcomes into controller-selection guidance. Section 6 discusses extrapolation limits and future extensions. Section 7 concludes the paper. Appendix A consolidates the controller equations and the linearization used for the small-signal study, while Appendix B documents the discrete-time implementation sequence, parameter-selection logic, and local sensitivity analysis.

2. Benchmark Configuration and Controller Models

2.1. Single-Bus Benchmark Structure

Figure 1 shows the benchmark used throughout the paper. The studied system is a single-bus microgrid in which a battery energy storage system (BESS) operates as the grid-forming source, a photovoltaic unit is connected as a grid-following source, a local load is supplied at the same bus, and an upstream weak grid is represented by a Thevenin equivalent whose short-circuit ratio (SCR) is varied during the test sequence. This topology is intentionally compact. It concentrates the comparison on the controller family rather than on network-scale modeling details and still preserves the main mechanisms of interest: source formation, weak-grid coupling, fault current limiting, and post-fault recovery.

The benchmark sequence contains three events. At $t=1.0 \mathrm{s}$, the local demand increases by 0.18 p.u. At $t=2.2 \mathrm{s}$, the external grid weakens and the post-disturbance SCR drops from 5 to 2. At $t=3.4 \mathrm{s}$, a voltage sag is applied for 180 ms, which forces current limiting at 1.2 p.u. These events were chosen because they collectively stress nominal regulation, weak-grid behavior, and fault recovery in one reproducible sequence. In the reduced benchmark, SCR = 5 represents a moderately stiff upstream grid, whereas SCR = 2 represents a clearly weak grid; for the same nominal voltage base, the associated Thevenin reactance in the reduced model therefore increases by a factor of 2.5 when the benchmark moves from the pre-disturbance to the post-disturbance condition.

Table 1. Benchmark configuration and disturbance sequence.

Item	Value	Purpose
Nominal active-power reference $P^{\star }$	0.58 p.u.	Defines the pre-disturbance operating point of the BESS inverter.
Reactive-power reference $Q^{\star }$	0.00 p.u.	Keeps the voltage-loop comparison consistent across controllers.
Initial grid strength	SCR = 5.0	Represents a moderately stiff pre-disturbance grid.
Post-disturbance grid strength	SCR = 2.0	Forces a weak-grid operating condition after the network-strength change.
Load increase	0.18 p.u. at $t=1.0 \mathrm{s}$	Excites active-power sharing and frequency support.
Voltage sag	$V_g=0.40 \mathrm{p}.\mathrm{u}.$ from $t=3.4 \mathrm{s}$ to 3.58 s	Forces current limiting and recovery behavior.
Current limit	1.20 p.u.	Represents converter hardware protection.
Power-estimation lag ${\tau }_p$	40 ms (nominal)	Models filtered active-power estimation in the outer loop.

summarizes the benchmark settings.

2.2. Low-Order Benchmark Model

The benchmark uses a low-order model so that each term has a direct engineering meaning. The network-facing active and reactive power are approximated as

$$P=K_P\mathrm{SCR}E{V}_{g}sin\delta +P_L,$$

(1)

$$Q=K_Q\mathrm{SCR}\left(E-V_{g}cos\delta \right),$$

(2)

where E is the internal voltage magnitude, $\delta$ is the converter angle relative to the upstream grid, $V_g$ is the grid voltage during normal and faulted intervals, and $P_L$ is the active-power demand of the local load. The model is normalized, so all variables are reported in per-unit form. Equations (1) and (2) are nonlinear sinusoidal transfer relations rather than small-angle linearisations; the simplification lies in the use of a lossless single-coupling equivalent, not in truncating the sine or cosine terms.

The converter current magnitude is computed as

$$I={\displaystyle \frac{\sqrt{P^2+Q^2}}{max(E,0.55)}},$$

(3)

and current limiting is imposed by a uniform saturation law

$$\left(P_s,Q_s\right)=\left\{\begin{array}{cc}\left(P,Q\right),\hfill & I\le I_{max},\hfill \\ {\displaystyle \frac{I_{max}}{I}}\left(P,Q\right),\hfill & I>I_{max},\hfill \end{array}\right.$$

(4)

with $I_{max}=1.2 \mathrm{p}.\mathrm{u}.$ The measured powers used by the outer loops are filtered through first-order lags

$${\tau }_p{\dot{P}}_m=P_s-P_m,{\tau }_q{\dot{Q}}_m=Q_s-Q_m,$$

(5)

which capture the effective estimation delay introduced by signal conditioning and outer-loop processing.

All controllers share the same voltage loop

$${\tau }_E\dot{E}=E^{\star }+n_q\left(Q^{\star }-Q_m\right)-E,$$

(6)

so the comparison remains focused on the active-power and angle-generation mechanisms.

2.3. Compared Control Families

Three control families are benchmarked.

• Droop control.

The droop implementation uses a directly regulated phase state:

$$\dot{\delta }=k_d\left(P^{\star }-P_m\right)-c_d\delta .$$

(7)

This family is compact, easy to tune, and computationally light.

• Virtual synchronous machine control.

The VSM implementation introduces a frequency state $\omega$:

$$\dot{\delta }=\omega ,$$

(8)

$$M\dot{\omega }=P^{\star }-P_m-D_{\mathrm{eff}}\omega ,$$

(9)

where M is the virtual inertia constant and $D_{\mathrm{eff}}$ is the benchmark damping term. In the benchmark, the same nominal VSM parameters are retained while the grid weakens, which is precisely why lag sensitivity becomes visible in the weak-grid envelope.

• Power-synchronization control.

The PSC implementation also generates the phase state directly:

$$\dot{\delta }=k_{\mathrm{psc}}\left(P^{\star }-P_m\right)-c_{\mathrm{psc}}\delta .$$

(10)

Although the reduced PSC law resembles the droop phase law algebraically, its interpretation is different: the controller is tuned and discussed as an active-power-driven synchronization mechanism rather than as a classical frequency-droop loop. The distinguishing choice in this benchmark is therefore the synchronization philosophy and gain placement, not the introduction of an additional inertia state. The adopted PSC form should be read as a reduced-order representative of the active-power-driven phase-synchronization family described in the PSC literature [8,9,12].

Table 2. Nominal controller and model parameters used in the benchmark.

Parameter	Value	Interpretation
$K_P$	1.35	Active-power coupling gain.
$K_Q$	1.10	Reactive-power coupling gain.
${\tau }_E$	$0.08$ s	Common voltage-loop time constant.
$n_q$	0.18	Common reactive-power droop coefficient.
$k_d$	2.8	Droop phase-synchronization gain.
$c_d$	0.04	Droop phase-restoring term.
M	$0.20$ s	VSM virtual inertia constant.
$D_{\mathrm{eff}}$	0.75	VSM damping coefficient in the benchmark.
$k_{\mathrm{psc}}$	2.2	PSC synchronization gain.
$c_{\mathrm{psc}}$	0.02	PSC phase-restoring term.
${\tau }_p={\tau }_q$	$0.04$ s	Effective power-estimation lag in the outer loop.

lists the nominal benchmark parameters.

Virtual-oscillator control (VOC) is intentionally excluded from the matched benchmark. The present testbed fixes an explicit filtered power-measurement path, a shared voltage-magnitude loop, and a phase-state comparison structure. VOC generates angle and voltage through nonlinear oscillator states, so including it would require a different state definition and parameterization rather than a fourth point in the same benchmark envelope [8,16].

2.4. Parameter Selection, Numerical Integration, and Fair-Comparison Protocol

A benchmark comparison is only useful if the reader can see what was held constant and what was allowed to change. In this study, the plant structure, disturbance sequence, voltage loop, measurement-lag structure, saturation law, and metric extraction rules are fixed across all compared cases. Only the active-power and angle-generation law is changed from droop to VSM or PSC.

The benchmark parameters were obtained through a sequential tuning workflow rather than global optimization. First, the common plant parameters and the shared voltage-loop parameters KP, KQ, tauE, and nq were selected so that the pre-disturbance operating point remained close to 1.0 p.u. voltage at SCR = 5. Second, the droop and PSC active-power gains were adjusted to achieve stable nominal operation, monotonic recovery after the load event, and comparable voltage-loop aggressiveness. Third, the VSM inertia and damping parameters were selected to provide visibly stronger frequency moderation without changing the plant or protection envelope. The resulting benchmark therefore compares representative tuned implementations rather than controller-specific optimum cases.

The low-order model is solved with a fixed-step fourth-order Runge–Kutta scheme using a $2.5$ ms step. This step matches the exported benchmark traces and remains substantially smaller than the smallest outer-loop time constant used in the study.

Table 3. Fair-comparison protocol used in the benchmark.

Comparison Aspect	Fixed Across All Cases	Allowed to Change	Purpose
Plant and network model	Same BESS–PV–load structure, same weak-grid equivalent, same $K_P$, $K_Q$, ${\tau }_E$, and $n_q$	None	Isolates the controller-family effect from plant redesign.
Disturbance sequence	Same load increase, same SCR reduction, same sag duration and depth	None	Applies an identical stress envelope to each controller.
Protection and saturation	Same $I_{max}$ and same current-limiting law	None	Keeps the fault-response comparison hardware-consistent.
Measurements and filtering	Same $P_m$ and $Q_m$ structure and same nominal ${\tau }_p={\tau }_q$	None	Exposes all families to the same estimation-lag mechanism.
Phase-generation law	Common source-forming objective	Droop, VSM, or PSC state equation	Creates the actual family-to-family contrast.
Tuning basis	Stable nominal operation at SCR = 5 and comparable voltage-loop aggressiveness	Family specific active-power and angle gains	Avoids over-optimizing one family for a single metric.
Metric extraction	Same settling and recovery thresholds	None	Preserves objective post-processing across controllers.
Averaged EMT layer	Same 50 $\mu$$s$ step, same interface-inductor model, same current clamp, same RMS estimator	Only the controller trajectories injected into the EMT layer	Confirms that waveform-level ranking remains tied to the compared family rather than to a different validation setup.
Interpretive scope	Screening benchmark for matched assumptions	None	Prevents the results from being misread as universal rankings.

summarizes the comparison protocol.

2.5. Averaged EMT Validation Layer

Low-order benchmarks are attractive because they keep matched comparisons transparent, but they still leave an important practical question unanswered: does the observed controller ordering survive once waveform-level transients are resolved at an electromagnetic-transient time scale? To answer that question without turning the paper into a different tuning contest, the present study adds a balanced three-phase, switching-averaged EMT validation layer around the fault window.

For each controller, the internal phase voltage used by the EMT layer is reconstructed as

$$v_a^{\mathrm{inv}}\left(t\right)=\sqrt{2}E\left(t\right)sin\left({\omega }_{0}t+{\delta }_0+\Delta \delta \left(t\right)\right),\Delta \delta \left(t\right)={\int }_0^t\omega \left(\tau \right){\omega }_0\mathrm{d}\tau ,$$

(11)

with analogous expressions for phases b and c. The upstream grid voltage is represented by the same balanced sag profile used in the low-order benchmark, and the interface current is computed from a common phase-inductor model,

$$L_f\left(t\right){\displaystyle \frac{\mathrm{d}{i}_a}{\mathrm{d}t}}=v_a^{\mathrm{inv}}\left(t\right)-v_a^g\left(t\right)-R_f\left(t\right)i_a\left(t\right),$$

(12)

where $v_a^g\left(t\right)=\sqrt{2}{V}_g\left(t\right)sin\left({\omega }_{0}t\right)$, $X_f\left(t\right)=X_{0}5/\mathrm{SCR}\left(t\right)$, $L_f\left(t\right)=X_f\left(t\right)/{\omega }_0$, $R_f\left(t\right)=0.12X_f\left(t\right)$, and $X_0=0.32 \mathrm{p}.\mathrm{u}$.

The EMT layer does not re-solve the outer voltage loop. Instead, the low-order benchmark first produces the controller trajectories and then injects them into the EMT layer through time interpolation when Equation (11) is evaluated. The voltage loop in Equation (6) is therefore active only in the benchmark layer; the EMT layer uses the resulting voltage trajectory as a prescribed input so that the validation remains a consistency check rather than a second tuning problem. To remain consistent with the shared hardware envelope, phase-current limiting in the EMT layer is implemented as a hard magnitude saturation with no smoothing function.

Cycle-RMS envelopes are computed over one nominal fundamental period and are used to extract three waveform-level indicators: the peak one-cycle RMS current during and just after the fault, the minimum fault-window RMS voltage, and the recovery time needed for terminal RMS voltage to exceed $0.95 \mathrm{p}.\mathrm{u}.$ after sag clearance. A fourth indicator, the maximum $|\mathrm{d}{i}_a/\mathrm{d}t|$ in the fault window, is included to expose how aggressively each controller drives the interface current once the voltage sag is applied and removed. This EMT layer should therefore be interpreted as a consistency validation of the matched benchmark, not as a replacement for project-specific switching or HIL studies.

3. Performance Indicators and Implementation-Burden Method

The benchmark is evaluated with indicators that are directly observable in the time traces.

Table 4. Performance indicators used in the benchmark comparison.

Indicator	Definition	Engineering Meaning
Frequency excursion $J_f$	$max\left|\omega \right(t\left)\right|$ during the load-step window	Measures how strongly the controller departs from the nominal frequency trajectory.
RoCoF proxy $J_r$	$max|\mathrm{d}\omega /\mathrm{d}t|$ over the full sequence	Quantifies transient aggressiveness of the active-power loop.
Load-step settling time $T_s$	First, time after $t=1s$ for which $|P-P_{\mathrm{ss}}|<0.02 \mathrm{p}.\mathrm{u}.$ and $\left|\omega \right|<0.02 \mathrm{p}.\mathrm{u}.$	Measures restorative speed after the active-power disturbance.
Fault recovery time $T_f$	First, time after sag clearance for which $|E-1|<0.02 \mathrm{p}.\mathrm{u}.$ and $\left|\omega \right|<0.02 \mathrm{p}.\mathrm{u}.$	Measures post-fault restoration quality.
Fault active-power retention ${\eta }_P$	Mean fault-window power divided by pre-fault power	Quantifies how much active-power service remains during current limiting.
Support-energy excursion $J_E$	$\int |P\left(t\right)-P^{\star }|\mathrm{d}t$	Measures the battery energy swing required by the controller.
Dominant damping ratio $\zeta$	Computed from the linearized dominant eigenvalue	Captures small-signal damping of the low-order benchmark model.
Acceptable lag ${\tau }_{p,max}$	Largest lag that still satisfies the benchmark recovery criterion	Measures sensitivity to filtered active-power estimation.
EMT voltage recovery $T_{V,\mathrm{EMT}}$	First, time after sag clearance for which the one-cycle RMS terminal voltage exceeds $0.95 \mathrm{p}.\mathrm{u}.$	Confirms post-fault restoration ordering in the switching-averaged EMT layer.
EMT current slew $S_{I,\mathrm{EMT}}$	$max|\mathrm{d}{i}_a/\mathrm{d}t|$ during fault entry and clearing	Indicates waveform aggressiveness and interface-stress severity.

summarizes the metrics used in the paper.

To condense the evidence without imposing subjective weights, the paper also reports a metric-wise ordinal scorecard. For each metric m and controller c, a benchmark score $r_{c,m}\in \{1,2,3\}$ is assigned according to the controller position within the compared set, where 3 denotes the best value for that metric, 2 the middle value, and 1 the weakest value. For lower-is-better metrics, the ranking is computed in ascending order; for higher-is-better metrics, it is computed in descending order. The scorecard therefore preserves metric diversity and makes the final take-away message explicit, while avoiding a single weighted index that could hide the underlying trade-offs.

For the stability-related analysis, the benchmark equations are linearized around the pre-fault operating point at a fixed post-disturbance SCR. The dominant damping ratio is obtained from the eigenvalue with the largest real part. The acceptable lag is defined through the time-domain sequence: the controller passes if the post-fault trajectory returns to $|E-1|<0.03 \mathrm{p}.\mathrm{u}.$ and $\left|\omega \right|<0.03 \mathrm{p}.\mathrm{u}.$ within $1.6$ s after sag clearance. Appendix A gives the state vectors, the relevant Jacobian entries, and the reduced characteristic polynomials used to interpret the lag-tolerance results.

Implementation burden is estimated for the outer loop only. The counts are reported per control sample and refer only to controller-specific outer-loop calculations. Common PWM, modulation, diagnostics, and hardware protection functions are intentionally excluded. The benchmark also treats the trigonometric evaluations needed for three-phase waveform synthesis as common overhead, so they are not used to differentiate the compared families. The resulting burden metric is therefore a relative integration-overhead indicator rather than a claim that any controller exceeds the capability of a modern DSP.

4. Benchmark Results

4.1. Response to the Load Increase and SCR Reduction

Figure 2 shows the full benchmark sequence. VSM produces the smallest frequency excursion after the load increase, which is consistent with its additional inertia state. Droop and PSC respond more sharply, but they return to the new operating point much faster. Once the SCR drops from 5 to 2 at $t=2.2s$, the distinction becomes clearer: the VSM trajectory remains smoother but also more weakly damped in the benchmark, whereas droop and PSC regain the steady regime more quickly.

Table 5. Benchmark results for the three compared control families.

Controller	${\mathit{J}}_{\mathit{f}}$ ($\mathbf{p}.\mathbf{u}.$)	${\mathit{J}}_{\mathit{r}}$ ($\mathbf{p}.\mathbf{u}./\mathbf{s}$)	${\mathit{T}}_{\mathit{s}}$ (s)	${\mathit{T}}_{\mathit{f}}$ (s)	${\mathit{\eta }}_{\mathit{P}}$ (−)	${\mathit{J}}_{\mathit{E}}$ ($\mathbf{p}.\mathbf{u}.\mathit{s}$)
Droop	0.295	23.802	0.282	0.475	0.577	0.142
VSM	0.113	1.088	1.098	1.855	0.495	0.336
PSC	0.246	17.069	0.193	0.565	0.566	0.151

quantifies these observations. The benchmark frequency excursion is $0.295 \mathrm{p}.\mathrm{u}.$ for droop, $0.113 \mathrm{p}.\mathrm{u}.$ for VSM, and $0.246 \mathrm{p}.\mathrm{u}.$ for PSC. The load-step settling times are $0.282$ s, $1.098$ s, and $0.193$ s, respectively. These data make the first benchmark trade-off explicit: VSM moderates frequency most effectively, while droop and PSC restore the operating point far faster after the active-power disturbance.

4.2. Fault Response, Current Limiting, and Angle-Validity Audit

Figure 3 zooms into the voltage-sag interval. All three controllers hit the $1.2 \mathrm{p}.\mathrm{u}.$ current limit, as intended by the benchmark. The key difference lies in the retained active power and the post-fault restoration path. Droop and PSC retain 0.577 and 0.566 of the pre-fault active power, while VSM retains 0.495. The VSM response also carries the largest support-energy excursion, which indicates a higher battery swing requirement for the same disturbance sequence.

The post-fault recovery times reinforce the same conclusion. Droop and PSC recover in $0.475$ s and $0.565$ s, whereas VSM needs $1.855$ s. In a battery-backed microgrid, that difference matters because current-limited support must be converted into a recoverable service rather than a long energy excursion.

Table 6. Sag-window angle audit for the low-order benchmark trajectories.

Controller	Pre-Sag $\left|\mathit{\delta }\right|$ (Deg)	Sag-Window ${\left|\mathit{\delta }\right|}_{max}$ (Deg)	Incremental Sag Excursion (Deg)	Max. Relative Error of $sin\mathit{\delta }\approx \mathit{\delta }$
Droop	8.50	14.07	5.56	1.00%
VSM	9.40	9.79	0.39	0.49%
PSC	8.52	12.99	4.48	0.85%

addresses the reviewer concern about low-order validity during the deep sag. The benchmark trajectories keep the absolute converter angle below 14.1 degrees for all three controllers, and the maximum a posteriori relative error that would arise if one linearized the sine term remains below 1.1 percent. The model therefore remains within a moderate-angle regime even during the faulted interval. More importantly, the benchmark equations themselves retain the nonlinear sine and cosine terms, so the reported sag-window results are not obtained from a truncated small-angle model.

4.3. Averaged EMT Validation of the Fault Window

The switching-averaged EMT layer is designed as a ranking-consistency check rather than as a second tuning contest. Figure 4 resolves the phase-a current at fault entry and the smoothed one-cycle RMS current and voltage envelopes across the fault interval.

Table 7. Waveform-level indicators extracted from the switching-averaged EMT validation layer.

Controller	${\mathit{I}}_{\mathbf{rms},\mathbf{pk}}^{\mathbf{fault}}$ ($\mathbf{p}.\mathbf{u}.$)	${\mathit{I}}_{\mathbf{rms},\mathbf{pk}}^{\mathbf{post}}$ ($\mathbf{p}.\mathbf{u}.$)	${\mathit{V}}_{\mathbf{rms},\mathbf{min}}^{\mathbf{fault}}$ ($\mathbf{p}.\mathbf{u}.$)	${\mathit{T}}_{\mathit{V},\mathbf{EMT}}$ (ms)	${\mathit{S}}_{\mathit{I},\mathbf{EMT}}$ ($\mathbf{p}.\mathbf{u}./\mathbf{s}$)
Droop	0.935	1.134	0.826	46.5	826.8
VSM	0.949	1.022	0.811	71.9	582.7
PSC	0.931	1.100	0.842	57.3	652.0

summarizes the extracted EMT indicators.

Three observations are technically important. First, the EMT layer preserves the low-order ordering of post-fault restoration: droop restores terminal RMS voltage above $0.95 \mathrm{p}.\mathrm{u}.$ in $46.5$ ms, PSC in $57.3$ ms, and VSM in $71.9$ ms. Second, the minimum fault-window RMS voltage is also controller-dependent, with PSC reaching $0.842 \mathrm{p}.\mathrm{u}.$, droop $0.826 \mathrm{p}.\mathrm{u}.$, and VSM $0.811 \mathrm{p}.\mathrm{u}.$. Third, the waveform layer exposes a trade-off that is only implicit in the low-order envelopes: droop and PSC recover faster, but they do so with higher post-fault RMS current peaks and higher current-slew rates. VSM is slower, yet it also produces the smoothest current trajectory, with the smallest maximum $|\mathrm{d}{i}_a/\mathrm{d}t|$ in the EMT window.

4.4. Stability-Oriented Comparison and Admissible Operating Region

Figure 5 summarizes the stability-oriented part of the study. The left panel reports the dominant damping ratio of the linearized benchmark model. Under the matched tuning used here, PSC exhibits the strongest damping across the explored SCR range, droop remains second, and VSM is consistently the most weak-grid-sensitive family. The difference is already visible at SCR = 2.0, where the dominant damping ratio is 0.919 for droop, 0.321 for VSM, and 1.000 for PSC.

The right panel converts the lag-tolerance test into an admissible operating envelope in the SCR–lag plane. This representation is more informative than a single lag value because it shows how much timing margin remains available after the grid has weakened. In the present benchmark, droop and PSC remain acceptable up to 100 ms over the explored SCR range, whereas VSM contracts to a markedly smaller envelope and is acceptable up to 30 ms at SCR = 2.0. The reduced VSM lag tolerance follows directly from the benchmark structure. As SCR falls, the synchronizing coefficient decreases, so the same filtered-power delay represents a larger phase lag relative to restoring torque. Droop and PSC feed that delayed power estimate into a first-order phase law, whereas VSM feeds it into an additional inertial state before phase is recovered. The extra dynamic order therefore loses damping margin sooner when the grid becomes weaker. Appendix A provides the reduced characteristic polynomials that make this mechanism explicit.

4.5. Implementation Burden and Ordinal Scorecard

The outer-loop implementation audit is shown in Figure 6 and

Table 8. Estimated outer-loop implementation burden.

Controller	Measured Signals	Dynamic States	Scalar Ops/Sample	Memory Words
Droop	4	3	18	14
VSM	4	5	32	24
PSC	3	3	22	16

. Droop uses the smallest arithmetic and memory footprint, PSC is slightly heavier, and VSM is clearly the most demanding because it carries the additional frequency state and more outer-loop arithmetic. This ranking is not presented as a feasibility limit on modern DSPs; it is included because practical controller integration in microgrids also depends on code margin, timing robustness, and commissioning simplicity, especially when communication, diagnostics, and protection functions are added around the core control law.

The raw metrics are condensed in Figure 7. Droop ranks first in fault recovery, retained fault-window power, energy swing, EMT voltage recovery, and implementation burden, but it ranks third in frequency quality and current-slew smoothness. VSM ranks first in frequency quality and current-slew smoothness, but it ranks third in restoration, lag tolerance, and implementation burden. PSC rarely dominates a single category as strongly as droop or VSM, yet it remains in the best or middle position across all groups. That metric-by-metric balance is the key reason why PSC emerges as the most even compromise in the present benchmark rather than the absolute winner of every individual metric.

5. Discussion and Design Implications

The benchmark supports a structured controller-selection message rather than a universal ranking.

For frequency-sensitive operation, VSM remains attractive because it produces the smallest frequency excursion and the lowest RoCoF proxy. That advantage is technically meaningful for islanded or low-inertia operation in which frequency quality dominates the design brief. The same benchmark, however, shows that this benefit is coupled to slower recovery, lower lag tolerance, and higher outer-loop burden. A VSM choice is therefore most defensible when the project can enforce tighter timing discipline and can accommodate longer post-fault restoration.

For restoration-centric microgrids, droop provides the strongest evidence. It achieves the shortest post-fault recovery time, the largest retained active power during the sag, the smallest support-energy excursion, and the lightest implementation burden. The EMT layer confirms that the same controller also restores RMS voltage fastest. The trade-off is sharper current forcing during the fault window, which means that droop is best suited to projects that prioritize rapid restorative service and implementation simplicity over waveform smoothness.

PSC occupies the most balanced region of the benchmark. It achieves the fastest load-step settling time, retains short post-fault recovery, preserves the full admissible lag envelope observed for droop, and avoids the high current-slew severity of droop. In practical terms, PSC is the most robust default candidate when the project objective is balanced performance rather than optimization of a single metric.

The benchmark should also be interpreted in relation to broader microgrid topologies. In a multi-inverter microgrid, line-impedance coupling adds collective modes that are absent from the present single-bus study. The restorative ordering observed here is expected to remain informative when one BESS inverter dominates source formation, but the absolute lag margins and damping ratios—especially for VSM—can change once mutual support or inter-unit oscillatory modes appear [17,18]. In addition, distributed primary–secondary coordination introduces communication and restoration dynamics that lie outside the present single-bus benchmark [19]. The present scorecard should therefore be used as a screening result for controller pre-selection, not as a replacement for network-coupled eigenanalysis in multi-converter installations.

The benchmark also suggests a practical validation workflow. A matched low-order study is sufficient to screen controller families and expose their main trade-offs. A switching-averaged EMT layer then checks whether the same ranking remains coherent once waveform-level recovery and current slew are resolved. Only after that second step should controller-specific switching EMT, HIL, or plant-level studies be launched. This staged process is one of the main scientific contributions of the paper: it converts a controller-family comparison into a reproducible validation sequence that engineers can actually reuse.

Adaptive damping work remains relevant to this interpretation. Benchmark-specific controller rankings can change once family-specific enhancement layers are added. Examples include model-matching and energy-shaping extensions, virtual-impedance-aware angle droop, and asymmetrical virtual-impedance stabilization [20,21,22]. This is precisely why the present paper reports matched baseline families before considering augmented variants. In that sense, the adaptive damping strategy of Khan et al. is best interpreted as a next-step controller enhancement rather than as evidence that the baseline family trade-offs disappear [23].

Table 9. Application-oriented controller selection matrix derived from the benchmark evidence.

Primary Project Priority	Preferred Controller in the Benchmark	Reason Based on Quantitative Evidence
Smallest frequency excursion and lowest RoCoF proxy	VSM	VSM yields the lowest $J_f$ and $J_r$, which makes it the strongest frequency-moderating option in the studied benchmark.
Fastest restoration after a load increase	PSC	PSC achieves the shortest load-step settling time ($T_s=0.193s$).
Fastest post-fault recovery	Droop	Droop achieves the shortest fault-recovery time ($T_f=0.475s$).
Highest retained active power during the sag	Droop	Droop yields the largest ${\eta }_P$ among the compared cases.
Smallest battery support-energy excursion	Droop	Droop gives the smallest $J_E$, which reduces temporary battery energy swing.
Largest admissible lag margin at SCR = 2	Droop or PSC	Both controllers remain acceptable up to 100 ms in the studied benchmark.
Lowest outer-loop implementation burden	Droop	Droop requires the fewest arithmetic operations and memory words.
Best balanced compromise of restoration, stability, and implementation	PSC	PSC remains in the best or middle position across all benchmark categories without the weak extremes seen in the other families.

summarizes the resulting application-oriented controller-selection guidance.

6. Limitations and Applicability

The benchmark is intentionally compact and should be interpreted within that scope. First, its main comparison layer remains a low-order outer-loop model. That layer does not represent the grid-following PV unit’s detailed PLL/filter dynamics, converter-impedance interactions, switching harmonics, inner current-control bandwidths, or filter resonances [24,25,26]; it also omits sequence components and communication-assisted plant control. Second, the added EMT layer is balanced and switching-averaged. It improves waveform-level observability, but it is not a full switching model, and it does not resolve PWM harmonics, device-level thermal stress, unbalanced faults, or relay algorithm internals [27]. Third, the compared controllers are tuned to provide stable nominal operation and comparable voltage-loop aggressiveness, but they are not globally re-optimized for every metric or every SCR value. The results should therefore be read as a matched-design benchmark rather than a theoretical best-case contest.

Moreover, the benchmark assumes a voltage-source GFM interface and does not cover current-source GFM topologies, whose inherent current-limiting behavior creates a different comparison envelope [28,29].

Appendix B shows that moderate parameter perturbations shift the numerical values of the metrics but do not erase the headline benchmark trade-offs: VSM remains the strongest frequency moderator, droop remains the lightest and fastest post-fault restorer, and PSC remains the most balanced option. At the same time, the study also shows that middle positions can move under retuning, so the scorecard should not be overinterpreted as a universal ranking. The voltage-sag event is implemented as a simplified balanced sag with a common current-limit ceiling. It is sufficient for controller comparison and EMT consistency checking, but it does not replace asymmetrical-fault EMT studies, relay studies, or detailed protection validation. Finally, the benchmark does not certify grid-code compliance [30]. It provides a reproducible screening framework that now includes a switching-averaged EMT layer, but it remains a precursor to utility-specific acceptance testing.

7. Conclusions

This paper presented a reproducible weak-grid benchmark for comparing droop, VSM, and PSC grid-forming control in a battery-backed PV microgrid subjected to a load increase, a reduction in grid strength, and a current-limited voltage sag. The benchmark was designed to isolate the controller-family effect by holding the plant, disturbance sequence, measurement-lag structure, saturation law, and metric extraction rules constant. A switching-averaged EMT layer was then added around the fault window to test whether the low-order ranking remains consistent once waveform-level behavior is resolved.

This manuscript supports six concrete conclusions. First, VSM provides the best frequency moderation in the studied benchmark, but it also exhibits the slowest restoration, the tightest admissible lag envelope, and the highest implementation burden. Second, droop combines the fastest post-fault restoration, the largest retained active power during the sag, the smallest support-energy excursion, and the lowest outer-loop computational footprint. Third, PSC provides the fastest load-step restoration and the most balanced overall position across dynamic, stability-related, EMT, and implementation criteria. Fourth, the low-order benchmark remains technically credible during the deep sag because the governing equations retain their nonlinear sinusoidal form and the observed angle excursions remain moderate, with a worst-case a posteriori small-angle error below 1.1 percent. Fifth, the reduced lag tolerance of VSM under weak-grid conditions is structurally linked to the combination of lower synchronizing stiffness and the additional inertial state through which delayed power information must pass. Sixth, moderate retuning changes metric values but does not remove the main benchmark trade-off between frequency quality, restorative efficiency, and balanced performance.

The practical implication is concise. In the studied weak-grid PV–battery benchmark, VSM is the preferred family when frequency quality dominates, droop is preferred when restorative efficiency and implementation simplicity dominate, and PSC is preferred when the design objective is balanced performance. The scientific value of the paper lies in converting that qualitative design intuition into a transparent benchmark sequence: matched low-order comparison, lag-envelope analysis, averaged EMT consistency check, and application-oriented scorecard. The benchmark package is intended to serve as a reproducible first screening layer before controller-specific switching EMT, HIL, and plant-level validation are undertaken.