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Article

Discrete vs. Discretized Control in Voltage Source Inverters for UPS Systems

Department of Electronics, Electrical Engineering and Microelectronics, Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, 44-100 Gliwice, Poland
*
Author to whom correspondence should be addressed.
Energies 2025, 18(13), 3336; https://doi.org/10.3390/en18133336
Submission received: 30 April 2025 / Revised: 8 June 2025 / Accepted: 19 June 2025 / Published: 25 June 2025
(This article belongs to the Special Issue Management and Optimization for Renewable Energy and Power Systems)

Abstract

Digital control in UPS systems is currently the only reasonable way of controlling a voltage source inverter (VSI). The control frequency range is restricted to up to about 1 kHz owing to the output low-pass LC filter, which should also maintain the output voltage during one switching period for the step unload. The measurement channels in the low-pass frequency range can be modeled as delays equal to some switching periods. A reasonably high (about 50 kHz) switching frequency minimizes the delays of the measurement channels. Two control systems will be compared—the pure discrete control, in this case a one-sample-ahead preview deadbeat control (OSAP), and a discretized passivity-based control (PBC). The OSAP control is easy to realize, is very fast, and enables one to obtain a steady state in a restricted number of steps after disturbance. However, the single-input single-output deadbeat control version is useless because it depends very strongly on the parameters of the inverter. The multi-input single-output OSAP (MISO-OSAP) control is directly based on discrete state equations (we treat the output voltage, output current, and inductor current as the measured state variables) and works perfectly for the nonlinear rectifier RC load (PF = 0.7) in a system without delay. The version of this with a linear prediction of state variables by means of a full-order state Luenberger observer (MISO-OSAP-LO) will be used in systems with different delays and compared with the discretized MISO passivity-based control without prediction for relatively high switching frequency (about 50 kHz). The aim and the novelty of the paper are in enabling a choice between one of these control systems for high switching frequency VSI with delays in the measurement channels.

1. Introduction

The basic problem for traditional control design is in creating the object model and describing it with state equations. In the case of a voltage source inverter, it can be simply presented as an RLC circuit—the output LC filter model—because of the relatively low bandpass and much higher switching frequency fs. The digital PWM modulator always introduces one switching period delay, and the measurement channels are forms of low-pass filters (with a bandpass below the Nyquist frequency) that can be treated as a delay in the low bandpass of the output LC filter. A comparison between a very fast, purely discrete (a continuous version does not exist) multi-input single-output one-sample-ahead preview (MISO-OSAP) controller (deadbeat type) [1,2,3], with or without the full-order state Luenberger observer [4,5] (MISO-OSAP-LO) for state variables prediction, and a discretized MISO passivity-based controller (MISO-PBC) that is designed to be used for systems requiring supervision of their internal energy (previous research has proved the controller’s significant utility for inverters [6]), will be shown. The discrete model of an inverter, based on the solution of continuous equations that describe the inverter for switched-on and switched-off bridge transistors over one switching period, accurately describes said inverter by taking into account the type of the PWM modulator (e.g., the additional delay in the double-edge modulation caused by the influence of the previous pulse width on the current switch-off time). This model is directly used in MISO-OSAP control. The MISO-PBC control calculates the internal energy of the inverter and could, theoretically, be slower. The idea of the paper is to proceed with the comparison of these two controls. The novelty of this paper is in its proposal of a better choice for UPS systems with relatively high switching frequencies, one based on the requirements of IEC 62040-3:2021 [7]. Meanwhile, previous work has proved that state variable prediction is not necessary for MISO-PBC at this switching frequency (about 50 kHz) [8]. The rectifier RC load [7] (with power factor (PF) = 0.7, calculated according to C.I. Budeanu’s theory) was used for testing, as it is the most universal test of a control system. The pure dynamic test results (20–100–20% of the nominal resistive load) depend more on the inverter output capacitor than on the control system (Section 2).
In Section 2, experimental inverter models are described, including the inverter bridge parameters and simplified Bode plots of the measurement channels. In Section 3, a discrete model of the inverter with a three-level double-edge PWM is presented. In Section 4, a simulation of a VSI with a discrete one-sample-ahead preview controller—MISO deadbeat—with or without a prediction unit is performed. In Section 5, a VSI with a discretized version of the improved MISO passivity-based control is simulated. Section 6 presents the discussion of the simulation results. In Section 7, experimental models with OSAP and PBC controls are tested and compared. In Section 8, there is a discussion of the experimental verification results, and Section 9 contains conclusions.

2. The Tested Inverter

First, the output LC filter parameters should be calculated. We can assume that the highest amplitude of harmonics in the output PWM voltage should be below the assigned level, i.e., below 3%, with a THD below 5% [9], or below 8% according to the requirements of the IEC 62040-3:2021 standard [7] concerning UPS systems. The highest harmonic frequency is equal to or close to the switching frequency [10]. The idea of the minimization of the sum of the absolute values of the reactive powers in the filter inductor and capacitor (this sum is a kind of “cost function”), together with the restriction of the highest amplitude of harmonics, is presented in [11]. There are similar approaches for creating the “cost function” from the absolute values of powers, e.g., [12], but with different coefficients for the reactive powers. Here, the absolute value of the reactive power in the filter inductor was typically found to have a coefficient over unity [12]; this is because the authors wanted to increase the capacitor and decrease the inductor, whose value restricts the dynamics of the inverter [12]. The inverter output impedance depends mainly on the filter inductor LF for the low frequencies. The first condition for filter parameters can be described as (1), where the highest amplitude of the harmonic hmax with a frequency equal to the switching frequency fs or for fs ± fm (fm is the fundamental 50 Hz frequency) is found to be that for the PWM duty ratio, τ = 0.5.
( h m a x τ = 0.5 / h 1 ) O U T < 3 %
From (1) for the single-phase 3-level double-edge PWM, we receive the approximated condition (2)
L F C F = 1 f s 2
To calculate the specific values of the filter parameters, the cost function CostF (3), after substituting (2) into it, should be used.
C o s t F ω m ( L F I L F h 1 r m s 2 + C F V L F h 1 r m s 2 ) = ω m ( L F I L F h 1 r m s 2 + 1 L F f s 2 V O U T h 1 r m s 2 )
For ILFh1rms ≈ IOUTh1rms and fs >> fm
C o s t F L F ω m I O U T h 1 r m s 2 1 L F 2 f s 2 V O U T h 1 r m s 2
By looking for the minimum of the cost function C o s t F L F = 0 and using Equation (2), we obtain Solutions (5) and (6).
L F = 1 f s V O U T h 1 r m s I O U T h 1 r m s
C F = 1 f s 1 V O U T h 1 r m s / I O U T h 1 r m s
However, Equations (5) and (6) are calculated for the steady-state operation of the inverter. The EN 62040-3 [7] standard defines the nonlinear rectifier RC load with power factor PF = 0.7 and the dynamic linear load with step-down from 100% to 20% of the nominal load and step-up from 20% to 100% for the UPS systems below 3 kW. Let us assume a 5 A step decrease. The inverter feedback has at least a delay of one switching period of a discrete PWM modulator. The calculated width of the pulse is stored in the registers and is applied in the next period. The double-edge modulation has an additional structural delay because the time difference between the current pulse and the previous one depends on the control in the previous period. For the load current step-down, all the excessive current (assumed to be constant in one switching period) from the filter inductor (treated as the current source) flows to the output capacitor. If we assign the output overvoltage ΔvOUT = 5 V, switching frequency fs = 50 kHz (Ts = 20 μs), the step current decrease ΔiOUT = 5 A, CF = TsΔiOUTvOUT, CF = 20 μF. In all the presented simulations and measurements of the experimental models: switching frequency fs = 51,200 Hz, inductor LF = 2 mH, the coil core is made of the alloy-powder high-quality material MS-Sendust (Micrometals Anaheim, CA, USA) [13], CF = 51 μF Metallised Polypropylene capacitor WIMA (WIMA GmbH & Co. KG, Mannheim, Germany) MKP 4 (five parallel capacitors 10 μF and one 1 μF for special tests). The serial equivalent resistance of the inverter RL (the only noticeable variable parameter [14,15] for the constant switching frequency) depends on the power losses in the coil core, the dynamic and static losses on the switching transistors, and all the other serial resistances of the PCB and connectors. The bridge transistors are MOSFET IRFP360LC (Vishay Siliconix, Vishay Electronic GmbH, Selb, Germany) switches driven by IR2184 (International Rectifier, El Segundo, CA, USA) circuits. The serial drain-source on-state resistance is 200 mΩ. It always conducts two serially connected transistors, so this is 400 mΩ. It was assigned the RL = 1 Ω for serial equivalent resistance. The serial resistance of the MKP capacitor CF was neglected. The rectifier RC load is: Rs = 1 Ω, C = 430 μF, R = 100 Ω, the power factor PF ≈ 0.7 [7]. For the high-quality coil core of choke LF and MKP type CF, we can assume that LF and CF are approximately constant [15] for the constant fs = 51,200 Hz switching frequency.
There is one more condition for the maximum value of the filter inductor LFmax. The value of the filter inductor LFmax should be small enough so that, for the filter input voltage step ΔvFIN = VDC (1-Msin (ωmtRON)) at time tRON at the filter input (when the load rectifier begins conduct), the forced increase in the inductor current (controlled by feedback) enables the inverter output to follow the reference sinusoidal voltage (for the rectifier RC load) after the rectifier diode begins conducting (it was approximated ωmtRON = π/4, M is a modulation index, M ≤ 1). After analysis, we have the approximated relation (7) [16].
L F m a x < ( R L + R s ) 2 M 1 ω m
For RL = 1 Ω, serial rectifier resistance Rs = 1 Ω and M = 0.7, LFmax = 6.4 mH. The calculated maximum value is higher than used in the inverter model (LF = 2 mH). There are a lot of other approaches to appointing the output filter parameters. In [17], the authors, for a selected cutoff frequency of an output LC filter, analyze L-to-C combinations for different loads and propose a design criterion for the L-to-C filter combination. However, the final result of the required LF/CF is similar to the ratio of (5) to (6). The paper [18], 14 years later, is almost the same as [17] and presents the same results. In [19], the authors analyze the inverter output LC filter, calculating the total harmonic distortion (THD) of the output voltage. The final calculations of the filter parameters in [19] depend on the filter quality factor but give similar values of LF and CF as in this paper. The authors of [20] propose the analytical calculation of the required inductance of an LC filter in a single-phase full-bridge inverter controlled with a unipolar switching pattern based on filter inductor ripple current estimation. This is a similar approach to [10,11]. In [21] authors minimize the filter reactive power at the maximum load. In all the papers, the results of the output filter parameters calculations are more or less similar to the ones presented in this paper.
Figure 1 presents the single-phase inverter with the 3-level, double-edge PWM scheme described by Equations (8)–(11) (so-called the first PWM scheme, presented many years ago [22]).
For k = 1…(fs/fm):
S 1 :   T O N ( k ) / T s = 0.5 M sin ( 2 π k f m / f s ) + 0.5
S 2 :   N O T ( S 1 )
S 3 :   T O N ( k ) / T s = 0.5 M sin ( ( 2 π k f m / f s ) + π ) + 0.5
S 4 :   N O T ( S 3 )
As can be seen from Figure 1, the PWM frequency is twice the switching frequency. The Bode plots of the measurement channels can be measured using the method presented in [23] and used directly for this purpose in [8]. Its general idea is to measure the ratios of the excitation signal amplitude to the fundamental signal (they are summed, and the test signal is the harmonic of the fundamental signal nfm) at the output of the measurement channel VchOUT and the same ratio at the input of the measurement channel VChIN [8]. The quotient of these two ratios gives the magnitude and phase Bode plots of the measurement channel. All the voltage and current measurement channels are the same except for the input isolation. The voltage channel has an isolated amplifier ISO 124P (Texas Instruments, Dallas, TX, USA), and the current channels include LA25 NP (LEM International SA, Meyrin, Switzerland) transducers. However, it was assigned that in the 1 kHz bandpass, they have similar frequency-based characteristics, and we measured only voltage channels. The transfer function of the measured channel is (12) for n = 1 to nmax. The nmax is the number of the highest harmonic of the fundamental frequency fm, used as the excitation signal (we use nmax = 100; however, the calculated magnitude and phase are not exact for this value).
K C h ( j 2 π n f m ) = V C h O U T n f m / V C h O U T f m V C h I N n f m / V C h I N f m e x p ( j a r g n f m )
The magnitude Bode plot is (12)
K C h ( n f m ) = 20 l o g V C h O U T ( n f m ) / V C h O U T ( f m ) V C h I N ( n f m ) / V C h I N ( f m )
The phase Bode plot is (14)
arg ( K Ch n f m ) = [ a r g ( V C h O U T n f m arg V C h O U T f m [ a r g ( V C h I N n f m arg V C h I N f m
For the switching frequency fs = 51,200 Hz (fs is always a harmonic of the fundamental frequency fm = 50 Hz), there are fs/50 = 1024 samples of the sinusoidal reference per the fundamental period Tm = 20 ms. The minimum number of samples of the n-th harmonic in this period is equal to fs/(nmax50). So, for nmax = 100, there are about 10 samples per a fundamental period, which seems a sufficient value for further FFT calculations [15].
In [14,15], it was shown that the inductance of the inductor LF with core made of the alloy-powder high-quality material MS-Sendust [13] has almost a constant value for the wide magnetizing current range and its frequency (the twice switching frequency). The equivalent serial resistance RL depends on the load and switching frequency but can be approximated as equal to 1 Ω. Finally, neglecting the capacitor serial resistance, the control transfer function KCTRL can be approximately presented as a product of the measurement channel transfer function KCh, the PWM modulator transfer function KPWM, and the transfer function of the inverter KINV (15). The relative measurement of the Bode plots means that we do not measure the delay of the PWM modulator because the output fundamental waveform, treated as a reference waveform, is delayed.
K I N V ω F 0 2 s 2 + 2 ξ F ω F 0 s + ( 1 + R L / R O U T ) ω F 0 2
ω F 0 1 L F C F
ξ F 0 1 2 1 ω F 0 ( 1 C F R O U T + R L L F )
Figure 2 presents the Bode plots of two experimental inverter models. The measured delays of channels include the zero-order-hold function of the analog-to-digital converters but do not include the PWM modulator delay.
It was shown in [8] that for the high switching frequency (about 50 kHz), we can omit the prediction of the state variables in some types of controllers (e.g., PBC).

3. The Discrete Model of the Single-Phase Inverter with the 3-Level Double-Edge PWM

The controlled object should be described with the state equations where the state–space variables are x = [vOUT iLF iOUT]T, input variable u = vFIN − the envelope of vPWM (Figure 1), and output variable y = vOUT, the state–space equations (for RC = 0) are (16) and (17).
x ˙ = A x + B u ,   y = C x
A = 0 1 C F 1 C F 1 L F R L C F 0 0 0 0 ,   B = 0 1 L F 0 ,   C = 1 0 0
The state–space Equation (16) is solved in the switching period [1,24]. The obtained exponential function of TON time for the double-edge modulation depends on the PWM modulation type and is approximated using simple linearization (18).
e A T O N k / 2 I + A T O N k / 2
The linearized discrete state–space equations [11] are (19) and (20), where vCTRL is the input signal of the PWM modulator (Figure 1).
x ( k + 1 ) = A D x ( k ) + G D T O N ( k ) = A D x ( k ) + G D T s V D C v C T R L ( k )
y ( k + 1 ) = C D x ( k )
The state, input, and output matrices are (21)
A D = Φ ( T s ) = ϕ 11 ϕ 12 ϕ 13 ϕ 21 ϕ 22 ϕ 23 ϕ 31 ϕ 32 ϕ 33 , G D = g 11 g 21 g 31 , C D = C
In the presented approach, the load current is treated as an independent state variable. It is illustrated in Figure 1, where the load current is presented as the current source. So the damping factor (22) is different from (15). We lose the dependence between output voltage and the output current, but it is a widely presented approach [25,26,27,28,29,30].
ξ F = 1 2 R L C F L F ,   ω F 0 = 1 C F L F ,   E A = exp ( ξ F ω F 0 T s ) ,   E G = s q r t ( ξ F ω F 0 T s / 2 )
Coefficients of state matrix:
φ 11 = [ cos ω F 0 T s + ξ F sin ω F 0 T s ] E A ,   φ 12 = 1 ω F 0 C F sin ( ω F 0 T s ) E A
φ 13 = φ 12 + R L ( φ 11 1 ) ,
φ 21 = C F L F φ 12 ,   φ 22 = [ cos ( ω F 0 T s ) ξ F sin ( ω F 0 T s ) ] E A ,   φ 23 = 1 φ 11 ,
φ 31 = 0 ,   ϕ 32 = 0 ,   φ 33 = 1
Coefficients of input matrix:
g 11 = V D C ω F 0 sin ( ω F 0 T s / 2 ) E G ,
g 21 = V D C L F [ cos ( ω F 0 T s / 2 ) ξ F sin ( ω F 0 T s / 2 ) ] E G ,   g 31 = 0

4. The Simulation of the Inverter with the Pure Discrete One-Sample-Ahead Preview Controller—MISO Deadbeat

The deadbeat control [1,2,3,21,31,32] applies feedback of the inverter that sets all poles of the closed-loop transfer function to the origin of the z-plane. The basic deadbeat approach is for linear systems. Deadbeat control brings the output to the steady state in the smallest number of time steps. For an n-th-order linear system, it can be shown that the minimum number of steps will be n. It means that in the inverter, we can obtain the reference value of the output voltage in the k + 1 switching period. It was described by A. Kawamura [1] many years ago in 1988 as one-sample-ahead preview control (OSAP). OSAP was also presented in the newer papers [2,3]. A. Kawamura [1] showed that assuming vOUT (k + 1) = vref (k + 1) leads to a deadbeat control law. Deadbeat control law does not require setting gains of the voltage or current. It depends on the parameters of the control system, and that is why it is very sensitive to their values. SISO deadbeat control is also very sensitive to delays in the plant open-loop transfer function [33]. If the plant-inverter with the double-edge PWM [11] has the (25) KOPEN_LOOP control function, where zd delay is included, the (26) deadbeat controller GR transfer function should be used, and the (27) difference control law.
K O P E N _ L O O P = v O U T ( z 1 ) v C T R L ( z 1 ) = z d b 1 z 1 + b 2 z 2 1 + a 1 z 1 + a 2 z 2
G R = v C T R L ( z 1 ) v r e f z 1 v O U T z 1 = 1 b 1   +   b 2 ( 1 + a 1 z 1 + a 2 z 2 ) 1 1 b 1   +   b 2 ( b 1 z 1 + b 2 z 2 ) z d
v C T R L ( k ) = ( v r e f k v O U T k ) 1 b 1 + b 2 + ( v r e f k 1 v O U T k 1 ) a 1 b 1 + b 2 +   ( v O U T k 2 v r e f k 2 ) a 2 b 1 + b 2 + v C T R L ( k 1   d ) b 1 b 1 + b 2 + v C T R L ( k 2 d ) b 2 b 1 + b 2
where
a 1 = ( φ 11 + φ 22 ) ,
a 2 = φ 11 φ 22 φ 12 φ 21 ,
b 1 = T c V D C g 11 ,
b 2 = T c V D C ( φ 11 φ 22 φ 12 φ 21 ) ,
d ≥ 1—depends on the delay of the output voltage measurement channel.
The SISO deadbeat control in inverters is rather useless. However, MISO-OSAP deadbeat control with measuring output voltage, inductor current, and output current, owing to control of these values that are dependent on the filter parameters, is much more useful.
From (19) to (24), we can write Equation (28).
v O U T k + 1 = φ 11 v O U T k + φ 12 i L F k + φ 13 i O U T k + g 11 T s V D C v C T R L ( k )
If we assume v O U T k + 1 = v r e f k + 1 we receive MISO-OSAP control (29).
v C T R L k = 1 g 11 V D C T s [ v r e f k + 1 φ 11 v O U T k φ 12 i L F k φ 13 i O U T k ]
The value of VDC simplifies into Equation (29) with the value of VDC in g11 from Equation (24), so it is possible to assume VDC = 1.
The prediction of the delayed measured variables is the approach that enables the usage of the deadbeat control in inverters, e.g., based on the idea of a fractional-order Smith Predictor [34]. In [35], the combination of deadbeat PI control and the Smith method was proposed as a fast and stable current control method that can achieve deadbeat characteristics even in the presence of delays. In [36], a digital extended state observer improves the robustness of the parameter variations and the delay variation of the system with deadbeat control. In [37], the problem of the delay is solved using state observers. The full-order state Luenberger observer seems a reasonable solution for the 3-input state variables prediction in the system with delays with MISO-OSAP deadbeat controller [4,5,37]. The Luenberger observer or other similar linear observers are often used in inverters’ control systems [38,39,40,41,42]. The description of the Luenberger observer in a case when we measure all the state variables and we want to predict them is found in Equations (30) and (31). The matrix CL (30) is different from the CD (17) because now all the state variables are in the output of the Luenberger observer.
y = x ,   C L = 1 0 0 0 1 0 0 0 1
x ^ ( k + 1 ) = A D x ^ ( k ) + G D T O N ( k ) + L [ y ( k ) C L x ^ ( k ) ]
The error of the system (31) is described by Equation (32).
e k + 1 = A D L C L [ x ( k ) x ^ ( k ) ] = ( A D L C L ) e ( k )
The matrix of Luenberger observer gains for three state variables [vOUT, iLF, iOUT] is (33).
L = l v O U T 0 0 0 l i L F 0 0 0 l i O U T
The characteristic equation of the full-state Luenberger observer is (34).
det ( z 1 0 0 0 1 0 0 0 1 A D + L C L ) = 0
Equation (34) in the case of 3 state variables is equal to (35), (36).
det z φ 11 + l 1 φ 12 φ 13 φ 21 z φ 22 + l 2 φ 23 0 0 z 1 + l 3 = 0
z 1 + l 3 z φ 11 + l 1 z φ 22 + l 2 φ 12 φ 21 = 0
The roots of the characteristic equation of the Luenberger observer (41) are independent of the closed feedback-loop control system according to the “separation theorem” [43]. The observer eigenvalues should allow faster convergence to zero of the observation error than the transient process in a closed-loop system, which will happen if the roots of their characteristic Equation (31) are closer to zero on the z-plane (their absolute value is lower) than the roots of the characteristic equation of the closed-loop system without prediction. This is not possible in the case of the deadbeat control when all the poles of the closed-loop system are zeroes. The different versions of the linear observers, such as the Luenberger observer, have different algorithms for calculating the value of the observer characteristic equation roots vs. the closed-loop system characteristic equation roots. In [43], the Luenberger observer was designed with its dynamics three times faster than the fastest pole of the plant. In the case of deadbeat control, where closed-loop poles are at the origin of the z-plane, there is no simple algorithm for setting the Luenberger gains inside the allowable range. If we assign [43] the pole position of the state observer [44], we can call the acker() function in MATLAB R2021b to obtain the feedback gain matrix of the state observer. In [45] there is assigned for the continuous system the proportionality coefficient between eigenvalues of the object λm and observer λe (λe = k λm, k > 1) and finally, the observer gains are calculated. In [46], it is written that the observer gain matrix should be chosen so that all eigenvalues of the continuous version of (32) have real negative parts. It is the same approach as keeping the roots of the characteristic equation of the discrete state observer inside the unit circle in the z-plane. The positive values of observer gains are assigned. The values of lvOUT, liLF, and liOUT are set experimentally so that the system (31) is stable and sufficiently fast. The different sets of observer gains give different results (the output voltage distortions) for the different delays (Table 1). All three roots zi of (35), (36) should be inside the unit circle in the z-plane (37).
z i < 1
So
z 1 = 1 l i O U T
We should solve the following Equation (39) to find z2 and z3.
z 2 + z ( l v O U T + l i L F φ 11 φ 22 ) + ( l v O U T l i L F φ 22 l v O U T φ 11 l i L F + φ 11 φ 22 φ 12 φ 21 ) = 0
The roots z2 and z3 are calculated as (40)
z 2,3 = [ ± [ ( l v O U T l i L F ) + ( φ 22 φ 11 ) ] 2 + 4 φ 12 φ 21 ( l v O U T + l i L F φ 11 φ 22 ) ] / 2
Figure 3a presents the area in which maximum (|z2 (lvOUT, liLF)||z3 (lvOUT, liLF)|) < 1 (below green plane) for fs = 51.2 kHz, LF = 2 mH, CF = 51 μF. The final approximated restriction is for lvOUT, liLF, liOUT > 0: lvOUT < 2, liLF < 2, liOUT < 2. However, the position of zi varies in these allowable ranges of li values. It is shown in Figure 3b (it is a cross-section of Figure 3a). The lowest value of |z1|, |z2|, and |z3|, so the fastest Luenberger observer is for lvOUT ≈ 1, liLF ≈ 1, liOUT ≈ 1. Finally, the gains of the Luenberger observer should be adjusted in the allowable area (Figure 3b) for the particular inverter design.
Figure 4 presents the MATLAB/Simulink scheme of the VSI with only ZOH (analog-to-digital converter ADC) and PWM modulator delays.
The voltage and current waveforms and harmonics for the VSI without feedback are shown in Figure 5. The modulation index M = 0.7 was assigned. All the inverter and the rectifier RC load parameters are as previously described.
Implementing MISO-OSAP-deadbeat control seriously reduces the THD of the output voltage, as shown in Figure 6. However, only ADC (simulated by ZOH module) and PWM modulator delays are present. The modulation index M = 0.7 was assigned.
It can be seen that the MISO-OSAP controller is very fast and efficiently reduces output voltage distortions. However, for M = 0.7, the PWM modulator is saturated (the control voltage exceeds the upper input modulator limits equal to ±1 in simulation). So the simulation was repeated for the highest modulation index M = 0.2 for which the control voltage does not exceed the input limits of the PWM modulator (±1). The low modulation index M = 0.2 will never be used in practice, but Figure 7 presents the top capabilities of the MISO-OSAP control in the system with low delays. In all the next presented simulations, the M = 0.7, even if it leads to a small saturation of the modulator. In the experimental VSI for the STM32V407G microprocessor control (84 MHz in the input of the PWM modulator) and fs = 51,200 Hz, the PWM modulator limits are ±820 units (it is adequate to ±1 in simulation).
The additional delays in the measurement channels cause oscillations of the output voltage for the MISO-OSAP control. The proposed solution is the prediction of the measured and delayed state variables. The previously presented full-order state Luenberger observer (31) will be implemented in the control loop. Figure 8 presents the MATLAB/Simulink scheme of the VSI with delays (here, there are delays of the ZOH-ADC units, PWM modulator, and additional up to 5Ts in each measurement channel). In this particular case of the VSI parameters, the Luenberger observer gains were experimentally appointed (in the allowable ranges) to obtain the lowest distortions for the reasonable delay (5Ts) (l1 = 0.15 or 0.25, l2 = 0.01, l3 = 1). Figure 9 presents a simulation of the output voltage, output current, and control voltage waveforms for the VSI with the MISO-OSAP-LO control for the rectifier RC load for M = 0.7 and an additional delay of 5Ts. For additional delays over 7Ts, the distortions of the output voltage increase (Table 1). Two different sets of observer gains are assigned for different delays (Table 1).

5. The Simulation of the Inverter with the Discretized Version of MISO Passivity-Based Control

This section aims to compare the pure discrete MISO-OSAP described in Section 4 with the efficient discretized MISO control. The passivity-based control (PBC) [6,25,47,48,49,50,51,52,53], which considers the energy stored in the system (Hamiltonian function (41), similar to Lyapunov function [47]), was chosen. The idea of PBC is that the energy stored in the VSI system, in the filter inductor, and the filter capacitor (41), should be lower than the energy delivered to the system.
H ( x ) = 1 2 ( L F i L F 2 + C F v O U T 2 )
The PBC is based on “injecting” the virtual “resistance” Ri (Ri is the current gain) into the system. In the improved PBC [25,47], the output voltage error is directly implemented in the control law (the voltage gain is Kv). The discretized control laws of PBC, according to Figure 1, where we consider predicted state variables, are Equations (42) and (43) [8].
v C T R L ( k ) = R i i L F ( k ) + ( R i + R L ) i L F r e f ( k ) + L F i L F r e f ( k ) i L F r e f ( k 1 ) T s + v R E F ( k )
i L F r e f k = K v [ v R E F ( k ) v O U T ( k ) ] + C F v R E F ( k ) v R E F ( k 1 ) T s + i O U T ( k )
For RL + Ri > 0 (RL is always > 0 and we assign that Ri > 0) and Kv > 0, the roots of the characteristic equation of the closed-loop system with PBC are always in the left half s-plane, the system is stable [6]. The 3-level modulation PWM modulator has a limited output voltage increase speed: VDC/Ts. The increase of the control voltage from (42) cannot be faster than (44) [54].
d v C T R L ( k T s ) d t V D C T s
For the worst case of the inverter load RLOAD = ∞, for the system without delays, Equation (44) using (42) and (43) can be presented as (45).
K v [ L F + ( R i + R L ) T s ] 1 L F C F + R i L F < f s
The product RiKv is restricted depending on the switching frequency fs. The convergence of error is faster for the higher values of Kv and Ri gains. The high values of the gains cause saturation of the PWM modulator, leading to the output voltage oscillations. The PBC control results in a lower THD of the output voltage for the higher switching frequency, allowing for higher current and voltage gains. Figure 10 presents the admissible operating areas of PBC as a function of gains Ri, Kv for fs = 51,200 Hz and three values of RL (0.5, 1.0, and 1.5 Ω). It can be seen that the serial equivalent resistance does not noticeably influence the admissible gains area. The presented relation (44) is approximated, and the final fine adjustments should be done experimentally. Figure 11 presents the MATLAB/Simulink scheme of VSI with MISO-PBC control. Figure 12 shows the output voltage, output current, and control voltage waveforms for the VSI with the MISO-PBC control without additional delay in the measurement channels. The output voltage harmonics for the experimentally appointed gains are Kv = 0.3 and Ri = 20. Figure 13 shows the same waveforms but for the additional delay 5Ts in the measurement channels for the lower gains Kv = 0.2 and Ri = 10, because for Kv = 0.3 and Ri = 20, there were oscillations of the output voltage. The results of the simulations for the different additional delays in the measurement channels are presented in Table 1.

6. The Discussion of the Simulation Results

The delay in the measurement channel is a sum of the ADC delay (it is modeled as a ZOH unit) and the additional delay in the channel presented in Figure 2. The PWM modulator implements the delay equal to Ts. Table 1 shows that for the low delay in the measurement channel, the results of the control with MISO-OSAP with Luenberger observer (MISO-OSAP-LO) and MISO-PBC control are similar. It was assumed that for THD up to about 1.5%, the results are only negligibly different. PBC does not need any variable prediction for the relatively high switching frequency fs = 51,200 Hz. In both cases, there are admissible ranges of the gains of the LO and the PBC. These LO gains should be adjusted and should be lower for the higher delay. Such a limit, in the case of MISO-OSAP-LO and MISO-PBC, is the additional delay of 6Ts, together with the analog-to-digital conversion of about 7Ts (Table 1). MISO-OSAP without LO in case of lack of the additional delay is so fast that to obtain its best properties, we should use a very low, unimportant in practice modulation index M = 0.2 (Figure 7, Table 1). Looking at the simulation results in Table 1, we would rather choose MISO-PBC control. The parameter of VSI that can be changed is the equivalent serial resistance RLF. We design the controller for RL = 1 Ω. For the delay 5Ts, the MISO-OSAP-LO designed (l1 = 0.25, l2 = 0.01, l3 = 1) for RL = 1 Ω, while RL = 0.5/1/1.5 Ω has THD of the output voltage: 1.32%/0.83%/0.68%. So, the MISO-OSAP-LO is practically robust to the variable equivalent resistance. In both cases, the gains of the Luenberger observer or the PBC gains should be adjusted. So, the advantage of MISO-OSAP control, of not requiring any adjustment, disappears.

7. The Test of the Experimental Models of Inverters with OSAP and PBC Controls

The easiest way to experimentally verify the previous simulations is to use the real-time interface (MicroLabBox—RTI 1202) that has an FPGA programmed with the compiled simulation scheme from MATLAB/Simulink 2021b with dSpace Release 2021-B libraries. In simulation, scaling all the measured state variables was very simple—we just divided all the measured values by the DC voltage value because the reference voltage was a sinusoidal waveform with a unity amplitude multiplied by the modulation index M. In the case of RTI, we should set the gain factor in the voltage measurement channel for the open loop, the nominal output voltage, and a nominal load of 50 Ω to obtain the dSpace reference voltage range (amplitude ±0.5M, in Figure 4 equal to ±0.4 for M = 0.8). We set all the voltage and current gains in the dSpace ControlDesk 7.5 (Figure 14) for the assigned input DC voltage VDC and the modulation index M. The gain in the output current measuring channel should be set to the reference range, and in the controller input divided by the referenced load resistance—50 (Figure 15 and Figure 16). A similar procedure should be performed with the inductor current measurement channel. In the case of the scaling of the inductor current, it is a sum of the output current and the filter capacitor current. So, for the fundamental frequency of 50 Hz, the load resistance of 50 Ω, and the output filter capacitor of 51 μF, we should divide the inductor current measurement by 27.76.
The MATLAB/Simulink/dSpace simulation schema is located inside the “function block”. For the MISO control with all the space variables in input, the three independent ADCs triggered by PWM events are used. It is organized in the same architecture as in the microprocessor-based control (the PWM calls all the control functions, and in this way, the input frequency of the PWM sets the switching frequency of the whole function block). The interrupt of channel 1 of the first ADC, when data are ready, calls the function block. The MISO controllers, OSAP or PBC, directly calculate control laws. The modulation scheme is from Figure 1. RTI 1202 measures the state variables (output voltage, output current, and inductor current) and drives the H-bridge of the inverter model (Figure 1). The gains Ri and Kv for the PBC controller and the Luenberger observer l1, l2, and l3 gains were adjusted in the admissible ranges to obtain the lowest THD of the output voltage without oscillations. Figure 15 and Figure 16 present the schemas of the MISO-OSAP-LO control for RTI 1202. The idea of calling the function block is the same for all types of inverter control. Figure 17 presents the interior of the function block in the case of MISO-PBC control. The experimental model of VSI No. 1 with Bode plots from Figure 2 was used because it has higher delays, and owing to this is more difficult to control. The whole delay of the measurement channels is about 7Ts, including analog-to-digital conversion.
Figure 18a presents the output voltage, output current, and the inductor current waveforms measured by the MicroLabBox, presented by the dSpace ControlDesk 7.5 view. The stored data from the Rigol DS 4014 and the THD calculated in MATLAB 2021b are presented in Figure 18b, and the output voltage harmonic spectrum is presented in Figure 18c. The adequate waveforms for the MIS-OSAP-LO control are presented in Figure 19a–c, and for MISO-PBC control in Figure 20a–c. The parameters for the Luenberger observer in MISO-OSAP-LO control lvOUT = 0.1, liLF = 0.01, liOUT = 1, were set experimentally to obtain the lowest THD. The gains Kv = 1, Ri = 30 were set in the same way (minimum THD) for the MISO-PBC control. The MISO-OSAP control without LO resulted in the oscillations of the output voltage and is not presented. The gains of amplifiers in the MicroLabBox function block were 4 for vOUT, 2.5 for iOUT, and 6 for iLF to obtain the adjustment from Figure 14. The results of the control are presented in Table 2. Figure 21 shows the laboratory station for experimental verification of simulations.

8. The Discussion of the Experimental Results

Both types of control were tested for the standard nonlinear load (PF = 0.7). The results of the laboratory VSI No. 1 control (with the whole delay 7Ts, which is adequate to the additional delay 6Ts in simulations, where we have zero-order-hold units simulating analog-to-digital converters in the measuring channels), discrete MISO-OSAP-LO and discretized MISO-PBC types, presented in Table 2, are similar to the simulation results from Table 1. The MISO-OSAP without LO state variables prediction is useless in real systems with delays (it would be perfect for systems without delays) because delays result in oscillations of the output voltage. The idea of PBC control, of the stored energy consideration (Hamiltonian function), makes this control more robust to the low delays in the high switching frequency system. The advantage of the MISO-OSAP that we do not need to set its parameters vanishes when using prediction (we have to adjust Luenberger gains for all the measured state variables). The success of the experiment depends on the proper setting of the gains in the measurement channels. In simulations, setting gains was easy; in the real system, it is always experimentally set, and finally, the gains of the controllers directly depend on the adjusted measurement channels’ gains (Figure 14). We can notice that it was possible to adjust higher gains of MISO-PBC in the experimental system than in simulations (Kv = 1, Ri = 30 vs. Kv = 0.2, Ri = 10); however, all the gains were in the admissible area (Figure 10).

9. Conclusions

The paper’s goal was to enable the choice between very fast, pure discrete control, MISO-OSAP deadbeat type, with the discretized MISO-PBC control based on the stored energy calculation, for the relatively high switching frequency. It was shown that even for the high switching frequency, MISO-OSAP requires state variable prediction (e.g., Luenberger observer) in the real system with delays. The results of control MISO-OSAP-LO and MISO-PBC are similar, with a slightly lower THD (0.87% vs 2.2%) of the VSI output voltage for MISO-PBC. The reason could be the relatively simple prediction, but in the previous work [55] it was shown that using a more sophisticated Kalman filter does not result in lower distortions of the output voltage. The first advantage of the deadbeat control, that we do not need to calculate any gains of the controller, vanishes in the case of implementing prediction. So, the conclusion is that MISO-PBC is a more useful control type of VSI.

Author Contributions

Conceptualization, Z.R.; methodology, Z.R.; software, Z.R.; validation, Z.R., W.O. and G.W.; formal analysis, Z.R.; investigation, Z.R., W.O. and G.W.; resources, Z.R., W.O. and G.W.; data curation, Z.R., W.O. and G.W.; writing—original draft preparation, Z.R.; writing—review and editing, Z.R., W.O. and G.W.; visualization, Z.R.; supervision, Z.R.; project administration, Z.R.; funding acquisition, Z.R., W.O. and G.W. All authors have read and agreed to the published version of the manuscript.

Funding

This research was partially supported by the Polish Ministry of Education and Science funding for statutory activities (BK-246/RAu-11/2025).

Data Availability Statement

All data files with results of simulations and measurements, the software for VSI simulation, and control of the experimental inverter are in the private possession of the author. The data presented in this study are available on request from the corresponding author due to private concerns.

Acknowledgments

The author would like to thank Andrzej Tutaj of Technika Obliczeniowa sp. z o. o. (www.tobl.com.pl) (accessed on 18 June 2025) for his support in the utilization of MicroLabBox and Krzysztof Bernacki, Department of Electronics, Electrical Engineering and Microelectronics, Faculty of Automatic Control, Electronics and Computer Science, Silesian University of Technology, Gliwice, Poland, for his previous cooperation in inverter control research and his participation in the power electronics laboratory creation.

Conflicts of Interest

The author declares no conflicts of interest.

Abbreviations

The following abbreviations are used in this manuscript:
VSIVoltage Source Inverter
THDTotal harmonic distortion
MISOMulti-Input Single-Output
SISOSingle-Input Single-Output
LOLuenberger observer
OSAPOne-Sample-Ahead Preview
PBCPassivity-Based Control
RTIReal-Time Interface
TsSwitching period
fsSwitching frequency
fmFundamental frequency (50 Hz)

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Figure 1. Single-phase 3-level H-bridge inverter with the used modulation scheme.
Figure 1. Single-phase 3-level H-bridge inverter with the used modulation scheme.
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Figure 2. The Bode plots of the output voltage measuring channels of two experimental inverter models, (a) Bode magnitude plot, (b) Bode phase plot.
Figure 2. The Bode plots of the output voltage measuring channels of two experimental inverter models, (a) Bode magnitude plot, (b) Bode phase plot.
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Figure 3. (a) The allowable area of l1 = lvOUT and l2 = liLF values below the green plane for fs =51,200 Hz, LF = 2 mH, CF = 51 μF; (b) the cross-sections of Figure 3a for lvOUT ≈ 0.15 and lvOUT ≈ 1.
Figure 3. (a) The allowable area of l1 = lvOUT and l2 = liLF values below the green plane for fs =51,200 Hz, LF = 2 mH, CF = 51 μF; (b) the cross-sections of Figure 3a for lvOUT ≈ 0.15 and lvOUT ≈ 1.
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Figure 4. The VSI without additional delays in the measurement channels (except ADC and PWM) and MISO-OSAP-deadbeat control.
Figure 4. The VSI without additional delays in the measurement channels (except ADC and PWM) and MISO-OSAP-deadbeat control.
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Figure 5. (a) Simulation of the output voltage, output current and control voltage (equal to reference voltage) waveforms for VSI without the feedback; (b) the harmonics of the output voltage for the VSI without feedback for the rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 40 μF, R = 100 Ω, M = 0.7, PF ≈ 0.7).
Figure 5. (a) Simulation of the output voltage, output current and control voltage (equal to reference voltage) waveforms for VSI without the feedback; (b) the harmonics of the output voltage for the VSI without feedback for the rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 40 μF, R = 100 Ω, M = 0.7, PF ≈ 0.7).
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Figure 6. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP control (without the additional delay in the measurement channels); (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.7, PF ≈ 0.7).
Figure 6. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP control (without the additional delay in the measurement channels); (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.7, PF ≈ 0.7).
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Figure 7. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP control (without the additional delay in the measurement channels); (b) the harmonics of the output voltage for the rectifier RC load for M = 0.2 when PWM modulator is not saturated (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7).
Figure 7. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP control (without the additional delay in the measurement channels); (b) the harmonics of the output voltage for the rectifier RC load for M = 0.2 when PWM modulator is not saturated (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7).
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Figure 8. The VSI with the exemplary additional delays 5Ts in the measurement channels (with basic ADC and PWM modulator delays) and MISO-OSAP deadbeat control with full-order state Luenberger observer (MISO-OSAP-LO).
Figure 8. The VSI with the exemplary additional delays 5Ts in the measurement channels (with basic ADC and PWM modulator delays) and MISO-OSAP deadbeat control with full-order state Luenberger observer (MISO-OSAP-LO).
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Figure 9. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP-LO control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 for additional delay 5Ts (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, l1 = 0.25, l2 = 0.01, l3 = 1).
Figure 9. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-OSAP-LO control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 for additional delay 5Ts (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, l1 = 0.25, l2 = 0.01, l3 = 1).
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Figure 10. The operating areas of PBC as a function of gains Ri, Kv for fs = 51.2 kHz and three values of RL (0.5, 1.0, and 1.5 Ω).
Figure 10. The operating areas of PBC as a function of gains Ri, Kv for fs = 51.2 kHz and three values of RL (0.5, 1.0, and 1.5 Ω).
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Figure 11. Matlab/Simulink scheme of VSI with the MISO-PBC control modeled with exemplary delays.
Figure 11. Matlab/Simulink scheme of VSI with the MISO-PBC control modeled with exemplary delays.
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Figure 12. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-PBC control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 without additional delay (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, Kv = 0.3, Ri = 20).
Figure 12. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-PBC control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 without additional delay (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, Kv = 0.3, Ri = 20).
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Figure 13. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-PBC control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 with additional delay 5Ts (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, Kv = 0.2, Ri = 10).
Figure 13. (a) Simulation of the output voltage, output current and control voltage waveforms for VSI with the MISO-PBC control; (b) the harmonics of the output voltage for the rectifier RC load for M = 0.7 with additional delay 5Ts (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω Rs = 1 Ω, C = 430 μF, R = 100 Ω, M = 0.2, PF ≈ 0.7, Kv = 0.2, Ri = 10).
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Figure 14. Adjustment of voltage and current gains in dSpace ControlDesk 7.5 for VREF amplitude ±0.4 (output voltage: vOUT, output current: iOUT, inductor current: iL).
Figure 14. Adjustment of voltage and current gains in dSpace ControlDesk 7.5 for VREF amplitude ±0.4 (output voltage: vOUT, output current: iOUT, inductor current: iL).
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Figure 15. The idea of the function block called by the ADC Channel 1 interrupt (data ready for measuring the output voltage).
Figure 15. The idea of the function block called by the ADC Channel 1 interrupt (data ready for measuring the output voltage).
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Figure 16. The interior of the function block, when measuring all the state variables and MISO-OSAP-LO controls the output voltage.
Figure 16. The interior of the function block, when measuring all the state variables and MISO-OSAP-LO controls the output voltage.
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Figure 17. The interior of the function block with measuring all the state variables and MISO-PCB controlling the output voltage.
Figure 17. The interior of the function block with measuring all the state variables and MISO-PCB controlling the output voltage.
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Figure 18. Measured output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from the digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) without feedback for the standard rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, PF ≈ 0.7).
Figure 18. Measured output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from the digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) without feedback for the standard rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, PF ≈ 0.7).
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Figure 19. Measured output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) for the MISO-OSAP-LO control (lvOUT = 0.1, liLF = 0.01, liOUT = 1) for the standard rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω).
Figure 19. Measured output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) for the MISO-OSAP-LO control (lvOUT = 0.1, liLF = 0.01, liOUT = 1) for the standard rectifier RC load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω).
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Figure 20. Output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) for the MISO-PBC control (Kv = 1, Ri = 30) for the standard rectifier load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, PF ≈ 0.7).
Figure 20. Output voltage and current waveforms: (a)—dSpace ControlDesk 7.5 view, (b)—data from digital oscilloscope, and (c) calculated harmonics of the output voltage of the VSI No. 1 (Figure 2) for the MISO-PBC control (Kv = 1, Ri = 30) for the standard rectifier load (fs = 51,200 Hz, LF = 2 mH, CF = 51 μF, RL = 1 Ω, Rs = 1 Ω, C = 430 μF, R = 100 Ω, PF ≈ 0.7).
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Figure 21. Laboratory station.
Figure 21. Laboratory station.
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Table 1. Output voltage distortions in simulations of the MISO-OSAP control without and with Luenberger observer and MISO-PBC control, for the rectifier RC load (PF ≈ 0.7) and different additional delay d.
Table 1. Output voltage distortions in simulations of the MISO-OSAP control without and with Luenberger observer and MISO-PBC control, for the rectifier RC load (PF ≈ 0.7) and different additional delay d.
Controller TypeTHD [%]
d = 0
THD [%]
d = Ts
THD [%]
d = 2Ts
THD [%]
d = 3Ts
THD [%]
d = 4Ts
THD [%]
d = 5Ts
THD [%]
d = 6Ts
THD [%]
d = 7Ts
MISO-OSAP
(M = 0.2)
0.2656Osc.Osc.Osc.Osc.Osc.Osc.Osc.
MISO-OSAP
(M= 0.7)
0.5782Osc.Osc.Osc.Osc.Osc.Osc.Osc.
MISO-OSAP-LO
(M = 0.7, l1 = 0.25,
l2 = 0.01, l3 = 1)
0.24150.34780.47120.57231.0560.83016.85Osc.
MISO-OSAP-LO
(M = 0.7, l1 = 0.15,
l2 = 0.01, l3 = 1)
0.37640.41920.63521.1021.0061.2071.4401.830
MISO-PBC
(M = 0.7, Kv = 0.3,
Ri = 20)
0.17730.2010.2760.34457.827Osc.Osc.Osc.
MISO-PBC
(M = 0.7, Kv = 0.2,
Ri = 10)
0.21240.3150.4390.59050.73620.90221.292Osc.
Table 2. Output voltage distortions of the experimental VSI No. 1 without feedback, with the MISO-OSAP-LO control and with MISO-PBC control for the rectifier RC load (PF ≈ 0.7).
Table 2. Output voltage distortions of the experimental VSI No. 1 without feedback, with the MISO-OSAP-LO control and with MISO-PBC control for the rectifier RC load (PF ≈ 0.7).
Controller TypeParameters of ControllerTHD [%]
No feedback loop-7.9%
MISO-OSAP-LOM = 0.8, lvOUT = 0.1, liLF = 0.01, liOUT = 12.2%
MISO-PBCM = 0.8, Kv = 1, Ri = 300.87%
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Rymarski, Z.; Oliwa, W.; Wieczorek, G. Discrete vs. Discretized Control in Voltage Source Inverters for UPS Systems. Energies 2025, 18, 3336. https://doi.org/10.3390/en18133336

AMA Style

Rymarski Z, Oliwa W, Wieczorek G. Discrete vs. Discretized Control in Voltage Source Inverters for UPS Systems. Energies. 2025; 18(13):3336. https://doi.org/10.3390/en18133336

Chicago/Turabian Style

Rymarski, Zbigniew, Wojciech Oliwa, and Grzegorz Wieczorek. 2025. "Discrete vs. Discretized Control in Voltage Source Inverters for UPS Systems" Energies 18, no. 13: 3336. https://doi.org/10.3390/en18133336

APA Style

Rymarski, Z., Oliwa, W., & Wieczorek, G. (2025). Discrete vs. Discretized Control in Voltage Source Inverters for UPS Systems. Energies, 18(13), 3336. https://doi.org/10.3390/en18133336

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