Next Article in Journal
Profit Extension of a Wind-Integrated Competitive Power System by Vehicle-to-Grid Integration and UPFC Placement
Previous Article in Journal
Applications of Machine Learning in Subsurface Reservoir Simulation—A Review—Part II
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Research on the Modulation and Control Strategy for a Novel Single-Phase Current Source Inverter

1
School of Vehicle Engineering, Chongqing University of Technology, Chongqing 400054, China
2
School of Rail Transit and Aviation Service, Chongqing Industry Polytechnic College, Chongqing 401120, China
3
State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing 400044, China
*
Author to whom correspondence should be addressed.
Energies 2023, 16(18), 6729; https://doi.org/10.3390/en16186729
Submission received: 3 September 2023 / Revised: 17 September 2023 / Accepted: 19 September 2023 / Published: 20 September 2023
(This article belongs to the Topic Designs and Drive Control of Electromechanical Machines)

Abstract

:
Compared to the voltage source inverter, the current source inverter (CSI) can boost voltage and improve filtering performance. However, the DC side of CSI is not a real current source, and the DC input current comprises a DC power supply and an inductor. In the switching process, the DC-link inductor is charged or discharged and is in an uncontrollable state. This paper proposes a novel CSI topology containing five switching tubes and a modulation strategy based on the hysteresis control strategy of the DC-link current. Due to the conduction and switching loss being positive to the DC-link current, the calculation method for the least reference value of the DC-link current is derived to meet power requirements. By constructing a virtual axis, we then present the control strategy of the output voltage in a two-phase rotating reference frame. Finally, we carry out the simulation and experiment are to validate the proposed topology, modulation, and control strategy.

1. Introduction

Inverters can be categorized as voltage source inverters (VSI) [1] and current source inverters (CSI) [2] according to the characteristics of input power supplies. Some unique advantages of CSIs have been discovered [3], such as their boost capacity, inherent short-circuit protection capacity, and AC filtering structure. CSI, therefore, has potential applications [4] in the solar photovoltaic industry, wind energy power generation, motor drive systems, and HVDC transmission systems.
In recent years, various control and modulation strategies for CSI have been proposed [5], such as decoupling methods, low common voltage modulation, and digital vector control strategy. However, the DC-link current is considered a constant value in the above studies in which the charging or discharging process of the DC-link inductor has been ignored, leading to the DC-link current being discontinuous or continuously increasing.
Unlike VSI, the DC-link current of CSI is formed by the DC input voltage DC-link inductor, and constant DC-link current output is a necessary condition for high performance operation of CSI [6]. In [7,8,9,10,11], several novel CSI topologies are proposed to achieve control of the DC-link current. In [7], a three-phase current source rectifier (CSR) is introduced to adjust the DC-link current, but this topology is very complex and only suitable for AC-DC-AC applications. A buck converter is added to the DC side to regulate the DC-link current in [8]. In [6], the buck converter is replaced with a bi-directional converter that can control the current, and the buck operation can also be realized. However, the switching and conduction losses increase as the converter is introduced. In [9], a buck-boost CSI is proposed, which has the advantages of a simple structure and large voltage output range, but the control strategy is difficult to implement. The current-fed quasi-Z-source inverter is proposed in [10]. However, with the addition of many passive components, both efficiency and power density are greatly reduced.
In [11], an additional switching tube and diode are connected in parallel with the DC-side inductor of the three-phase CSI. The DC-side inductor can self-continuate when the switch is turned on. During the zero vector period, the continuous current mode is used to replace the traditional magnetizing mode, which can prevent the increase of the DC-link current. On this basis, a novel single-phase five-switch CSI topology is proposed in this paper. The modulation and control strategies are studied to obtain the constant DC-link current and high-quality AC voltage output. Finally, the simulation and experimental verification are carried out.

2. Topology and Operating Modes of the Proposed Single-Phase CSI

2.1. Analysis of the Proposed Single-Phase CSI’s Operating Modes

The topology of the proposed single-phase CSI is shown in Figure 1. The DC side is composed of a DC voltage source and DC-link inductance Ldc. The inverter part is composed of switching tubes (S1, S2, S3, S4) and diodes (D1, D2, D3, D4). The AC side contains the filter capacitor C and the resistive load R. The switching tube S0 and diode D0 are parallel with Ldc.
There are four operating modes of the proposed single-phase CSI. The corresponding switching states are shown in Table 1.
(1) Magnetizing mode: S1 and S2 are turned on, and the equivalent circuit under magnetizing mode is shown in Figure 2a. At this moment, io is equal to 0 A, the udc is charging to Ldc, and C provides energy for the load separately.
(2) Energy-supplying mode I: S1 and S4 are turned on, and the equivalent circuit under this operating mode is shown in Figure 2b. At this moment, io is equal to idc, and the udc and Ldc provide energy to the AC load together.
(3) Energy-supplying mode II: S2 and S3 are turned on, and the equivalent circuit under this operating mode is shown in Figure 2c. Different from energy-supplying mode I, the polarity of the output current is negative; io is equal to −idc.
(4) Freewheeling model: Only S0 is turned on, and the equivalent circuit under the freewheeling model is shown in Figure 2d. The idc freewheels through S0, and C provides energy for the load separately.
Two switching functions (p and q) are defined and shown in Table 1. The p is used to indicate whether the CSI is operating in energy-supplying mode, and the math relationship between idc and io can be expressed as
i o = i dc p
The state equation of uo follows:
C d u o d t = p i dc u o R
q is used to indicate whether the CSI is operating in magnetizing mode. The state equation of io follows:
L dc d i dc d t = q u dc p u o
Since the conduction current of all switching tubes is idc, the current stresses of all switching tubes are equal to the DC-link current. The voltage stresses can be derived according to Figure 2, and the voltage stresses of all switching tubes under different operating modes are summarized in Table 2.

2.2. Comparison of Different CSI Topologies

The recent literature presents many CSI structures comprising distinct tradeoffs among different topologies, as shown in Figure 3. According to [12,13], a cost function (CF) is established in (4) to carry out a fair comparison of different CSI topologies:
C F = N V ( N US + 2 N BS + N D + N C + N drv + N T ) / N l
where NV is the number of DC voltages, NUS is the number of unidirectional switches, NBS is the number of bidirectional switches, ND is the number of diodes, NC is the number of capacitors, Ndrv is the number of individual drivers, NT is the number of transformers, and Nl is the number of output current levels.
The comparison result is presented in Table 3. Although the quasi-Z source network receives the lowest CF, it contains numerous passive components, and its control system is too complex. The proposed single-phase CSI and the buck converter have the same CF. However, the buck converter contains more switches than the proposed single-phase CSI. The bidirectional DC chopper’s CF is slightly higher than the proposed one because of the additional two diodes and switching tubes. The current source rectifier rates the worst CF because it includes too many components.

3. Modulation Strategy Based on DC-Link Current Control

Unlike VSI, switching signals cannot be directly generated by comparing modulated signals with carrier waves [14]. In [15], a logic conversion circuit is adopted to convert the switching signals, which will delay them. In this section, a novel modulation strategy is presented which can be implemented by the DSP without a logic conversion circuit. Three logic signals (p1, p2, and p3) are set, where p1 represents the comparison result between the modulation wave and carrier wave, as shown in Figure 4, and where d is the duty cycle and is defined as
d = | i o | i dc
p1 = 1 represents the active vector period, and the CSI operates at energy-supplying mode I or II, which is determined by the polarity of io. p2 represents the polarity of io. If io > 0, p2 = 1; otherwise, p2 = 0.
p1 = 0 represents the zero vector period, and the CSI operates on either the magnetizing mode or freewheeling model, which is determined by idc. If idc > the reference value i dc * , the freewheeling model will be selected to prevent idc from increasing in the zero vector period. Otherwise, the magnetizing mode will be implemented to charge Ldc in the zero vector period. p3 is defined to represent the math relationship between idc and i dc * . If idc > i dc * , p3 = 1; else, p3 = 0. The changing process of idc and p3 is described in Figure 5. idc can be adjusted according to p3. This approach belongs to a hysteresis control method [16].
Based on the above settings and analysis, the production logic of the five switching signals is shown in Figure 6. The specific logic expression for each switching is described as follows:
p S 1 = p ¯ 1 & p ¯ 3 | p 2 p S 2 = p ¯ 1 & p ¯ 3 | p ¯ 2 p S 3 = p 1 & p ¯ 2 p S 4 = p 1 & p 2 p S 0 = p ¯ 2 & p 3
where pS1, pS2, pS3, pS4, and pS5 represent the driving logic of switch S1, S2, S3, S4, and S5, respectively.

4. Calculation for the Optimal Reference of DC-Link Current

In Section 3, a DC-link current hysteresis control is introduced into the modulation scheme. However, the reference of the DC-link current must be determined for the following reasons [17]. If i dc * is set too small, the DC-link current is unable to provide sufficient power to the AC load. If i dc * is set too great, the conduction loss, switching loss, and harmonic distortion will increase. Thus, the DC-link current should be reduced to satisfy the current requirements. The calculation method for the optimal reference of the DC-link current is derived in this section.
It is assumed that uo remains in a constant state in a switching period. Under energy-supplying mode, the reduction ∆idc_down of idc can be expressed as follows:
Δ i dc _ down = T s L dc d ( t ) u o ( t ) u dc
The increment of ∆idc_up under magnetizing mode can be expressed as
Δ i dc _ up = u dc T s L dc 1 d ( t )
According to (7) and (8), the total reduction ∆idc of idc in a switching period can be expressed as
Δ i dc = Δ i dc _ down Δ i dc _ up = T s L dc u o ( t ) d ( t ) u dc
By substituting (5) with (9), ∆idc can be rewritten as
Δ i dc = T s L dc u o ( t ) i o ( t ) i dc ( t ) u dc
Ignoring the harmonic component and initial phase, uo is expressed as
u o ( t ) = U sin ω t
where U represents the fundamental amplitude of uo, and ω represents the fundamental frequency. io is expressed as
i o ( t ) = I sin ( ω t + θ )
where I represents the amplitude of io, and θ represents the initial phase of io. Due to the load of the inverter consisting of the resistance and the capacitance paralleling with the load, the following relations are satisfied:
I = U 1 + ( ω C R ) 2 / R θ = arctan ( ω C R )
Substituting (11) and (12) with (10), the following can be obtained:
Δ i dc = T s L U I sin ( ω t ) sin ( ω t + θ ) i dc ( t ) u dc
Formula (14) is simplified as follows:
Δ i dc = T s 2 L U I cos θ cos ( 2 ω t + θ ) i dc ( t ) 2 u dc
The maximum reduction ∆idcmax of idc in a switching period is shown as follows:
Δ i d c max = T s 2 L U I ( cos θ + 1 ) i dc ( t ) 2 u dc
If ∆idcmax < 0, idc can continue increasing in any switching period, which consists of magnetizing mode and energy-supplying mode. Thus, idc needs to be satisfied as follows:
i dc > U I ( cos θ + 1 ) 2 u dc
Substituting (13) with (17), and replacing idc with i dc * , Formula (17) can be rewritten as follows:
i dc * > U 2 1 + 1 + ( ω C R ) 2 2 u dc R
The theoretical waveforms in a fundamental period, including idc, uo, and switching signals are presented in Figure 7. Based on the operation mode, switching signals, DC-link current optimal reference, and control strategy, the theoretical waveform is divided into eight stages:
(1) Stage 1 (t0t1): 0 < uo < udc, Ldc is charged in energy-supplying mode I; S1 remains on-state; S0 is turned on in the zero vector period to prevent idc from continuously increasing.
(2) Stage 2 (t1t2): −udc < uo < 0, Ldc is charged in energy-supplying mode II; S3 remains on-state; S0 is turned on in the zero vector period to prevent idc from continuously increasing.
(3) Stage 3 (t2t3): uo < −udc; Ldc discharges in energy-supplying mode II due to idc being still greater than i dc * ; S0 is also turned on in the zero vector period; idc begins to decrease.
(4) Stage 4 (t3t4): uo < −udc and idc < i dc * ; to prevent idc further decrease, S4 is turned on in the zero vector period, since i dc * is the optimal reference of the DC-link current; idc will be clamped near i dc * .
(5) Stage 5 (t4t5), Stage 6 (t5t6), Stage 7 (t6t7), and Stage 8 (t7t8) are similar to Stage 1 (t0t1), Stage 2 (t1t2), Stage 3 (t2t3), and Stage 4 (t3t4), respectively.

5. Control Strategy of the Output Voltage

Since the PI controller is not suitable for AC models, the math model of the singe phase CSI is established in d-q frame. The fundamental component of uo is represented as follows:
u o ( t ) = u od sin ( ω t ) + u oq cos ( ω t )
where uod = U, and uoq = 0. The quadrature virtual component of uo is introduced, which is shown as follows:
u o ( t ) = U o sin ( ω t π 2 )
The d-q frame components uod and uoq can be obtained as follows:
u od ( t ) = u o ( t ) sin ( ω t ) + u o ( t ) cos ( ω t ) u oq ( t ) = u o ( t ) cos ( ω t ) u o ( t ) sin ( ω t )
The same representation for io is shown as follows:
i o ( t ) = i od sin ( ω t ) + i oq cos ( ω t )
where iod and ioq are the DC component. Substituting Equations (21) and (22) with (2), it yields the following:
C d u od d t + u od R = ω C u oq + i od C d u oq d t + u oq R = ω C u od + i oq
uod and uoq are adjusted by the PI controller, and feedback decoupling is adopted to cancel out the coupling terms ωCuod and ωCuoq. The control strategy of uo is shown in Figure 8, where u od * and u oq * are the reference of uod and uoq, and i od * and i oq * are the reference of iod and ioq, respectively. i od * and i oq * are expressed as follows:
i od * = k p s + k i s ( u od * u od ) ω C u oq i oq * = k p s + k i s ( u oq * u oq ) + ω C u od
where kp and ki are the proportional coefficient and integral coefficient, respectively.
Considering the digital delay, the open-loop transfer function Gopen(s) can be derived as follows:
G open ( s ) = k p s + k i s ( 1 + T s s ) ( 1 + R C s )
where Ts is the switching period and is equal to 100 μs. Zero point is set to offset the pole, and the cutoff frequency is set at 1 kHz. kp and ki are set as 2000πRC and 2000π. The Bode plot of Gopen(s) is shown in Figure 9a, and the Bode plot of the closed-loop transfer function Gclose(s) is shown in Figure 9b. Good track performance and fast dynamic response can thus be achieved.

6. Experimental Results

An experimental prototype of a single-phase CSI is established and shown in Figure 10. The corresponding soft simulation is presented in the Supplementary Material. The algorithm of modulation and control are implemented by TMS320F28335, and the IGBT and diode are PM400HSA120 and RM300HA-24F, respectively. udc is supplied by a DC power supply. The parameters of the passive components are consistent with Table 4.

6.1. Experimental Results of Steady-State

The amplitude and frequency of the reference of uo are 50 V and 50 Hz. i dc * is set to 13.5 A. The experimental waveforms of idc and uo are shown in Figure 11a, where the amplitude and frequency of uo are consistent with the reference, and idc is maintained in the range of 13.5 A to 15 A. Figure 11b shows that uo’s THD is only 0.61%, and its harmonics are limited.
In order to verify that i dc * = 13.5 A is the optimal reference of the DC-link current, a steady-state experiment is carried out in Figure 12, where i dc * is set to 11.5 A. A large fluctuation occurs in idc, which cannot maintain above 11.5 A. In some switching periods, idc cannot meet the requirement of current for the AC load. Therefore, significant low-order harmonic distortion occurs in uo, whose THD is 23.88%, and fundamental amplitude is 38.5 V, lower than the reference 50 V.
In Figure 13, i dc * is set to 20 A, and idc maintains above 20 A with small fluctuation. Since idc is higher than the amplitude of io, uo can track the reference. uo’s THD is 1.38%, greater than the one when i dc * = 13.5 A. Meanwhile, the switching loss and conduction loss of IGBT and diode are positively related to idc. The above experimental results show that the calculation method for the optimal reference of DC-link current is correct and feasible.

6.2. Experimental Results of Dynamic-State

The dynamic performance of the output voltage control strategy will be verified in this section. The frequency remains 50 Hz, and the amplitude of the reference voltage is adjusted from 40 V to 60 V. According to Formula (18), i dc * is set to 9 A and 17.5 A, respectively. The experimental waveforms of idc and uo are shown in Figure 14. idc reaches the steady state again after 2 ms and remains above 17.5 A. In Figure 14, the uo‘s amplitude is adjusted to 60 V with smooth changing.
Figure 15 shows the experimental waveforms when the amplitude is set to 50 V, and the frequency ω changes from 50 Hz to 100 Hz. According to (18), i dc * is related to ω, so it should be adjusted from 13.5 A to 16.5 A. In Figure 15, idc and uo can track the reference quickly. In conclusion, the superior steady-state and dynamic-state performance of the output voltage control strategy can be fully proved, and the DC-link current reference from the proposed calculation method is the minimum value that can meet the power demand.
Finally, the CSI’s efficiency has been tested under different load powers from 100 W to 500 W. A curve map of the CSI’s efficiency is illustrated in Figure 16. When the load power increases, the power loss in the conduction and switching increases relatively more slowly than the load power, so the CSI’s efficiency rises with the increased load power.

7. Conclusions

This paper proposes a novel PWM modulation method to control DC-link current for the improved topology of single-phase CSI; the corresponding operating modes and modulation strategy with DC-link current hysteresis control are also introduced in detail. The relationship between the optimal reference of DC-link current and output voltage is derived. A voltage control strategy based on d-q frame components is discussed. A series of simulations and experiments is set up to demonstrate the feasibility of the proposed method. The conclusions are summarized as follows:
(1) DC-link current can remain in the expected range by adopting the improved PWM modulation, and the number of switching activities is the same as the traditional modulation.
(2) The calculation method of optimal reference for DC-link current can meet the AC side load demand, improving current utilization and reducing loss.
(3) The control of DC-link current is implemented by switching magnetizing mode and freewheeling mode, which is separated from output voltage control. Thus, the DC-side model can be considered a controlled current source.

Supplementary Materials

The following supporting information can be downloaded at: https://www.mdpi.com/article/10.3390/en16186729/s1. Figure S1. Simulation waveforms in steady state: (a) DC-link current; (b) AC output volt-age. Figure S2. Simulation waveforms on the traditional single-phase CSI when the initial DC-link current is 0A: (a) DC-link current; (b) AC output voltage. Figure S3. Simulation waveforms on the traditional single-phase CSI when the initial DC-link current is 16A: (a) DC-link current; (b) AC output voltage.

Author Contributions

Methodology, Y.Z. and T.Y.; Software, T.Y.; Writing—original draft, Y.Z.; Writing—review and editing, Y.M. All authors have read and agreed to the published version of the manuscript.

Funding

This work is supported by the Youth project of science and technology research program of Chongqing Education Commission of China (No. KJQN202001105).

Data Availability Statement

The data presented in this study are available on request from the corresponding author. The data are not publicly available due to the funder’s requirement.

Conflicts of Interest

The authors declare no conflict of interest.

Nomenclature

VSIVoltage Source Inverter
CSICurrent Source Inverter
HVDCHigh Voltage Direct Current
LdcDC-link inductance (mH)
CAC side’s filter capacitor (μF)
RAC side’s resistive load (Ω)
idcDC side’s current (A)
ioOutput current on the resistive load R (A)
udcDC side’s voltage (V)
uoOutput voltage on the resistive load R (A)
p/qSwitching functions for S0, S1, S2, S3, and S4 (-)
dDuty cycle (%)
i o * Reference of the output current io (A)
i dc * Reference of the DC side’s current idc (A)
idc_downDecrement of idc when discharging (A)
idc_upIncrement of idc when charging (A)
TsSwitching period (s)
UFundamental amplitude of uo (V)
IFundamental amplitude of io (A)
θInitial phase of io (rad)
ωFundamental frequency of io (Hz)
idcmaxMaximum reduction of idc (A)
uod/uodd-q frame components of uo
u od * / u oq * Reference of uod/uod
iod/iodd-q frame components of io
i od * / i oq * Reference of iod/iod

References

  1. Chakrabarti, A.; Sarkar, K.; Kasari, P.R.; Das, B.; Biswas, S.K. A CB-PWM Technique for Eliminating CMV in Multilevel Multiphase VSI. IEEE Trans. Ind. Electron. 2022, 70, 8666–8675. [Google Scholar] [CrossRef]
  2. He, J.; Zhang, C.; Lei, M.; Han, J.; Guo, P.; Li, Y. An Active Bypass Pulse Injection-Based Low Switching Frequency PWM Approach for Harmonic Compensation of Current-Source Converters. IEEE Trans. Power Electron. 2021, 36, 1614–1625. [Google Scholar] [CrossRef]
  3. Rajeev, M.; Agarwal, V. Single phase current source inverter with multiloop control for transformerless grid–PV interface. IEEE Trans. Ind. Appl. 2018, 54, 2416–2424. [Google Scholar] [CrossRef]
  4. Titus, J.; Harikrishnan, P.; Hatua, K. An SCR-Based CSI-Fed Induction Motor Drive for High Power Medium Voltage Applications. IEEE Trans. Ind. Electron. 2020, 68, 4657–4666. [Google Scholar] [CrossRef]
  5. Guo, X.-Q.; Sui, S.; Wang, B.; Zhang, W. A Current-Based Approach for Short-Circuit Fault Diagnosis in Closed-Loop Current Source Inverter. IEEE Trans. Ind. Electron. 2019, 67, 7941–7950. [Google Scholar] [CrossRef]
  6. Miao, Y.; Liao, W.; Huang, S.; Liu, P.; Wu, X.; Song, P.; Li, G. DC-Link Current Minimization Scheme for IM Drive System Fed by Bidirectional DC Chopper-Based CSI. IEEE Trans. Transp. Electrif. 2023, 9, 2839–2850. [Google Scholar] [CrossRef]
  7. Li, Y.W.; Pande, M.; Zargari, N.R.; Wu, B. DC-link current minimization for high-power current-source motor drives. IEEE Trans. Power Electron. 2008, 24, 232–240. [Google Scholar]
  8. Geng, Y.; Yang, K.; Lai, Z.; Zheng, P.; Liu, H.; Deng, R. A Novel Low Voltage Ride Through Control Method for Current Source Grid-Connected Photovoltaic Inverters. IEEE Access 2019, 7, 51735–51748. [Google Scholar] [CrossRef]
  9. Wang, W.; Gao, F.; Yang, Y.; Blaabjerg, F. Operation and modulation of H7 current-source inverter with hybrid SiC and Si semiconductor switches. IEEE J. Emerg. Sel. Top. Power Electron. 2017, 6, 387–399. [Google Scholar] [CrossRef]
  10. Yang, S.; Peng, F.Z.; Lei, Q.; Inoshita, R.; Qian, Z. Current-fed quasi-Z-source inverter with voltage Buck–Boost and regeneration capability. IEEE Trans. Ind. Appl. 2010, 47, 882–892. [Google Scholar] [CrossRef]
  11. Guo, X.; Wang, N.; Zhang, J.; Wang, B.; Nguyen, M.-K. A Novel Transformerless Current Source Inverter for Leakage Current Reduction. IEEE Access 2019, 7, 50681–50690. [Google Scholar] [CrossRef]
  12. Nascimento, A.J.P.; de Menezes, B.F.; de Mesquita, S.J.; Costa, K.R.; Tofoli, F.L.; Daher, S.; Antunes, F.L.M. Bidirectional Isolated Asymmetrical Multilevel Inverter. IEEE Trans. Circuits Syst. II Express Briefs 2022, 70, 151–155. [Google Scholar] [CrossRef]
  13. Sun, R.; Wang, X.; Ye, Y. Seventeen-Level Inverter Based on Switched-Capacitor and Flying-Capacitor-Fed T-type Unit. IEEE Access 2022, 10, 33561–33570. [Google Scholar] [CrossRef]
  14. Ding, L.; Li, Y.W. Simultaneous DC current balance and common-mode voltage control with multilevel current source inverters. IEEE Trans. Power Electron. 2018, 33, 9188–9197. [Google Scholar] [CrossRef]
  15. Guo, Q.; Zhou, C.; Li, S. A Multiple Loops Control Strategy Based on DC Link Voltage of Current Source PWM Rectifiers. Trans. China Electrotech. Soc. 2022, 37, 2051–2063. [Google Scholar]
  16. Wu, F.; Feng, F.; Luo, L.; Duan, J.; Sun, L. Sampling period online adjusting-based hysteresis current control without band with constant switching frequency. IEEE Trans. Ind. Electron. 2014, 62, 270–277. [Google Scholar] [CrossRef]
  17. Wang, Z.; Wu, B.; Xu, D.; Cheng, M.; Xu, L. DC-link current ripple mitigation for current-source grid-connected converters under unbalanced grid conditions. IEEE Trans. Ind. Electron. 2016, 63, 4967–4977. [Google Scholar] [CrossRef]
Figure 1. The topology of the proposed single-phase CSI.
Figure 1. The topology of the proposed single-phase CSI.
Energies 16 06729 g001
Figure 2. The operating modes of the proposed single-phase CSI: (a) magnetizing mode; (b) energy-supplying mode I; (c) energy-supplying mode II; (d) freewheeling model.
Figure 2. The operating modes of the proposed single-phase CSI: (a) magnetizing mode; (b) energy-supplying mode I; (c) energy-supplying mode II; (d) freewheeling model.
Energies 16 06729 g002
Figure 3. The topologies of different CSI: (a) current source rectifier; (b) buck converter; (c) quasi-Z source network; (d) bidirectional DC chopper; (e) proposed single-phase CSI.
Figure 3. The topologies of different CSI: (a) current source rectifier; (b) buck converter; (c) quasi-Z source network; (d) bidirectional DC chopper; (e) proposed single-phase CSI.
Energies 16 06729 g003
Figure 4. The diagram of p1, carrier wave, and modulation wave.
Figure 4. The diagram of p1, carrier wave, and modulation wave.
Energies 16 06729 g004
Figure 5. The changing process of idc and p3.
Figure 5. The changing process of idc and p3.
Energies 16 06729 g005
Figure 6. Logical conversion for the proposed single-phase CSI.
Figure 6. Logical conversion for the proposed single-phase CSI.
Energies 16 06729 g006
Figure 7. The theoretical waveforms in a fundamental period.
Figure 7. The theoretical waveforms in a fundamental period.
Energies 16 06729 g007
Figure 8. Control strategy diagram of output voltage.
Figure 8. Control strategy diagram of output voltage.
Energies 16 06729 g008
Figure 9. The Bode-plots of the output voltage control: (a) Gopen(s), (b) Gclose(s).
Figure 9. The Bode-plots of the output voltage control: (a) Gopen(s), (b) Gclose(s).
Energies 16 06729 g009
Figure 10. Experimental prototype of proposed single-phase CSI.
Figure 10. Experimental prototype of proposed single-phase CSI.
Energies 16 06729 g010
Figure 11. Experimental results under i dc * = 13.5 A: (a) experimental waveforms of idc and uo; (b) FFT results.
Figure 11. Experimental results under i dc * = 13.5 A: (a) experimental waveforms of idc and uo; (b) FFT results.
Energies 16 06729 g011
Figure 12. Experimental results under i dc * = 11.5 A: (a) experimental waveforms of idc and uo; (b) FFT results.
Figure 12. Experimental results under i dc * = 11.5 A: (a) experimental waveforms of idc and uo; (b) FFT results.
Energies 16 06729 g012
Figure 13. Experimental results under i dc * = 20 A: (a) Experimental waveforms of idc and uo; (b) FFT results.
Figure 13. Experimental results under i dc * = 20 A: (a) Experimental waveforms of idc and uo; (b) FFT results.
Energies 16 06729 g013
Figure 14. The dynamic-state experimental waveforms under amplitude changing.
Figure 14. The dynamic-state experimental waveforms under amplitude changing.
Energies 16 06729 g014
Figure 15. The dynamic-state experimental waveforms under frequency changing.
Figure 15. The dynamic-state experimental waveforms under frequency changing.
Energies 16 06729 g015
Figure 16. The efficiency map of the proposed single-phase CSI.
Figure 16. The efficiency map of the proposed single-phase CSI.
Energies 16 06729 g016
Table 1. The operating modes, switching state, and switching function.
Table 1. The operating modes, switching state, and switching function.
Operating ModesSwitching StateSwitching Function p and q
magnetizing modeS1 and S2 ON, S0, S3, and S4 OFFp = 0, q = 1
energy-supplying mode IS1 and S4 ON, S0, S2, and S3 OFFp = 1, q = 0
energy-supplying mode IIS2 and S3 ON, S0, S1, and S4 OFFp = −1, q = 0
freewheeling modelS0 ON, S1, S2, S3, and S4 OFFp = 0, q = 0
Table 2. Voltage stresses of all switching tubes under different operating modes.
Table 2. Voltage stresses of all switching tubes under different operating modes.
Operating ModeWithstand Voltage S0Withstand Voltage S1Withstand Voltage S2Withstand Voltage S3Withstand Voltage S4
Magnetizing modeudc00uouo
Energy-supplying modeudcuo0uouo0
Freewheeling model0uoudcuo0udc
Table 3. Comparison of different CSI topologies.
Table 3. Comparison of different CSI topologies.
ParameterCurrent Source RectifierBuck ConverterQuasi-Z Source NetworkBidirectional DC ChopperProposed Single-Phase CSI
NV11111
NUS00000
NBS85465
ND85565
NC21211
Ndrv85465
NT00100
Nl33333
CF11.3376.678.337
Input H BridgeYesNoNoYesNo
ModulationPWMPWMPWMPWMPWM
Table 4. Parameters of experiment.
Table 4. Parameters of experiment.
NameValue
DC input voltage (V)25
AC output voltage (V)30~150
Load power (W)≤103
Output frequency (Hz)≤500 Hz
Switching frequency (Hz)10 k
Sampling frequency (Hz)10 k
Ldc (mH)4
C (μF)265
R (Ω)25
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Zhang, Y.; Yang, T.; Miao, Y. Research on the Modulation and Control Strategy for a Novel Single-Phase Current Source Inverter. Energies 2023, 16, 6729. https://doi.org/10.3390/en16186729

AMA Style

Zhang Y, Yang T, Miao Y. Research on the Modulation and Control Strategy for a Novel Single-Phase Current Source Inverter. Energies. 2023; 16(18):6729. https://doi.org/10.3390/en16186729

Chicago/Turabian Style

Zhang, Yi, Tao Yang, and Yiru Miao. 2023. "Research on the Modulation and Control Strategy for a Novel Single-Phase Current Source Inverter" Energies 16, no. 18: 6729. https://doi.org/10.3390/en16186729

APA Style

Zhang, Y., Yang, T., & Miao, Y. (2023). Research on the Modulation and Control Strategy for a Novel Single-Phase Current Source Inverter. Energies, 16(18), 6729. https://doi.org/10.3390/en16186729

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop