Adaptive Charge-Compensation-Based Variable On-Time Control to Improve Input Current Distortion for CRM Boost PFC Converter

Abstract

For boost power factor correction (PFC) converters operating in critical conduction mode (CRM), charge compensation strategies are utilized to improve input current distortion. However, since massive calculations are required under complex working conditions, it is difficult to achieve accurate charge compensation with limited real-time computing resources. To solve this issue, this paper proposes an adaptive charge-compensation-based variable on-time (ACVOT) control strategy. The ACVOT controller calculates the required switching on-time by adding a fundamental value and an extended on-time. The fundamental value is adjusted by the loop compensator in each half-line cycle to provide a basic bias. The extended on-time is calculated based on partial charge compensation equation in each switching cycle to reduce the distortion. Compared with conventional digital variable on-time (VOT) control, the proposed strategy improves the input current total harmonics distortion (THD) and reduces the LUT/register resources by 54%/43% in FPGA realization. To verify the effectiveness of the proposed strategy, a 200 W prototype is built using the GaN HEMT transistor, where the THD is reduced to 1.4% at full load.

1. Introduction

Power factor correction (PFC) is increasingly required in AC-DC converters to improve the total harmonics distortion (THD) and power factor (PF) [1,2,3,4]. As a classical choice, a boost PFC converter operating in the critical conduction mode (CRM) is preferred in medium- and low-power applications, owing to its simple control and high efficiency [5,6]. However, since CRM operation requires a reverse inductor current stage to achieve soft switching, the average inductor current is naturally less than the expected value under conventional constant on-time (COT) control, which causes serious input current distortion [7,8]. To reduce the input current distortion, analog and digital variable on-time (VOT) controls are proposed. These controls dynamically adjust the on-time to compensate the average inductor current, so that to reduce the THD as low as possible.

Analog-based VOT controls are developed in [9,10,11,12,13,14]. Since the distortion is closely related to the input, a feedforward from the input voltage to the on-time is implementable to reduce THD, while a constant feeding proportion is commonly used [9,10]. However, constant proportion cannot adapt to the input change; thus, dynamic proportion is an option to improve the THD [11]. Correspondingly, to improve the THD at different loads, the output power is sensed to adjust the on-time [12,13]. The above strategies do not incorporate accurate online calculation that leads to limited performance. To further improve the THD, an accurate charge compensation model is built through Taylor series expansion, which is complex for analog implementation [14].

Comparatively, digital-based VOT controls provide more flexible solutions to reduce the THD [15,16,17,18,19,20,21,22]. These controls incorporate accurate relations among the average inductor current, the input voltage, and the load. They can be realized through either real-time calculations or look-up table (LUT) methods. For LUT realizations, the designers have to compromise among the simplicity, accuracy, and memory consumptions. In [16], LUT implementation only fit for PFC in the triangular current mode (TCM) is given. In [17], a general method that considers the input filter capacitor is proposed, which has complex tables to improve accuracy. The relationship between tables under different inputs and loads is further summarized in [18] and a method using a single table is proposed. However, the LUT building process is complex. Real-time strategies avoid the table-building process but consume unacceptable hardware resources with full-order calculation [19,20]. To save computing resources, a real-time current detector and an average current calculator using triangular approximation are applied [21]. The current distortion beyond input zero-crossing is neglected [22]. These existing strategies are relatively difficult to maintain accuracy while reducing complexity for implementation.

In this paper, an adaptive charge-compensation-based variable on-time (ACVOT) control is proposed. Different from directly calculating the required on-time, the ACVOT controller adds an extended time (T_ext) to a fundamental time (T_{on_bias}) to calculate the switching on-time. The extended on-time is derived based on a full-order model of the inductor charge, which over-compensates the negative charge during valley switching (VS) or zero-voltage switching (ZVS), and is updated every switching cycle. The fundamental time is acquired through the output voltage feedback, which is updated every half-line cycle using PI compensation. Over-compensated extended time takes a simple form and contains a key component of accurate on-time. Moreover, the adjusted fundamental time supplements the required switching time. With a combination of online compensation and feedback adjustment, the proposed strategy maintains fairly low THD on effect and reduces the implementation complexity. Relevant simulations and experiments are conducted to verify the effectiveness of ACVOT control.

The rest of the paper is organized as follows. Section 2 discusses the operation analysis for CRM boost PFC converter, and explains the reasons for input current distortion. Then, the ACVOT control is proposed based on charge compensation equations. In Section 3, simulations are applied to verify the effectiveness and the adaptivity of the proposed control. Details of the control are also discussed in this section. Section 4 shows the experiment results and compares the results with other controls. Finally, a brief conclusion is given in Section 5.

2. Proposal of ACVOT Control

2.1. A General Analysis of CRM Boost PFC

The basic topology of a typical boost PFC converter is displayed in Figure 1, including the elements generally required, such as the EMI filter and the rectifier bridge. The GaN high-electron-mobility transistor (HEMT) and the SiC diode are used in this paper. The output junction capacitance C_oss of the GaN HEMT and the parallel capacitance C_d of the SiC diode are presented.

The vs. and ZVS are vital approaches for the CRM boost converter to improve the overall operation efficiency. The key waveforms of the converter when VS/ZVS is achieved are given in Figure 2a,b. As is shown, the v_gs turns high at the valley or the zero point of v_ds, which minimizes the switching-on loss of the power switch. In such cases, different operation stages are identified depending on the time intervals in Figure 2.

For depicting topological states, the operating circuits of each stage are included in Figure 3, where the C_in and C are treated as constant voltage sources since their voltages change slightly during one switching cycle. Unspecified parasitic parameters are ignored to highlight the most concerning part.

Firstly, the resonance process in Figure 3a,c is described by equations:

$$\left\{\begin{array}{c}{v}_{\mathrm{ds}}=v_{\mathrm{in}}-L_b\frac{d{i}_L}{dt}\hfill \\ i_L\hspace{0.17em}=C_{oss}\frac{d{v}_{\mathrm{ds}}}{dt}+C_d\frac{d{v}_{\mathrm{d}}}{dt}\end{array}\right.$$

(1)

where the v_d = v_ds – v_o. By solving Equation (1), the resonance stage satisfies:

$$\left\{\begin{array}{c}{v}_{\mathrm{ds}}=A_1\cos \left({\omega }_{r}t\right)+A_2\sin \left({\omega }_{r}t\right)+v_{\mathrm{in}}\hfill \\ i_L\hspace{0.17em}=-A_1{C}_{\mathrm{eq}}{\omega }_r\sin \left({\omega }_{r}t\right)+A_2{C}_{\mathrm{eq}}{\omega }_r\cos \left({\omega }_{r}t\right)\end{array}\right.$$

(2)

where the C_eq = C_oss + C_d, ω_r = sqrt (1/L_bC_eq), Z_r = sqrt (L_b/C_eq), and A₁ and A₂ are the undetermined coefficients. Since the initial state of v_ds is v_o, and the steady state of v_ds is v_in, the criteria 2v_in – v_o for whether the vs. or the ZVS condition is deduced. Next, different operation stages in both VS/ZVS conditions are described. The expressions for v_ds and i_L are listed in

Table 1. Expressions for v_ds and i_L depending on the time intervals.

Time Intervals	vds(t)	iL(t)
[t0, t1]	$v_{\mathrm{in}}-\left(v_{\mathrm{in}}-v_{\mathrm{o}}\right)\cos \left[{\omega }_r\left(t-t_0\right)\right]$	$\frac{v_{\mathrm{in}}-v_{\mathrm{o}}}{Z_r}\sin \left[{\omega }_r\left(t-t_0\right)\right]$
[t1, t2]	0	$\left(\mathrm{For} \mathrm{VS},\frac{v_{\mathrm{in}}}{L_b}\left(t-t_1\right)\right)$ $\left(\mathrm{For} \mathrm{ZVS}, \begin{array}{c}\left[t_1,t_x\right]\to i_L\left(t_1\right)+\frac{v_{\mathrm{in}}}{L_b}\left(t-t_1\right)\hfill \\ \left[t_x,t_2\right]\to \frac{v_{i\mathrm{n}}}{L_b}\left(t-t_X\right)\hfill \end{array}\right)$
[t2, t3]	$\begin{array}{l}{v}_{\mathrm{in}}-v_{\mathrm{in}}\cos \left[{\omega }_r\left(t-t_2\right)\right]\\ +Z_r{i}_L\left(t_2\right)\sin \left[{\omega }_r\left(t-t_2\right)\right]\end{array}$	$i_L\left(t_2\right)\cos \left[{\omega }_r\left(t-t_2\right)\right]+\frac{v_{\mathrm{in}}}{Z_r}\sin \left[{\omega }_r\left(t-t_2\right)\right]$
[t3, t4]	$v_{\mathrm{o}}$	$i_L(t_3)-\frac{v_{\mathrm{o}}-v_{\mathrm{in}}}{L_b}(t-t_3)$

depending on the time intervals.

For the vs. condition (2v_in > v_o), there are four stages in one switching cycle.

Stage I: The reverse resonant period [t₀, t₁]. I_L is zero at t₀ instant and the initial value of v_ds is v_o. L_b starts resonating reversely with C_eq. Stage II: The switching-on period [t₁, t₂]. The gate drive signal v_gs stays high and i_L rises linearly from zero to its peak value i_pk. Stage III: The forward resonant period [t₂, t₃]. The power switch turn-off at t₂ and L_b starts resonating forwardly with C_eq in a short period of time. Stage IV: The diode conduction period [t₃, t₄]. The power switch is blocked and the diode is conductive. I_L decreases linearly to zero at the t₄ instant.

For the ZVS condition (2v_in < v_o), the expression of Stage I, Stage III, and Stage IV is the same as the expression in the vs. condition. The difference in Stage II is described by the following two segmented states: Stage II-1: The switch-on period 1 [t₁, t_x]. The power switch becomes conductive at t₁ instant and i_L starts rising linearly from the reverse peak value. Stage II-2: The switch-on period 2 [t_x, t₂]. The power switch stays conductive and i_L rises linearly from zero to its peak value i_pk.

Since the equations of i_L and v_ds are already given clearly in operation stages, the time intervals t_n – t_n−1 and the inductor charge Q_n during each stage are calculated by substituting numerical boundary conditions and by using step-by-step integration. The results in

Table 2. Lists of the time intervals during the switching cycle.

Stage	The ZVS Condition	The VS Condition
I	$t_1-t_0=\frac{1}{{\omega }_r}\left(\pi -\arccos \frac{v_{\mathrm{in}}}{v_{\mathrm{o}}-v_{\mathrm{in}}}\right)$	$t_1-t_0=\frac{\pi }{{\omega }_r}$
II-1	$t_{\mathrm{x}}-t_1=\frac{1}{{\omega }_r{v}_{\mathrm{in}}}\sqrt{v_{\mathrm{o}}^2-2v_{\mathrm{o}}{v}_{\mathrm{in}}}$	$t_2-t_1=T_{\mathrm{on}}$
II-2	$t_2-t_{\mathrm{x}}=T_{\mathrm{on}}-\frac{1}{{\omega }_r{v}_{\mathrm{in}}}\sqrt{v_{\mathrm{o}}^2-2v_{\mathrm{o}}{v}_{\mathrm{in}}}$
III	$t_3-t_2=\frac{1}{{\omega }_r}\left(\arcsin \frac{v_{\mathrm{in}}}{\sqrt{v_{\mathrm{in}}^2+{\left(Z_r{i}_L\left(t_2\right)\right)}^2}}+\arcsin \frac{v_{\mathrm{o}}-v_{\mathrm{in}}}{\sqrt{v_{\mathrm{in}}^2+{\left(Z_r{i}_L\left(t_2\right)\right)}^2}}\right)$
IV	$t_4-t_3=\frac{L_b}{v_{\mathrm{o}}-v_{\mathrm{in}}}{i}_L\left(t_3\right)$

and

Table 3. Lists of the inductor charges during the cycle.

Stage	The ZVS Condition	The VS Condition
I	$Q_1=-C_{\mathrm{eq}}{v}_{\mathrm{o}}$	$Q_1=-2C_{\mathrm{eq}}\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right)$
II-1	$Q_{21}=-\frac{C_{\mathrm{eq}}{v}_{\mathrm{o}}}{2v_{\mathrm{in}}}\left(v_{\mathrm{o}}-2v_{\mathrm{in}}\right)$	$Q_2=\frac{v_{\mathrm{in}}}{2L_b}{T}_{\mathrm{on}}^2$
II-2	$Q_{22}=\frac{v_{\mathrm{in}}}{2L_b}{\left(T_{\mathrm{on}}-\frac{1}{{\omega }_r{v}_{\mathrm{in}}}\sqrt{v_{\mathrm{o}}^2-2v_{\mathrm{o}}{v}_{\mathrm{in}}}\right)}^2$
III	$Q_3=C_{\mathrm{eq}}{v}_{\mathrm{o}}$	$Q_3=C_{\mathrm{eq}}{v}_{\mathrm{o}}$
IV	$Q_4=\frac{v_{\mathrm{in}}^2}{2L\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right)}\left({\left(T_{\mathrm{on}}-\frac{\sqrt{v_{\mathrm{o}}\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right)}}{{\omega }_r{v}_{\mathrm{in}}}\right)}^2-\frac{v_{\mathrm{o}}\left(v_{\mathrm{o}}-2v_{\mathrm{in}}\right)}{{\omega }_r^2{v}_{\mathrm{in}}^2}\right)$

show a full-order model of the inductor charge.

Based on the above operation analysis, the reasons for input current distortion are now discussed.

As is known, the input current all passes through the inductor, and the average of the inductor current during the switching cycle is assumed to be i_{L_av} = T_on(v_in/L_b)/2 under COT control. Thus, with a constant T_on, the input current is in proportion to the sinusoidal input voltage in assumption. However, with the full-order inductor charge model, the i_{L_av} is calculated as

$$i_{\mathrm{L}\_\mathrm{av}}=\frac{\Sigma Q_{\mathrm{n}}}{\Sigma \left(t_{\mathrm{n}}-t_{\mathrm{n}-1}\right)}$$

(3)

where the time intervals t_n − t_{n − 1} and the inductor charge Q_n are given in Table 2 and Table 3. Because of the existence of the forward resonance stage and the reverse resonance stage, numerous nonlinear factors are introduced to the relation of i_{L_av} and T_on, which distorts the input current. The reverse resonance stage is focused to reduce the distortion, since the forward resonance stage is short and has negligible influence. On the one hand, the reverse resonance decreases the charge transferred during a switching cycle. On the other hand, it increases the length of the cycle. These two points result in the i_{L_av} being lower than expected.

Reviewing the operation of boost PFC, it is worth noting that energy is stored in the inductor L_b during the switching-on period and is transferred to the output during the diode conduction period, as shown in Figure 3b,d. However, when the energy stored in L_b is not enough to charge the C_oss and discharge the C_d to let v_ds > v_o + v_diode (v_{cond_diode} is the conduction voltage of D), diode D cannot be turned on. The circuit enters a non-power transfer period, at which time resonance occurs, as shown in Figure 4. During this period, the energy is confined and dissipated in the tank circuit, which is composed of C_in, L_b, and C_eq.

Under COT control, the length of the switching-on period is regarded as constant. Thus, when the line voltage Vac is low near the zero-crossings, the switching-on period cannot supply sufficient energy to L_b. Non-power transfer occurs as described above. During this interval, the voltage drop rate of C_in is slow, which is determined by the relatively small loss in the resonant tank and the relatively large value of C_in. On the contrary, the line voltage decreases at a faster rate. Thus, the bridge rectifier cannot be turned on until the line voltage rises high again in the next half-line cycle. The line current i_ac forms a flat region during this interval, as illustrated in Figure 4b [11].

This phenomenon is called “crossover distortion”. If the energy charged during the switching-on period is described as a function of the input current, the criteria for the zero-crossing region are expressed as:

$$\frac{1}{2}L{i}_{\mathrm{ac}}^2\le \frac{1}{2}{C}_{\mathrm{eq}}{\left(v_{\mathrm{o}}+v_{\mathrm{cond}\_\mathrm{diode}}\right)}^2$$

(4)

Since the i_ac = I_{ac_rms}·sinθ ≈ P_o/V_{ac_rms}·sinθ, the θ satisfying Equation (4) is expected to increase as P_o/V_{ac_rms} decreases, which extends the zero-crossing region. Thus, serious crossover distortion occurs under COT control in case of the high input voltage with light load. Comparatively, if the VOT method is adopted to extend the switching-on period in the zero-crossing region, the distortion is expected to be significantly reduced [14].

Moreover, the input filter also affects the input current distortion. Because of the feature of the PFC, the input impedance is equivalent to a resistance when discussing the effect of the input filter. Since a capacitor C_in is commonly used, a phase leading angle ϕ₁ can exist between the input current and the input voltage. It is easy to estimate ϕ₁ as

$$\left\{\begin{array}{c}{i}_{\mathrm{in}}=\left(j2\pi f_{\mathrm{line}}{C}_{\mathrm{in}}+\frac{1}{R_{\mathrm{in}}}\right)v_{\mathrm{in}}\hfill \\ \tan {\varphi }_1=2\pi f_{\mathrm{line}}{C}_{\mathrm{in}}\frac{V_{\mathrm{in}\_\mathrm{rms}}^2}{P_{\mathrm{o}}}\hfill \end{array}\right.$$

(5)

where the R_in = P_o/$V_{\mathrm{in}\_\mathrm{rms}}^2$ is the input equivalent resistance, f_line is the line frequency, V_{in_rms} is the RMS value of the input voltage, and P_o is the output power of the PFC converter. The current distortion caused by C_in can be reduced by introducing a phase lag into the control [23]. Since the C_in is designed small and has low effects on the input current distortion compared with the reverse resonance, C_in is ignored when considering the main method of distortion compensation for simplicity. Except for the reasons above, the errors in control, the nonlinearity, the parasitic parameters of the devices, and the voltage ripple on C_in and C_out inevitably affect the input current. However, they are negligible for the analysis.

2.2. The Proposal of ACVOT Control

In order to eliminate input current distortion, the average inductor current of switching cycle should be controlled as the expected value. Assuming that the converter efficiency is η and the output power is P_o, the expected input current is expressed as

$$i_{\mathrm{in}\_\mathrm{expected}}=\frac{\sqrt{2}{P}_{\mathrm{o}}}{\eta V_{\mathrm{in}\_\mathrm{rms}}}\sin \left(\omega t\right)$$

(6)

Therefore, the objective T_{on_obj}(t) curve that guarantees the i_{L_av} being sinusoidal can be calculated by letting the i_{in_expected} = i_{L_av}, where i_{L_av} is obtained with the full-order inductor charge model for accuracy. The T_{on_obj}(t) is derived as

$$\begin{array}{l}{T}_{\mathrm{on}\_\mathrm{obj}}(t)=\sqrt{{\left(\frac{L}{R}\right)}^2+LC\frac{v_{\mathrm{o}}(v_{\mathrm{o}}-2V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t))}{{(V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t))}^2}+\sqrt{LC}\frac{L}{R}\frac{2(v_{\mathrm{o}}-V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t))}{V_{\mathrm{out}}}\left(\pi -\mathrm{a}\cos \frac{V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t)}{v_{\mathrm{o}}-V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t)}+\sqrt{{\left(\frac{v_{\mathrm{o}}}{V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t)}\right)}^2-2\frac{v_{\mathrm{o}}}{V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t)}}\right)}\\ \hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}+\frac{L}{R}+\sqrt{LC}\sqrt{\frac{v_{\mathrm{o}}(v_{\mathrm{o}}-2V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t))}{{(V_{\mathrm{in}\_\mathrm{rms}}\sin (\omega t))}^2}}\end{array}$$

(7)

It is obvious that the T_{on_obj}(t) is too complex to directly calculate. Figure 5a shows the calculated T_{on_obj}(t) curve with certain circuit parameters: P_o = 200 W, V_{in_rms} = 220 V, v_o = 400 V, L_b = 200μH, C_eq = 120 pF, η = 100%, and f_line = 50 Hz. It is noticed that the T_{on_obj}(t) curve can be treated as its shape part is superimposed on a fundamental part.

To simplify the calculation of T_{on_obj}(t), these two parts are considered to be acquired separately. Since the bias part is linear, utilizing feedback adjustment is suitable to avoid calculation. In addition, if the bias is adjusted by feedback, the shape curve is allowed to shift up and down as long as its shape is correct. This means that it is possible to simply obtain the shape curve using an over-compensation algorithm.

The generation of objective on-time under ACVOT control is divided into two parts accordingly. As shown in Figure 5b and Figure 6, the ACVOT controller obtains an extended on-time T_ext with correct curve shape using a real-time calculator while obtaining a bias on-time curve with correct amplitude using the PI compensator in each half-line cycle. The combination of T_ext and T_{on_bias} easily generate the desired on-time curve. The detailed control strategy is proposed as follows.

Since the main reason for the input current distortion is the reverse resonance in previous discussion, it is reasonable to build the T_ext curve based on the influence of the reverse resonance part. From the view of charge, the negative charge caused by the reverse inductor current stage needs to be compensated. Figure 7 labels the related charge during a switching cycle. The extended on-time T_ext is derived by building partial charge compensation in both VS/ZVS conditions.

When the vs. condition is achieved, two parts of the inductor charge are shown in Figure 7a, where the charge Q_{n_vs} represents the level of the current distortion. To compensate Q_{n_vs}, an extra conduction time T_ext is extended and Q_{th_vs} represents the level of compensated charge by T_ext.

Q_{n_vs} is Q₁ in the vs. condition, as shown in Table 3. Therefore, Q_{n_vs} is obtained by

$$Q_{\mathrm{n}\_\mathrm{vs}}=2C_{\mathrm{eq}}\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right),$$

(8)

where t₁ = T_r/2 = π sqrt(L_bC_eq) is the valley switching point of the resonance.

The inductor current keeps rising with the almost constant slope K = v_in/L_b during the time interval [t₁, t₂]. Thus, Q_{th_vs} is given by

$$Q_{\mathrm{th}\_\mathrm{vs}}=\frac{v_{\mathrm{in}}{T}_{\mathrm{ext}}^2}{2L_b}$$

(9)

Let Q_{th_vs} = Q_{n_vs}. The extended conduction time for the vs. condition is derived as

$$T_{\mathrm{ext}\_\mathrm{vs}}=\frac{2}{{\omega }_r}\sqrt{\frac{\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right)}{v_{\mathrm{in}}}}$$

(10)

When the ZVS condition is achieved, two parts of the inductor charge are shown in Figure 7b, where the charge Q_{n_zvs} during [t₀, t_x] represents the level of the current distortion, and Q_{th_zvs} represents the level of the compensated charge introduced by T_ext.

Like with the vs. condition, Q_{n_zvs} is the sum of Q₁ and Q₂₁ of the ZVS column in Table 3. Q₁ is obtained first in Table 2, which is expressed as

$$Q_1=v_{\mathrm{o}}{C}_{\mathrm{eq}}.$$

(11)

To derive Q₂₁, the peak value of the reverse inductor current is given as $i_L(t_1)=-\sqrt{v_o^2-2v_{\mathrm{o}}{v}_{\mathrm{in}}}/Z_r$ according to the expression of i_L(t) in Table 1, where t₁ is derived by setting v_ds(t₁) = 0 in expression of v_ds(t) in Stage I, and the time interval t_x − t₁ is given in Table 2 by setting i_L(t_x) = 0 in expression of i_L(t) in Stage II-1. With the initial condition and the integration time, Q₂₁ is calculated as

$$Q_{21}=\frac{C_{\mathrm{eq}}\left(v_{\mathrm{o}}^2-2v_{\mathrm{o}}{v}_{\mathrm{in}}\right)}{2v_{\mathrm{in}}}$$

(12)

With Q₁ and Q₂₁, Q_{n_zvs} is obtained. Thus, Q_{n_zvs} and Q_{th_zvs} are briefly expressed as

$$\left\{\begin{array}{c}{Q}_{\mathrm{n}\_\mathrm{zvs}}=\frac{C_{\mathrm{eq}}{v}_{\mathrm{o}}^2}{2v_{\mathrm{in}}}\hfill \\ Q_{\mathrm{th}\_\mathrm{zvs}}=\frac{v_{\mathrm{in}}{\left(T_{\mathrm{ext}}-\left(t_{\mathrm{x}}-t_1\right)\right)}^2}{2L_b}\hfill \end{array}\right.$$

(13)

Let Q_{th_zvs} = Q_{n_zvs}. The extended conduction time for the ZVS condition is derived as

$$T_{\mathrm{ext}\_\mathrm{ZVS}}=\frac{v_{\mathrm{o}}}{{\omega }_r{v}_{\mathrm{in}}}\sqrt{1-\frac{2v_{\mathrm{in}}}{v_{\mathrm{o}}}}+\frac{v_{\mathrm{o}}}{{\omega }_r{v}_{\mathrm{in}}}$$

(14)

The charge compensation relation Q_{th_vs} = Q_{n_vs/}Q_{th_zvs} = Q_{n_zvs} generates the required T_ext(t) of each cycle in both VS/ZVS conditions. Therefore, the final form of the extended on-time is established as

$$T_{\mathrm{ext}}=\left\{\begin{array}{c}\frac{2}{{\omega }_r}\sqrt{\frac{\left(v_{\mathrm{o}}-v_{\mathrm{in}}\right)}{v_{\mathrm{in}}}},v_{\mathrm{in}}>0.5v_{\mathrm{o}}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\mathrm{VS}\hfill \\ \frac{v_{\mathrm{o}}}{{\omega }_r{v}_{\mathrm{in}}}\sqrt{1-\frac{2v_{\mathrm{in}}}{v_{\mathrm{o}}}}+\frac{v_{\mathrm{o}}}{{\omega }_r{v}_{\mathrm{in}}},v_{\mathrm{in}}<0.5v_{\mathrm{o}}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\mathrm{ZVS}\end{array}\right.$$

(15)

Then, the initial bias on-time is estimated as

$$T_{\mathrm{on}\_\mathrm{bias}}\left(t\right)=\frac{2L_b}{v_{\mathrm{in}}\left(t\right)}{i}_{\mathrm{in}\_\mathrm{expected}}\left(t\right)$$

(16)

Finally, the complete on-time form of ACVOT control is expressed as

$$T_{\mathrm{on}\_\mathrm{ACVOT}}\left(t\right)=T_{\mathrm{on}\_\mathrm{bias}}\left(t\right)+T_{\mathrm{ext}}\left(t\right)$$

(17)

In order to obtain a good compensation effect, the T_{on_ACVOT}(t) curve should accord with the T_{on_obj}(t) curve. After adjusting the T_{on_bias}(t), the T_{on_ACVOT}(t) curve under the ACVOT control is plotted in Figure 5b with the same circuit parameters. It is obvious that the on-time curve under the proposed control and the T_{on_obj}(t) curve have good consistency. Further research about the ACVOT control is given in the following section.

3. Simulations and Details of the ACVOT Control

3.1. Mathematical Simulations for the ACVOT Control

In order to research the compensation effectiveness of the proposed control intuitively, close-loop mathematical simulations are applied based on the following steps:

• Under arbitrary P_o and V_{in_rms}, the reference inductor current is given by Equation (6), the bias conduction time is given by Equation (16), and the extended on-time is determined by Equation (15). Then, the on-time T_{on_ACVOT}(t) curve is calculated by Equation (17).
• With the T_{on_ACVOT}(t), the average inductor current curve is estimated by Equation (3). Further, the input power P_{in_cal} is calculated by integration in each half-line cycle. Since the feedback loop keeps adjusting the amplitude of the expected input current I_{in_exp} to match the output power, an adjusting process is applied as follows: when P_{in_cal} − P_o > 0, the loop shifts I_{in_exp} downward. When P_{in_cal} − P_o < 0, the loop shifts I_{in_exp} upward. Thus, the P_{in_cal} can be regulated to match the P_o. After several iterations, the stable state of the closed-loop ACVOT controller is obtained.
• The above two steps are repeated to obtain data in full input and load range. For comparison, the simulations about the COT control are also applied by the same steps.

The input current waveforms under the COT control and the ACVOT control are illustrated in Figure 8 with the simulated data, which has 200 W full load and the same circuit parameters as the previous section. It is observed that the input current waveform is significantly rectified using the ACVOT control.

Although the input current waveforms in the above cases show good effectiveness of the ACVOT control, it is worth considering that the working conditions of PFC are complex and the control parameters have deviations in real implementations. Further research is conducted to verify the adaptivity of ACVOT control.

To show the feasibility of the ACVOT control in a wide input and load range, quantitative analysis of current distortion is established using PF and THD calculations. For a list of stable states at different P_o and V_{in_rms} conditions, the PF and THD values are estimated by

$$\left\{\begin{array}{c}PF=\frac{P_{\mathrm{in}}}{V_{\mathrm{in}\_\mathrm{rms}}{I}_{\mathrm{rms}}}=\frac{1}{\pi }\frac{{\displaystyle {\int }_0^{\pi }{v}_{\mathrm{in}}\left(t\right)i_{\mathrm{in}}\left(t\right)d\omega t}}{V_{\mathrm{in}\_\mathrm{rms}}\sqrt{\frac{1}{\pi }{\displaystyle {\int }_0^{\pi }{i}_{\mathrm{in}}^2\left(t\right)d\omega t}}}\hfill \\ \mathrm{THD}=\sqrt{{\left(\cos \theta /PF\right)}^2-1}\hfill \end{array}\right.$$

(18)

where θ is the angle between the v_in and the fundamental component of i_in. θ is equal to 1 in calculation because the input filter is ignored.

The close-loop THD mapping under ACVOT control is shown in Figure 9b. For contrast, the THD mapping under COT control is plotted in Figure 9a. It is obvious that the ACVOT control is expected to effectively reduce the current distortion in a wide input and load range.

It is important to verify the sensitivity of values of L_b and C_eq under the ACVOT control, since they have large tolerance and the C_eq varies according to the variation of the drain–source voltage. Thus, the simulation is carried out with ±20% tolerance of the values of L_b and C_eq. The simulated PF and THD surfaces against different L_b and C_eq values with full load are shown in Figure 10 and Figure 11. Limited by the article length, surfaces under different load conditions are not plotted but they have the same trend as Figure 10 and Figure 11. It is observed that the ACVOT control slightly changes the THD and PF values under the variation range of L_b and C_eq. Moreover, better THD and PF occurs when the negative L_b and positive C_eq variations are achieved. Thus, a small L_b value and a large C_eq value are recommended to set.

3.2. Implementation Problems of ACVOT Control

Figure 6 illustrates the implementation of the proposed control, which is further discussed here.

In practical terms, the proposed control can be implemented based on a prior COT system, which mainly includes an input/output sampler, a voltage loop compensator, a PWM generator, and a valley/zero-voltage switching optimizer. In general, only an additional T_ext calculator is required for the proposed solution. This calculator uses the input, the output, the inductor value L_b, and the parasitic capacitance value C_eq to calculate Equation (15). Furthermore, its output is added to the output of voltage compensator, as shown in Figure 6, which is similar to a current loop compensator. The calculator consumed resources are discussed in Section 3.3. Without other required operations, the proposed solution is easy to implement. Moreover, the calculation of T_ext is feasible for common digital processors and chips. The proposed solution is flexible to be realized by DSP or ARM.

Furthermore, considering the practical problems of the ACVOT control, some essential details require explanation.

Firstly, input voltage sampling before the rectifier bridge is recommended, since it avoids the residual voltage of C_in near the input zero-crossing point. Otherwise, the additional phase lock model is required to obtain the sinusoidal input voltage.

Secondly, it is important to realize the detection of the VS/ZVS point. As illustrated in Figure 6, voltage-based detection is adopted in this paper. If the v_{ds_th} = max(2v_in − v_o, 0) is set, the RESET signal flips at the valley or zero-voltage point of v_ds according to the operation condition. In addition, a small offset is added to v_{ds_th} to ensure the comparator be trigged ahead of time, which also compensates for the detection delay.

Thirdly, the consideration of C_eq is simple under ACVOT control. Although the variations of C_eq are difficult to solve under different drain–source voltage curves and the piecewise equivalent method in [24] is more precise, using a constant C_eq is enough under ACVOT control in most implementations because C_eq is not sensitive under ACVOT control.

In addition, although the analytical solution of T_ext(t) is continuous at the boundary of VS/ZVS conditions, it is better to make minor boundary adjustments to ensure a smooth T_ext(t) curve when boundary error exists in implementation.

3.3. Features of ACVOT Control

The ACVOT control has the advantage of achieving both high performance and easy implementation. Related features are summarized as the following aspects:

• Only a simple and fixed calculation is required to realize the compensation within the universal ac input and entire load range. There is no need to detect the maximum value of input voltage or calculate the phase of input voltage, and any pre-calculation procedure is avoided for designers.
• The longest chain length of total calculation is six and they are basic operations except for one square root operation. To evaluate the resource consumption, an FPGA controller (EP4CE22F17C8N with ALTFP calculation IP cores) is used, the time and space consumption is reflected by the required clock-cycles, and the LUTs/registers resource is used.

  Table 4. Computing consumption of the proposed method and the method in [22].

  	Proposed		[22]
  	VS	ZVS	VS	ZVS
  Counts of SQRT	1	1	1	2
  Counts of DIV	1	2	2	2
  Counts of MUL	1	3	5	7
  Counts of ADD	1	2	4	6
  Clock-cycles	62		70
  LUTs/Registers	1126/5512		2443/9738

  compares the computing consumption between the ACVOT control and the control in [22], since [22] has the lowest operations consumption among the referenced digital methods that are not LUT-based (explained in Appendix A). As shown in Table 4, the ACVOT control consumes 54%/43% less LUTs/registers resources than the previous control.
• Moreover, the input current distortion can be significantly reduced. According to Fourier analysis, the total harmonic component is less than 1% of the fundamental waveform at the condition in Figure 8. The fault tolerance of L_b and C_eq is sufficient, which guarantees the robustness of the ACVOT control. The experiments in the next section further verify the performance of the ACVOT control. In general, it is a real-time method with minimal cost but remarkable performance among the VOT controls.

4. Experimental Results and Discussions

A 200 W boost PFC prototype is used to verify the effectiveness of the ACVOT control, which has main specifications in

Table 5. The main specifications of the prototype.

Items	Values	Items	Values
Input voltage	90–245 Vac	Lb	287 μH
Output voltage	400 Vdc	Coss	142 pF
Rated power	200 W	Cd	38 pF
Power switch	GS66508T	Ceq (Coss + Cd)	180 pF
Power diode	STPSC8H065	Cin	220 nF
Rectifier bridge	GBU6J	Cout	180 μF

. Figure 12 gives a photograph of the experimental boost PFC prototype. The control implementation diagram is the same as Figure 6. The core material of the inductor L_b is PQ20/16-3F36 from FERROXCUBE. The C_eq is derived by the C_oss and C_d capacitance given in datasheets, based on a time-related equivalent model.

The board is modularity-based. The control module uses an FPGA chip Cyclone IV EP4CE22F17C8N from INTEL. The ADC modules use LTC2314-14 chips from TI and two ADC modules are used in the prototype. A 220nF CBB capacitor is adopted for filtering near the input. An 180 μF electrolytic capacitor is adopted near the output. The high-speed comparator TLV3501 is used to generate the RESET signal.

The experimental waveforms of v_in, i_in, and i_L at 110/220 Vac with 20%/100% load are shown in Figure 13 and Figure 14 (measured with oscilloscope MDO3054 and current probe CPA300A). It is observed that there is serious input current distortion near the zero-crossing point of the input voltage under the COT control, while the distortion is obviously reduced under the ACVOT control.

It is noteworthy that the maximum value of T_{on_ACVOT}(t) is limited to 25 μs near the zero-crossing point for safety in experiments. Thus, the experiment results are slightly limited at the light load, at which time C_in also has a bigger effect. However, the light load condition is not necessary for PFC function, and the experimental results are acceptable and convincing for proving the improvement in the input current distortion.

Figure 15 gives the measured efficiency of the boost PFC prototype, and Figure 16a,b give the PF and THD charts at 110 Vac/220 Vac input with full load under the ACVOT control and the COT control (measured using the high-precision-power analyzer PA5000H). It is observed that the THD and PF are improved greatly within the entire load range at different AC input voltages under the proposed control. From Figure 16a, the input current THD is reduced to 1.4% at 110 Vac input with full load and 1.7% at 220 Vac input with full load.

Table 6 shows the comparison between the ACVOT control strategy and the previous VOT control strategies. Since [18] had relatively low THD data in the table, we also repeated the VOT control process in [18] at our board and showed the results in Figure 16a,b. Some of the differences shown between the data in Figure 16a and Table 6 are due to different prototypes used. In comparison, the proposed method achieves lower THD than other real-time control methods and achieves low THD levels close to reference [18]. It is noticed that [18] is based on a look-up table method. The difference between LUT implementation and real-time implementation can be explained. Method in [18] is roughly realized by:

• Establishing a MATLAB file to estimate the average inductance current i_{L_av} (according to all fifteen equations in Table 1 and Table 2);
• Building an iterative model to acquire a table with right on-time values, which finally fits specific sinusoidal i_{L_av} curve;
• Converting the table into a suitable storage file (satisfy different controllers of small power converter);
• Adding storage units and accessing logic to the controller;
• Adding accurate input phase detection to help table look-up.

Table 6. Comparison of the different control strategies.

Controls	ACVOT	[15]	[18]	[20]	[22]	[25]
Input line voltage	90–240 Vac	90–240 Vac	90–264 Vac	N/A	90–230 Vac	N/A
Output voltage	400 V	400 V	400 V	400 V	380 V	400 V
Rated power	200 W	200 W	160 W	30 W	200 W	100 W
Efficiency (max)	97.8%	N/A	98.35%	91.6%	97.35%	N/A
Input current THD (at rated power)	1.4% at 110 Vac	3.9% at 110 Vac	0.97% at 110 Vac	Lack of data	4.3% at 90 Vac	3.74% at 110 Vac
	1.7% at 220 Vac	Lack of data	2.9% at 220 Vac	5.6% at 220 Vac	9.8% at 230 Vac	5.5% at 220 Vac
Control method	CRM, digital Real-time	CRM/DCM, analog	CRM, digital LUT-based	CRM, digital Real-time	CRM, digital Real-time	CRM, digital Real-time

Table 6. Comparison of the different control strategies.

Controls	ACVOT	[15]	[18]	[20]	[22]	[25]
Input line voltage	90–240 Vac	90–240 Vac	90–264 Vac	N/A	90–230 Vac	N/A
Output voltage	400 V	400 V	400 V	400 V	380 V	400 V
Rated power	200 W	200 W	160 W	30 W	200 W	100 W
Efficiency (max)	97.8%	N/A	98.35%	91.6%	97.35%	N/A
Input current THD (at rated power)	1.4% at 110 Vac	3.9% at 110 Vac	0.97% at 110 Vac	Lack of data	4.3% at 90 Vac	3.74% at 110 Vac
	1.7% at 220 Vac	Lack of data	2.9% at 220 Vac	5.6% at 220 Vac	9.8% at 230 Vac	5.5% at 220 Vac
Control method	CRM, digital Real-time	CRM/DCM, analog	CRM, digital LUT-based	CRM, digital Real-time	CRM, digital Real-time	CRM, digital Real-time

The method in this article is realized by:

• Adding a several lines of the computing code (according to Equations (15) and (17)) in the prior control program).

As noted above, the easy implementation of the proposed method should be considered as a significant advantage for engineering. In summary, the ACVOT control is remarkable for its performance and easy implementation.

5. Conclusions

This paper proposes an adaptive charge-compensation-based control strategy for CRM boost PFC. The control strategy is established using the partial charge compensation algorithm and the feedback loop. A bias on-time is generated using the feedback loop. Furthermore, an extended on-time is calculated online using an algorithm to compensate the charge during the reverse inductor current stage. The above two times are added up to obtain the objective on-time, which avoids the need for numerous computing resources to directly obtain the accurate on-time. The proposed strategy improves the THD and reduces the LUT/register resources by 54%/43% in FPGA realization. Good adaptivity and robustness are shown in simulations and experiments. The input current THD is only 1.4% at the 110 Vac input with the full load and 1.7% at the 220 Vac input with the full load, supported by the 200 W prototype.