# A Family of Single-Stage, Buck-Boost Inverters for Photovoltaic Applications

^{1}

^{2}

^{3}

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Single-Stage, Buck-Boost Inverter Family

_{2}/N

_{1}. The three-windings topology in Figure 3b has an equal number of primary turns, N

_{1}= N

_{2}, and the turns ratio is defined as n = N

_{3}/N

_{1}= N

_{3}/N

_{2}. The topologies in Figure 3c,d rely on a symmetrical tapped-inductor structure with an equal turns ratio, defined as n = N

_{3}/N

_{1}= N

_{4}/N

_{2}.

_{1,}and a ground-referenced line frequency unfolding bridge, Q

_{2}–Q

_{5}. The topology in Figure 3b includes a grounded source, a ground-referenced push-pull pair of PWM switches, Q

_{1}–Q

_{2,}and a floating line frequency unfolding totem pole, Q

_{3}–Q

_{4}. The topology in Figure 3c includes a floating source, a single ground-referenced PWM switch, Q

_{1,}and a floating line frequency unfolding totem pole, Q

_{2}–Q

_{3}. The topology in Figure 3d includes a grounded source and a ground-referenced full bridge. Here, the lower switches, Q

_{1}–Q

_{3,}are PWM devices, whereas the high switch pair can perform either a simple line frequency unfolding function or be operated as synchronous rectifiers. Since the body diodes of the high switches are exploited as rectifiers, the reverse recovery capability should be considered. This can be an issue for silicon-based devices, while the emerging GaN MOSFETs can deliver the required performance.

- (1)
- Generating a grid-level AC output voltage from a relatively low DC input voltage without extra high gain DC-DC converters.
- (2)
- Having a low component count as single-stage topologies consisting of a single magnetic device and three or four switches.
- (3)
- A push-pull or half/full-bridge arrangement of the switches, where the commercial low-cost driver-integrated circuits can be easily used.

## 3. Operation Principles of the Proposed SSBBI

_{1}–Q

_{4}, in a full-bridge arrangement. A tapped inductor, L

_{cp}, with four windings was employed. The output filter capacitor here was C

_{o}and the load was an equivalent resistance, R

_{L}, for stand-alone applications. The voltage across them was the AC output, v

_{o}. As mentioned previously, two symmetrical pairs of windings were used for the tapped inductor. The turns of the primary windings must be the same, i.e., N

_{1}= N

_{2}. Similarly, equal secondary windings were used, i.e., N

_{3}= N

_{4}. The turns ratio of the tapped inductor was then obtained as n = N

_{3}/N

_{1}= N

_{4}/N

_{2}. The SSBBI can generate a bipolar output voltage with the help of the symmetrical structure, and thus, it can achieve the DC-AC inversion. The desired output voltage can be obtained using any common control strategy of a constant frequency duty cycle. The operation principle is detailed in the following.

_{1}was turned on and the state lasted for the duration of DT

_{s}. In this state, the tapped inductor was charged by the input source, V

_{in}, through the primary winding N

_{1}. The output capacitor, C

_{o}, can sustain the output voltage on the load. As shown in Figure 4b, state B began when the switch Q

_{1}was turned off and lasted for the duration of (1 − D)T

_{s}. In this state, the energy stored in the tapped inductor was discharged and released to the output side through all the four windings of the tapped inductor. During states A and B, when the output voltage was positive, Q

_{1}and Q

_{2}were switched, while the switch Q

_{3}was maintained off and Q

_{4}remained on. In comparison, the states A and B were replaced by the states A’ and B’ during the negative output half-line cycle due to the symmetrical operation principle. The equivalent circuits of state A’ and B’ are shown in Figure 4c,d, respectively.

_{Q}

_{1}–S

_{Q}

_{4}are the gating signals for Q

_{1}–Q

_{4}switches, respectively. Due to the symmetry of the SSBBI, it was sufficient to consider its operation during the positive half cycle. When Q

_{1}was turned on and Q

_{2}was turned off, the primary winding of the tapped inductor was energized. This caused the magnetizing current of the tapped inductor to ramp up. When Q

_{1}was turned off and Q

_{2}was turned on, the tapped inductor was discharged to support the output through all the windings. Thus, the magnetizing current of the tapped inductor ramped down. Notably, in terms of control of the converter, in grid-tied applications, the task of the control circuit is to shape the average output current, I

_{o}, into a sinusoidal waveform (see i

_{N4}in Figure 5), while the controller should regulate the output voltage in stand-alone applications.

## 4. Analysis and Design Considerations of the Proposed SSBBI

#### 4.1. CCM Voltage Gain

_{cp}, was charged by the input voltage source, V

_{in}, only through the primary winding N

_{1}or N

_{2}during the time of DT

_{s}(state A or A’). However, the output voltage, v

_{o}was stressed on all the four windings of the tapped inductor during the time of (1 − D)T

_{s}(state B or B’). Thus, according to the volt-sec balance, it gives

#### 4.2. Turns Ratio and Duty Cycle Constraints

_{in}. Accordingly,

_{max}, should be limited to

#### 4.3. Voltage and Current Stress

#### 4.3.1. Voltage Stress of Switches

_{in}, was imposed on the primary winding N

_{1}of the tapped inductor when the switch Q

_{1}was on. Therefore, the voltage stress on the switch Q

_{3}was the sum of the input voltage and the induced voltage across the primary winding N

_{2}, which was twice the input voltage, V

_{in}as

_{4}was in on-state, the voltage across the four windings of the tapped inductor as well as the output voltage, v

_{o}, was stressed on the off-state switch Q

_{2}. Thus, the maximum stress of the Q

_{2}will lead to:

_{1}and Q

_{4}in state A’ because of the symmetrical operation of the SSBBI. The voltage stresses for all the switches are summarized in Table 4.

#### 4.3.2. Analysis of Current Stress

_{o}(t)〉 = i

_{Q}

_{2}(t)[1 − d(t)], as shown in Figure 6. Therefore, assuming that the current ripples are negligible, the current amplitude of the switch Q

_{2}can be obtained by combining Equations (9) and (11) as

_{2}at the peak output voltage can be obtained as

_{2}within a switching period is:

_{2}is obtained as

_{1}is 2(n + 1) times higher than the upper switch current due to the function of the tapped-inductor turns ratio, n. Thus,

_{1}, is:

_{s}, is:

## 5. Simulation Results and Comparison

#### 5.1. Basic System Operation

_{o}= 200 W, input voltage V

_{in}= 48 V, output voltage v

_{o}= 110 V/60 Hz, switching frequency f

_{s}= 20 kHz, tapped-inductor magnetizing inductance L

_{m}= 150 μH, turns ratio n = 1.5, and output capacitance C

_{o}= 2 μF. Several control strategies can be applied to control the proposed SSBBI. Initially, to validate the basic operational principle, the simple open-loop SPWM was used. Simulation results are shown in Figure 7, which demonstrates that the SSBBI can generate the desired output voltage. This provides proof of concept of the proposed circuit family for single-stage microinverter applications.

#### 5.2. Comparison of the Proposed Single-Stage, Buck-Boost Inverter Family

## 6. Experimental Results and Discussion

#### 6.1. Experimental Results of SSBBI

_{in}= 48 V; output voltage, v

_{o}= 110 V/60 Hz; and switching frequency, f

_{s}= 20 kHz. The prototype’s view and the components arrangement are shown in Figure 10. The board was designed larger to reserve additional space needed for experimenting with various snubbers and control schemes. The main components of the prototype are summarized in Table 9. The tapped inductor was designed according to the design guide provided by Magnetics-Inc [31], including the magnetic core, the turns, and the wire. A dSPACE system was used to implement the control for the quick experimental study of the SSBBI.

#### 6.2. Comparison of the SSBBI and the State of the Art

## 7. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## Nomenclature

n | Turns ratio of the tapped inductor |

N_{1}, N_{2}, N_{3}, N_{4} | Windings of the tapped inductor |

Q_{1}, Q_{2}, Q_{3}, Q_{4}, Q_{5} | Switches (MOSFETs) |

D_{1}, D_{2} | Diodes |

L_{cp} | Tapped inductor |

R_{L} | Equivalent load resistance |

C_{o} | Output capacitor |

V_{in} | Input voltage |

i_{in} | Input current |

v_{o} | Output voltage |

i_{o} | Output current |

v_{ds}_{1}, v_{ds}_{2}, v_{ds}_{3}, v_{ds}_{4} | Drain-source voltage of the switches Q_{1}–Q_{4} |

i_{ds}_{1}, i_{ds}_{2}, i_{ds}_{3}, i_{ds}_{4} | Currents through the switches Q_{1}–Q_{4} |

D | Duty cycle |

T_{s} | Switching period |

i_{N}_{1}, i_{N}_{2}, i_{N}_{3}, i_{N}_{4} | Currents through the windings |

S_{Q}_{1}, S_{Q}_{2}, S_{Q}_{3}, S_{Q}_{4} | Gating signals the switches Q_{1}–Q_{4} |

I_{o} | Average output current |

M | Voltage gain |

V_{o}_{max} | Maximum output voltage |

D_{max} | Maximum duty ratio |

V_{Q}_{1max}, V_{Q}_{2 max}, V_{Q}_{3 max}, V_{Q}_{4 max} | Voltage stress on the switches Q_{1}–Q_{4} |

v_{o}(t) | Time-varying output voltage |

i_{o}(t) | Time-varying output current |

V_{m} | Peak output voltage |

I_{m} | Peak output current |

ω | Angular frequency |

d(t) | Time-varying duty ratio |

I_{Q}_{1max}, I_{Q}_{2max} | Maximum current of the switch Q_{1}, Q_{2} |

${i}_{Q1rmsTs}^{2}$, ${i}_{Q2rmsTs}^{2}$ | Squared RMS current of the switch Q_{1}, Q_{2} within a switching period |

${I}_{Q1rms}^{2}$, ${I}_{Q2rms}^{2}$ | Squared RMS current of the switch Q_{1}, Q_{2} |

I_{Q}_{1rms}, I_{Q}_{2rms} | RMS current of the switch Q_{1}, Q_{2} |

f_{s} | Switching frequency |

L_{m} | Tapped-inductor magnetizing inductance |

## Abbreviations

DC | Direct current |

AC | Alternating current |

PV MIE/MIC | Photovoltaic Module-integrated electronic/converter |

MPPT | Maximum power point tracking |

SEPIC | Single ended primary inductor converter |

PWM MOSFET | Pulse width modulation Metal oxide semiconductor field-effect transistor |

GaN | Gallium nitride |

SSBBI | Single-stage, buck-boost inverter |

CCM | Continuous conduction mode |

SPWM | Sinusoidal pulse width modulation |

THD RMS | Total harmonic distortion Root mean square |

RCD | Resistor-capacitor-diode |

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**Figure 3.**Proposed family of single-stage, buck-boost inverters: (

**a**) Variant 1, (

**b**) Variant 2, (

**c**) Variant 3, (

**d**) Variant 4 (SSBBI).

**Figure 4.**Equivalent circuits (switching states) of the proposed SSBBI: (

**a**) State A, (

**b**) State B, (

**c**) State A’, (

**d**) State B’.

**Figure 6.**Illustration of the switch current, i

_{Q}(t), and the average output current, <i

_{o}(t)>, throughout the half-line cycle.

**Figure 7.**Key simulation waveforms of the proposed SSBBI: (

**a**) Driving signal and currents on the switching period scale; (

**b**) driving signals for switches; (

**c**) V

_{ds}of the switches in one leg, input, and output voltage; (

**d**) switch currents on the output period scale.

**Figure 9.**Comparison of the voltage conversion ratio, M, of the proposed single-stage inverter family: (

**a**) As function of the duty ratio D (for n = 2), (

**b**) as function of the turn ratio n (for D = 0.5).

**Figure 11.**SSBBI’s driving signals: (

**a**) At the line period scale, (

**b**) during positive half-line cycle (at switching period scale), (

**c**) negative half-line cycle (at switching period scale).

**Figure 12.**Experimental waveforms of V

_{ds}

_{2}, V

_{ds}

_{1}, V

_{in}, and v

_{o}: (

**a**) At the line period scale, (

**b**) at the switching period scale.

Ref. | Switches Count | Diodes Count | Inductors Count | Input Voltage | Output Voltage | Output Power | Efficiency |
---|---|---|---|---|---|---|---|

[22] | 4 | 8 | 4 | 20 V | 314 V | 100 W | / |

[23] | 8 | 0 | 1 Tapped | 100–200 V | 110 V | 500 W | >96% |

Figure 2b [24] | 8 | 0 | 1 Tapped | 40 V | 230 V | / | / |

[25] | 5 | 2 | 1 Tapped | 60 V | 230 V | 100 W | 86% |

Switches | Positive Output Voltage | Negative Output Voltage | ||
---|---|---|---|---|

State A | State B | State A’ | State B’ | |

Q_{1} | On | Off | Off | Off |

Q_{2} | Off | On | On | On |

Q_{3} | Off | Off | On | Off |

Q_{4} | On | On | Off | On |

Switches | Voltage Stress | Current Stress | |
---|---|---|---|

Peak | RMS | ||

Q_{1}, Q_{3} | 2V_{in} | $2\left(n+1\right){I}_{m}+\frac{{I}_{m}{V}_{m}}{{V}_{in}}$ | ${I}_{acrms}\sqrt{\frac{3}{8}\frac{{V}_{m}^{2}}{{V}_{in}^{2}}+\frac{8}{3\pi}\frac{\left(n+1\right){V}_{m}}{{V}_{in}}}$ |

Q_{2}, Q_{4} | 2(n+1)V_{in}+V_{o}_{max} | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{2\left(n+1\right){V}_{in}}$ | ${I}_{acrms}^{}\sqrt{1+\frac{4}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ |

Topology | Voltage Gain M = v_{o}/V_{in} |
---|---|

Figure 3a | ${M}_{a}=\left(n+1\right)\frac{D}{1-D}$ |

Figure 3b | ${M}_{b}=\left(n+2\right)\frac{D}{1-D}$ |

Figure 3c | ${M}_{c}=\frac{\left(n+1\right)}{2}\frac{D}{1-D}$ |

SSBBI | $M=2\left(n+1\right)\frac{D}{1-D}$ |

Topology | Voltage Stress | ||
---|---|---|---|

Low Side Switches | High Side Switches | Diodes | |

Figure 3a | ${V}_{in}+\frac{{V}_{o\mathrm{max}}}{n+1}$ | V_{o}_{max} | (n+1)V_{in}+V_{o}_{max} |

Figure 3b | 2V_{in} | (n+2)V_{in}+V_{o}_{max} | (n+2)V_{in}+V_{o}_{max} |

Figure 3c | ${V}_{in}+\frac{2{V}_{o\mathrm{max}}}{n+1}$ | 2V_{o}_{max} | $\frac{\left(n+1\right){V}_{in}}{2}+{V}_{o\mathrm{max}}$ |

SSBBI | 2V_{in} | 2(n+1)V_{in}+V_{o}_{max} | / |

Topology | Peak Current Stress | ||
---|---|---|---|

Low Side Switches | High Side Switches | Diodes | |

Figure 3a | $\left(n+1\right){I}_{m}+\frac{{I}_{m}{V}_{m}}{{V}_{in}}$ | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{\left(n+1\right){V}_{in}}$ | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{\left(n+1\right){V}_{in}}$ |

Figure 3b | $\left(n+2\right){I}_{m}+\frac{{I}_{m}{V}_{m}}{{V}_{in}}$ | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{\left(n+2\right){V}_{in}}$ | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{\left(n+2\right){V}_{in}}$ |

Figure 3c | $\frac{\left(n+1\right)}{2}{I}_{m}+\frac{{I}_{m}{V}_{m}}{{V}_{in}}$ | ${I}_{m}^{}+\frac{2{I}_{m}{V}_{m}}{\left(n+1\right){V}_{in}}$ | ${I}_{m}^{}+\frac{2{I}_{m}{V}_{m}}{\left(n+1\right){V}_{in}}$ |

SSBBI | $2\left(n+1\right){I}_{m}+\frac{{I}_{m}{V}_{m}}{{V}_{in}}$ | ${I}_{m}^{}+\frac{{I}_{m}{V}_{m}}{2\left(n+1\right){V}_{in}}$ | / |

Topology | RMS Current Stress | ||
---|---|---|---|

Low Side Switches | High Side Switches | Diodes | |

Figure 3a | ${I}_{acrms}\sqrt{\frac{3}{4}\frac{{V}_{m}^{2}}{{V}_{in}^{2}}+\frac{8}{3\pi}\frac{\left(n+1\right){V}_{m}}{{V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{\frac{1}{2}+\frac{4}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{1+\frac{8}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ |

Figure 3b | ${I}_{acrms}\sqrt{\frac{3}{8}\frac{{V}_{m}^{2}}{{V}_{in}^{2}}+\frac{4}{3\pi}\frac{\left(n+2\right){V}_{m}}{{V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{\frac{1}{2}+\frac{4}{3\pi}\frac{{V}_{m}}{\left(n+2\right){V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{\frac{1}{2}+\frac{4}{3\pi}\frac{{V}_{m}}{\left(n+2\right){V}_{in}}}$ |

Figure 3c | ${I}_{acrms}\sqrt{\frac{3}{4}\frac{{V}_{m}^{2}}{{V}_{in}^{2}}+\frac{4}{3\pi}\frac{\left(n+1\right){V}_{m}}{{V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{\frac{1}{2}+\frac{8}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{\frac{1}{2}+\frac{8}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ |

SSBBI | ${I}_{acrms}\sqrt{\frac{3}{8}\frac{{V}_{m}^{2}}{{V}_{in}^{2}}+\frac{8}{3\pi}\frac{\left(n+1\right){V}_{m}}{{V}_{in}}}$ | ${I}_{acrms}^{}\sqrt{1+\frac{4}{3\pi}\frac{{V}_{m}}{\left(n+1\right){V}_{in}}}$ | / |

Components | Value/Model |
---|---|

High side switches | IPW90R340C3 |

Low side switches | IPW65R125C |

Driver ICs | 1EDI20N12AF |

Primary magnetizing inductance | 100 μH |

Inductor core | 55439A2 |

Inductor Turns | 30/45 |

Output capacitor | 2.2 μF |

© 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Zhao, B.; Abramovitz, A.; Liu, C.; Yang, Y.; Huangfu, Y.
A Family of Single-Stage, Buck-Boost Inverters for Photovoltaic Applications. *Energies* **2020**, *13*, 1675.
https://doi.org/10.3390/en13071675

**AMA Style**

Zhao B, Abramovitz A, Liu C, Yang Y, Huangfu Y.
A Family of Single-Stage, Buck-Boost Inverters for Photovoltaic Applications. *Energies*. 2020; 13(7):1675.
https://doi.org/10.3390/en13071675

**Chicago/Turabian Style**

Zhao, Ben, Alexander Abramovitz, Chang Liu, Yongheng Yang, and Yigeng Huangfu.
2020. "A Family of Single-Stage, Buck-Boost Inverters for Photovoltaic Applications" *Energies* 13, no. 7: 1675.
https://doi.org/10.3390/en13071675