One Cycle Control of a PWM Rectifier a New Approach

Abstract

This paper analyzes a Digital Signal Processor (DSP) based One Cycle Control (OCC) strategy for a Power Factor Corrector (PFC) rectifier with Common-mode Voltage (CMV) immunity. It is proposed a strategy that utilizes an emulated-resistance-controller in closed-loop configuration to set the dc-link voltage to achieve unity power factor (UPF). It is shown that if the PFC can achieve UPF condition and if the phase voltage is only affected by CMV, then phase current is free from CMV, as well as a lead-lag compensator (LLC) to average phase current.

1. Introduction

One-Cycle Control (OCC)is a nonlinear control theory proposed by [1] able to control switching converters with only one switching cycle. The controller achieves instantaneous dynamic control of an average value of the switching variables after a transient. The most important feature of OCC is the control of the carrier amplitude, in contrast to Pulse Width Modulation, which controls the variable. The OCC technique provides: low complexity, low-cost implementation, disturbance rejection, robustness, good stability and fast dynamic response. OCC based controllers have been widely used to control power factor correction and it has been applied in modular multilevel converters [2], grid-tied single-stage buck-boost DC-AC micro-inverters [3], Vienna Rectifiers [4], novel multi-converter-based unified power quality conditioners (MCB-UPQC) [5] and analysis of harmonics, energy consumption and power quality of light-emitting diode lamps equipped in building lighting systems [6]. The literature also presents a novel, two-stage and hybrid approach based on variational mode decomposition (VMD) and the deep stochastic configuration network (DSCN) for power quality (PQ) disturbances detection and classification in power systems [7]. In the field of power quality, two of the most significant concerns are harmonic currents and power factor (PF) caused by nonlinear loads. While the former may cause false triggering of protection devices and bad functioning of motors and transformers, the later reduces available active power at the utility grid. The past few decades have witnessed extensive studies on power quality, mainly to satisfy specific standards, i.e., IEEE 519-1992 [8], which recommend limiting harmonics distortion. In order to solve these issues for end-consumer, a PWM rectifier can be used to substitute each nonlinear load by an active resistance seen from the utility grid [9]. Hence, this rectifier always tries to achieve unity power factor. If the grid voltage is sinusoidal, then the current drawn by the rectifier must be sinusoidal and in phase with the voltage, avoiding any current harmonics. Several methods have been proposed to achieve UPF in PWM rectifiers based on the enhanced control-loops concept [10], such as: inner current loop, instantaneous power loop and outer voltage loop. To force the phase-current to follow voltage loop reference it is necessary to sense three-phase voltages, a DC-link voltage, three-phase currents [11] and in some cases, the use of a phase-locked loop (PLL) to guarantee voltage and current synchronization [12]. The control techniques based on this concept use space vector modulation (SVM), Park/Clarke transformations and control coupled terms such as: voltage oriented control (VOC) [13], direct power control (DPC) [14], model predictive control (MPC) [15], deadbeat control [16], fuzzy control [17] and neural networks [18]. Nevertheless, these methods are time-consuming, as they rely on system parameters, requiring complicated online calculation. Resistance-emulation is another technique employed in PWM rectifiers, generally using average value and PWM modulators. In this technique is always assumed that UPF is already achieved. There are two main methods based on open-loop and closed-loop controls [9]. Open-loop methods control the estimated emulated-resistance assuming a fixed value [19] while closed-loop methods adjust the emulated-resistance value by feedback [20]. Although these techniques were proposed for single-phase boost converters with diode rectifiers, they are complicated to implement as they employ the four arithmetical operations.

The One Cycle Control is a kind of open-loop method, originally proposed as a hardware technique [21] (Figure 1a) implemented either by a few commercials ICs or just a single chip as a cost-effective solution. It uses a variable sawtooth-carrier-amplitude (Figure 1b) and only adding and subtracting operations, contributing to its arithmetic simplicity and performing its control tasks in the only one switching cycle, therein the name OCC, despite this technique was also proposed for three-phase, six power-switches boost-converter. The OCC technique does not use neither phase-locked-loop (PLL) nor Park/Clarke transformations, which allows a fast dynamic system response while satisfying the UPF condition. Moreover, it eliminates the need of three grid-voltage sensors, which adds control and hardware simplicity. Although this technique was applied several times in active power filters (APF) [22,23], in flexible ac transmission systems (FACTs) [24] and in photovoltaic grid-connected inverters (GCI) [25,26,27], the OCC has presented such serious instability problems [21,28,29]. To solve these issues it was necessary to add extra circuitry sacrificing control and hardware simplicity.

In order to preserve the control and hardware simplicity, the OCC was emulated in a DSP system. A DSP-based software-OCC was proposed in [30] based on the scheme shown on the Figure 1c. This version enhances OCC with DSP calculation capability and uses closed-loop resistance emulation. Then, the software offers more possibilities to apply the OCC to the most complex control issues than those of hardware [31,32,33]. Besides, unlike enhanced-loops methods mentioned above [11,12,13,14,15,16,17,18] The software-OCC does not use PLL, Park/Clarke transformations or online parameter calculations, therefore, it achieves some control simplicity. However, it was not reported any further analysis, in spite DSPs have already applicated to OCC as a control core, i.e., for motor drivers [34,35] and photovoltaics [27], while OCC runs as a sort of auxiliary circuit. Previous treatments to solve stability problems at no-load have sacrificed OCC simplicity once they use an additional bulky resistor at DC-link [21,29]. Instead, in order to decrease current distortion, an artificial phase-current was created [36,37,38]. However, despite the efforts, instability remains when load current falls below a certain limit [24,39,40]. On the other side, due to a lack of PLL synchronization, OCC has experienced PF derating at high-load [21,29,37,38,39]. To avoid this, OCC has sacrificed its simplicity again as they use input voltage multiplexers, and other additional analog and logic circuits [23,24,39,40,41], requiring the knowledge of 600 angular sectors and to select positive and negative peak voltages as reference current vectors. In [28,42], it was also necessary to sacrifice OCC simplicity by adding a few analog multipliers and heavy and bulky inductors (10 mH), but sacrificing the cost-effectiveness of OCC solution. Hence, despite all the efforts, it is apparent that, to date, OCC has been not able, whatsoever, to solve its own problems fully. Above all, even though a few hardware methods have solve partially OCC stability issues at no-load [21,36,37,38,42] and at high-load [28,39,40,41], they were never reported working together over a wide load range. Thus, one of the paper’s major contributions is to present a simple and stable DSP based OCC system working at no-load and high-load considering that the proposed digital implementation presents improvements relationed to hardware-OCC systems. Thus, one of the paper’s major contributions is to present a simple and stable OCC system working at no-load and high-load.

In this paper, analysis, simulation, and experimental results prove, based on the resistance-emulated controller [30], that software-OCC does not possess instability issues and preserves OCC simplicity and dynamical response, also satisfying UPF condition. The paper is organized as follows: Section 2 presents a review of software-OCC fundamentals. Section 3 shows OCC issues and discusses software-OCC solving method. Section 4 depicts DSP implementation and discusses the cost-effectiveness of software-OCC. Simulation and experimental results are shown in Section 5. Conclusions are shown in Section 6.

2. Fundamentals of Software-OCC

Software-OCC is a PWM, where an average phase-current compares to carrier and control system is integrated into the modulator, similar to hardware-OCC of (Figure 1c) [21]. Nevertheless, unlike hardware-OCC, this version is not a circuit, but a software. Hence, software-OCC implements OCC features by programming embedded DSP devices and using just a few equations. However, a high-performance OCC system is obtained, as using a high-frequency DSP, the one switching-cycle control can be guaranteed. (Figure 2) displays a three-phase, IGBT PWM rectifier. As in hardware-OCC, it is assumed that,

• The switching frequency $f_C$ is much higher than line frequency f, hence the switching period $T_C$ is much lower than the line period T, so $f_C>>f$ and $T_C<<T$.
• The switches in each leg operate in a complementary fashion, i.e., the duty cycle for the upper and bottom switch is $d_g$ and $d_{gn}=(1-d_g)$, respectively ($g=a,b,c$), $0<d_g<1$.
• Input impedance seen from the grid is a resistance, similar to the resistance emulation concept in [9]. Besides, software-OCC, (Figure 1c), presents the following differences from hardware-OCC.

(i)

Multipliers and dividers presence, as they are not much DSP time-consuming [43].

(ii)

The average method, i.e., a LLC (Figure 1c) decreases the delay response caused by the lagging part, using a leading constant.

(iii)

Carrier generation uses a triangular waveshape, (Figure 1d), instead of a sawtooth carrier in the hardware OCC.

(iv)

Fixed amplitude carrier due of a software DSP limitation.

(v)

Closed-loop emulated resistance-control, guaranteeing UPF by feedback.

(vi)

Use of limiters at resistance control output.

Except for the item (iv), these differences result of the superior software-DSP-calculation capability over hardware technique.

Applying Kirchhoff voltage law to the $r-L$ branch in the Figure 2, where r is inductor resistance, L is inductor inductance; $v_{Sg}$ and $i_g$ are grid voltage and phase current, respectively; $v_{GN}$ is pole voltage $(G=A,B,C)$, O is the middle point of dc-link capacitors $C_1$ and $C_2$, $v_{NO}$ is the voltage between neutral of the utility grid and middle point O of dc-link voltage, and $V_0$ and $I_0$ are load voltage and current respectively.

$$\begin{array}{ccc}\hfill v_{Sa}-r{i}_a-L\frac{d{i}_a}{dt}& =\hfill & \hfill v_{AN}+v_{NO}\\ \hfill v_{Sb}-r{i}_b-L\frac{d{i}_b}{dt}& =\hfill & \hfill v_{BN}+v_{NO}\\ \hfill v_{Sc}-r{i}_c-L\frac{d{i}_c}{dt}& =\hfill & \hfill v_{CN}+v_{NO}\end{array}$$

(1)

Analysis of Voltage $v_{NO}$

The expressions given by (1), it is apparent that to obtain an exact expression for phase-current, it is necessary to find an analytical expression for voltage $v_{NO}$. However, although some previous works indicate that this voltage does not depend on grid frequency [13,44], the mathematical proof is missing. It is always possible to bypass the problem by assuming some control strategy, as it allows additional simplifications [45,46]. Hence, considering a balanced system:

$$\begin{array}{ccc}\hfill v_{Sa}+v_{Sb}+v_{Sc}& =& 0\hfill \\ \hfill i_a+i_b+i_c& =& 0\hfill \end{array}$$

(2)

Grid voltages are given by:

$$\begin{array}{c}\hfill v_{Sa}=V_{p}cos\omega t\\ \hfill v_{Sb}=V_{p}cos(\omega t-\frac{2\pi }{3})\\ \hfill v_{Sc}=V_{p}cos(\omega t+\frac{2\pi }{3})\end{array}$$

(3)

where $V_p$ is voltage amplitude, $V_p>0$. Although OCC does not use references [21,40], for mathematical purposes, it could be useful to admit grid voltage (3), as a virtual phase-current reference, as phase-current has the same waveshape and in phase with of the grid voltages. In addition, considering a balanced system, given by (2), and manipulating (1):

$$\begin{array}{ccc}\hfill v_{NO}& =& \frac{-1}{3}(v_{AN}+v_{BN}+v_{CN})\hfill \end{array}$$

(4)

The Equation (4) says that voltage $v_{NO}$ is related to pole voltage. In this way, finding an analytical expression for $v_{NO}$ could be long and tedious as in a PWM modulator, pole voltage depends on Bessel functions and Fourier series [47]. From the Equation (4), the average $v_{N0}$ is:

$$\begin{array}{ccc}\hfill \frac{1}{T_C}{\int }_0^{T_C}{v}_{NO}dt& =& \frac{-1}{3T_C}({\int }_0^{T_C}{v}_{AN}dt+{\int }_0^{T_C}{v}_{BN}dt+{\int }_0^{T_C}{v}_{CN}dt)\hfill \end{array}$$

(5)

To find the average pole voltage (Figure 2) it should be noted that:

$$\begin{array}{ccc}\hfill \frac{1}{T_C}{\int }_0^{T_C}{v}_{GN}dt& =& \frac{1}{T_C}{\int }_0^{T_C}{v}_{GM}dt-\frac{V_0}{2}\hfill \end{array}$$

(6)

Since average value of pole voltage $v_{GN}$ over switching period is given by (see Figure 3):

$$\begin{array}{ccc}\hfill \frac{1}{T_C}{\int }_0^{T_C}{v}_{GN}dt& =& \frac{1}{T_C}[{\int }_0^{t_{gn}}{V}_{0}dt+{\int }_{t_{gn}}^{T_C}0dt]=V_0{d}_{gn}\hfill \end{array}$$

(7)

where $t_{gn}=d_{gn}{T}_C$. Hence, combining (6) and (7):

$$\begin{array}{ccc}\hfill \frac{1}{T_C}{\int }_0^{T_C}{v}_{GN}dt& =& \frac{V_0}{2}(1-2d_{gn})\hfill \end{array}$$

(8)

Moreover, as duty cycle in a PWM modulator is proportional to its reference (3), provided that $f_C>>f$ [47]:

$$\begin{array}{c}\hfill d_{gn}=D_{p}cos(\omega t+\varphi )\end{array}$$

(9)

where $0<D_p<1$, $\varphi$ is such that, $\varphi =0$ for $g=a,\varphi =\frac{-2\pi }{3}$ for $g=b$ and $\varphi =\frac{2\pi }{3}$ for $g=c$. Then, combining (5), (8) and (9) yields:

$$\begin{array}{ccc}\hfill \frac{1}{T_C}{\int }_0^{T_C}{v}_{NO}dt& =& \frac{-V_0}{2}\hfill \end{array}$$

(10)

A common assumption in hardware OCC is that the current ripple is small and that inductor current works in current continuous mode, (CCM) [21], so phase-current is proportional to its average value. Thereby, using this assumption in software-OCC, phase-current can be written as:

$$\begin{array}{ccc}\hfill i_g& =& \frac{K}{T_C}{\int }_0^{T_C}{i}_g(\gamma )d\gamma \hfill \end{array}$$

(11)

where K is proportionality constant. Then, for $t>0$,

$$\begin{array}{ccc}\hfill td{i}_g(t)& =& K{\int }_0^t{i}_g(\gamma )d\gamma \hfill \end{array}$$

(12)

differentiating former equation:

$$\begin{array}{ccc}\hfill t\frac{d{i}_g}{dt}& =& (K-1)i_g\hfill \end{array}$$

(13)

combining (1) and (13):

$$\begin{array}{c}\hfill v_{Sg}-r{i}_g-\frac{L}{t}(K-1)i_g=v_{GN}-v_{NO}\end{array}$$

(14)

As input impedance seen from the utility grid is assumed a resistance (condition c):

$$\begin{array}{ccc}\hfill v_{Sg}& =& R_{in}^0{i}_g\hfill \end{array}$$

(15)

where $R_{in}^0$ is assumed input resistance seen from the grid. This resistance is based on loss-free resistor concept [48], since it transfers all energy from the input to the output port and does not dissipate active power. Denoting $r^{\prime }=(K-1)\frac{L}{t}$, where K is a constant ($K>1$), and combining (14) and (15):

$$\begin{array}{ccc}\hfill R_{in}{i}_g& =& v_{GN}-v_{NO}\hfill \end{array}$$

(16)

$$\begin{array}{ccc}\hfill R_{in}& =& R_{in}^0-(r+r^{\prime })\hfill \end{array}$$

(17)

Likewise, resistance $R_{in}$ is input resistance seen from the grid. Nonetheless, this is the final resistance which is controlled by software-OCC (21) [30,32]. Averaging Equation (16), it leads to:

$$\begin{array}{ccc}\hfill R_{in}\frac{1}{T_C}{\int }_0^{T_C}{i}_{g}dt& =& \frac{1}{T_C}{\int }_0^{T_C}{v}_{GN}dt-\frac{1}{T_C}{\int }_0^{T_C}{v}_{NO}dt\hfill \end{array}$$

(18)

Combining the Equations (8), (10) and (18):

$$\begin{array}{ccc}\hfill R_{in}{i}_{gs}& =& -V_0(1-d_{gn})\hfill \end{array}$$

(19)

where $i_{gs}$ is average phase-current. The right term of the former equation is the variable amplitude of the hardware-OCC carrier. The negative signal means that the carrier comes from $-V_0$ to 0 ($d_{gn}=1$).

The former equation is consistent to emulated resistance concept, as that resistance was assumed since operation beginning [9]. Furthermore, this constitutes a classical OCC equation as it achieves the same level of OCC simplicity, i.e., it uses a sawtooth carrier and does not employ coupled terms, nor Park/Clarke transformations [21,40]. In addition, emulated resistance $R_{in}$ satisfies:

$$\begin{array}{ccc}\hfill v_{Sg}& =& R_{in}{i}_g\hfill \end{array}$$

(20)

In order to ensure that resistance is seen from the grid, satisfying condition c, $R_{in}$ can become a $V_0$ voltage controller. So if $R_{in}$ is a $V_0$ controller, it also controls active power P as it depends on $V_0$, since $P=V_0{I}_0$, where $I_0$ is load current, Figure 2. Resistance $R_{in}$ also controls power factor indirectly, since active power (P), reactive power (Q) and apparent power (S) are related by the expression $S=\sqrt{P^2+Q^2}$. In this sense, as S is fixed, if power P is set to a relatively high value (close to S), reactive power Q should be close to zero:

$$\begin{array}{ccc}\hfill R_{in}& =& K_p(V_0^{\ast }-V_0)+K_I\int (V_0^{\ast }-V_0)dt\hfill \end{array}$$

(21)

where $V_0^{\ast }$ is load voltage reference, $K_p$, $K_I$ are proportional and integrative $PI$ constants, respectively. PI constants are positive $K_p>0$, $K_I>0$, to guarantee that $R_{in}>0$, when $V_0^{\ast }>V_0$. $R_{in}$ controller, name as emulated resistance controller, leads to a resistive impedance seen from the grid. Moreover, in frequency domain $R_{in}$ controller can be expressed as a function of load voltage error $(V_0^{\ast }-V_0)$:

$$\begin{array}{ccc}\hfill R_{in}& =& (V_0^{\ast }-V_0)(K_{p1}+\frac{K_{I1}}{s})\hfill \end{array}$$

(22)

According to Equation (19), the average current multiplied by $R_{in}$ is compared to variable amplitude carrier, $V_0{A}_{tri}(t)$, where carrier $A_{tri}(t)=-(1-d_g)$. This could be the essence of the OCC method when implemented by hardware since a variable carrier amplitude s a hardware-OCC characteristic [21,36]. However, as the goal of the system is a software implementation, therefore, DSP characteristics must be included. In this order, it would be useful to modify classical software-OCC modulator, (19) to:

$$\begin{array}{ccc}\hfill q_{gn}& =& \left\{\begin{array}{cc}1,& when{i}_{gs}.R_{in}\ge V_0.A_{tri}(t)\\ 0,& otherwise\end{array}\right.\hfill \end{array}$$

(23)

where $q_{gn}$ is the logical state at the gate of lower switch of power converter shown in Figure 1a. Yet, as DC-link voltage is positive, $V_0>0$, former relation can be modified as:

$$\begin{array}{ccc}\hfill q_{gn}& =& \left\{\begin{array}{cc}1,& when\frac{(i_{gs}{R}_{in})}{V_0}\ge A_{tri}(t)\\ 0,& otherwise\end{array}\right.\hfill \end{array}$$

(24)

The relationships (23) and (24) are equivalent, once generate the same firing pulses. The relationship represents OCC variable-amplitude carrier Figure 4a while the former is adequate for DSP manipulation, as we willl see later in Section 4. Besides, it resembles a PWM modulator with zero-sequence injection producing Space Vector PWM, (SVPWM [49]), or phase-clamping [50], but without phase-current distortion.

3. Occ Stability Analysis

There is no simple method to analyze hardware-OCC stability by conventional control theory, as this technique is all except conventional, once control and hardware are integrated, while in software-OCC control and hardware are implemented and integrated by software. There are two main stability issues reported in hardware-OCC, at no-load [21,29,36], and high-load [28]. This situations were adressed using a hardware analysis instead of traditional control theory once the OCC instability is provoked by over modulation [21] and hardware limitations and not by poles or zeros misplacement. Stability issues in hardware-OCC can be solved by using an emulated-resistance controller $R_{in}$ of software-OCC [30] and maximum and minimum limiters (Figure 5). The next subsection presents a model based on emulated-resistance control, which explains the hardware-OCC instability and software-OCC solutions to the problem.

3.1. Hardware-OCC Theoretical Background

In hardware-OCC, voltage $V_m$ is a PI controller of DC voltage, given by [21]:

$$\begin{array}{ccc}\hfill V_m& =& (V_0^{\ast }-V_0)(K_{p1}+\frac{K_{I1}}{s})\hfill \end{array}$$

(25)

where $V_m$ is the carrier amplitude controller, in frequency domain, $V_m$ is defined by [21]:

$$\begin{array}{ccc}\hfill V_m& =& \frac{K_1{R}_s{V}_0}{R_{in1}}\hfill \end{array}$$

(26)

where $K_1$ is a parameter, $(\frac{V_{Sg}}{V_0}<K_1<1+\frac{V_{Sg}}{V_0})$; $R_S$ is current sensor resistance $(R_S=1$ $\mathsf{\Omega })$ and $R_{in1}$ is emulated resistance [21]. In addition, as in hardware-OCC firing pulses can be defined as:

$$\begin{array}{ccc}\hfill q_{gnh}& =& \left\{\begin{array}{cc}1,& when{i}_{gs}\ge v_m.A_{tri}(t)\\ 0,& otherwise\end{array}\right.\hfill \end{array}$$

(27)

where $q_{gnh}$ is the logical state at the gate of lower switch of power converter, $A_{trih}$ is fixed carrier amplitude. The former equation represents the hardware-OCC modulator since modulating wave is compared to a variable-amplitude carrier, controlled by $V_m$ (25). Note that this carrier leads to a multiplication operation, despite OCC arithmetic simplicity. Besides, as for a PWM rectifier, as shown in (Figure 2), average dc voltage $V_0$ has a voltage ripple $V_{0r}$ related to its peak value $V_{0p}$ [51], (see Figure 5). Hence

$$\begin{array}{ccc}\hfill V_0& =& V_{0p}-\frac{I_0}{8C}{T}_{SW}\hfill \end{array}$$

(28)

where $V_{0r}=\frac{-I_0}{8C}$, $I_0$ is the DC-link current; $R_L$ is dc-link load; $I_0=\frac{V_0}{R_L}$; C the DC-link equivalent capacitor, $C=\frac{C_1{C}_2}{(C_1+C_2)}$, $T_{SW}$ is switching time period, $T_{SW}=2T_0$, $T_0$ is time period between peaks of voltage ripple. Although dc-link capacitor C is assumed large that voltage ripple is neglected and hence average and peak DC-link values are the same [51]. Yet, for practical values of capacitance, only Equation (28) is valid.

3.2. Hardware-OCC Issues

In principle the control technique with hardware-OCC offers a simple solution in terms of hardware, control and arithmetic, however, every system connected to the network needs synchronization, and the lack of synchronization may result in instability and power factor reduction. In order to overcome this situation, the carrier with variable amplitude was created, but at the cost of instability in the system without load.

Stability at no-load: in general in a PWM rectifier the output power $P_0$ equals input power $P_T$ minus power losses, $P_L$, ($P_0=P_T-P_L$). Then, admitting a proportionality factor ($K_3$) between power losses and input power:

$$\begin{array}{ccc}\hfill P_0& =& K_3{P}_T\hfill \end{array}$$

(29)

In addition, assuming UPF, input power is given by:

$$\begin{array}{ccc}\hfill P_T& =& 3V_{Sg}{I}_g\hfill \end{array}$$

(30)

where $V_{Sg}$ and $I_g$ denotes grid voltage and phase current in frequency domain, respectively, while the output is:

$$\begin{array}{ccc}\hfill P_0& =& V_0{I}_0\hfill \end{array}$$

(31)

Then, combining Equations (29)–(31), it yields:

$$\begin{array}{ccc}\hfill I_g& =& K_4{I}_0\hfill \end{array}$$

(32)

where $(K_4=\frac{V_0}{(3K_3{V}_{Sg})})$ and $I_0$ is the DC current. The former equation says that phase-current $I_g$ is proportional to $I_0$. Yet, Equation (32) has practical limits given by the sensitivity of the technique. A small phase-current could exist when $I_0$ is null, or lower than a threshold value, $I_{0th}$, causing phase-current distortion when $I_g$ is greater than amplitude $V_m$, as reported in [21,24,29,36,37,38,39,40]. In order to explain this phenomenon from an emulated-resistance approach, the Equation (26) can be rewritten as:

$$\begin{array}{ccc}\hfill R_{in1}& =& \frac{K_1{V}_0}{V_m}\hfill \end{array}$$

(33)

Which leads to a virtual input resistance $R_{in1}$, as a sort of $V_0$ controller. Besides, as in OCC, phase-current varies according to [52]:

$$\begin{array}{ccc}\hfill I_g& =& \frac{V_{Sg}}{R_e+sL}\hfill \end{array}$$

(34)

where $R_e$ denotes the OCC input resistance in frequency domain. Hence, by making $R_e=R_{in1}$ and combining Equations (25), (33) and (34):

$$\begin{array}{ccc}\hfill m_a& =& \frac{I_g}{V_m}=\frac{V_{Sg}}{K_1{V}_0+L(V_0^{\ast }-V_0)(s{K}_{P1}+K_{I1})}\hfill \end{array}$$

(35)

The Equation (35) denotes the modulation index $m_a$, as $I_g$ is the phase current in the frequency domain and $V_m$ is carrier amplitude [21]. Applying the final value theorem to Equation (35), for a unit step response $(\frac{1}{s})$:

$$\begin{array}{ccc}\hfill m_a& =& li{m}_{S\to 0}\frac{1}{S}S\frac{I_g}{V_m}=\frac{V_{Sg}}{K_1{V}_0+L{K}_I(V_0^{\ast }-V_0)}\hfill \end{array}$$

(36)

Due to the increase of $V_0$ without load, it tends to its reference $V_0^{\ast }$, while $V_0^{\ast }-V_0$ approaches zero. In this case, Equation (36) becomes:

$$\begin{array}{ccc}\hfill m_a& =& \frac{V_{Sg}}{K_1{V}_0}\hfill \end{array}$$

(37)

The overmodulation occurs when $m_a>1$ Equation (37) as $\frac{V_p}{V_0}>K_1>0$, once $(V_{Sg}=V_{p}cos\omega t)$, Equation (3), $m_a>0$, $K_1=0.25\frac{V_p}{V_0}$, $m_a=4$, $V_p>0$, $V_0>0$. The Equation (37) can explain why previous works did not suppress fully the overmodulation by growing or falling the $I_g$ [24,36,37,38,39,40], once $K_1$ cannot be controlled [21]. The Figure 6 illustrates this by ploting $m_a$ vs. $K_1$, Equation (37), for $0.67>K_1>0.19$, $V_p=155.56$ V, $V_0=467$ V, when $I_g$ grows $20\%$ (A) and when $I_g$ falls $20\%$ (C). Notice that when $K_1\le 0.25$, the method does not work, as $m_a>1$.

As was mentioned earlier, PF derating occurs through a lack of grid synchronization. However, this can not be predicted by an open-loop resistance-emulator value, $r_e$ [12,21] as in frequency domain it leads to $R_e=\frac{r_e}{s}$, which combined to Equation (34), it gives $I_g=s\frac{V_{Sg}}{(r_e+s^{2}L)}$, leading to an admittance angle ${\varphi }_v=arctan(\frac{I_g}{V_{Sg}})=\frac{\pi }{2}$. However, a better prediction can be obtained by combining Equations (25) and (35):

$$\begin{array}{c}\hfill \frac{I_g}{V_{Sg}}=\frac{(V_0^{\ast }-V_0)(s{K}_{P1}+K_{I1})}{[s{K}_{P1}L(V_0^{\ast }-V_0)+K_{I1}L(V_0^{\ast }-V_0)+K_1{V}_0]s}\end{array}$$

(38)

Therefore, the phase angle ${\varphi }_v$ is given by:

$$\begin{array}{c}\hfill {\varphi }_v={\varphi }_1-arctan[\frac{\omega L{K}_{P1}(8C(V_0^{\ast }-V_{0p})+I_0{T}_{SW})}{L{K}_{I1}(8C(V_0^{\ast }-V_{0p})+I_0{T}_{SW})+K_1(8C{V}_{0p}+I_0{T}_{SW})}]\end{array}$$

(39)

$$\begin{array}{ccc}\hfill \frac{\partial \varphi }{\partial I_0}& =& \frac{8\omega LC{T}_{SW}{K}_{P1}{K}_1{V}_0^{\ast }}{{(L{K}_{I1}{I}_0{T}_{SW}+K_1(8C{V}_{0p}-I_0{T}_{SW}))}^2+{(\omega L{K}_{P1}{I}_0{T}_{SW})}^2}\hfill \end{array}$$

(40)

It can be noticed that the former equation predicts PF derating because admittance angle ${\varphi }_v$ is a decreasing function. It matches the results of previous works [29,37,38,39]. The Figure 7 shows Equation (39), $V_p=155.56$ V, $V_{0p}=V_0^{\ast }=467$ V, $K_1=1$, $K_{p1}=1$, $K_{I1}=1$. The figure confirms that ${\varphi }_v$ is decreasing when $I_0$ increases, from $I_0=10$A (P) to $I_0=20$A (N) and $I_0=30$A (M).

3.3. Software-OCC Solutions

Although subtle, the main difference between Hardware-OCC and Software-OCC is in bus voltage control, in the hardware version this controller is called $V_m$ and controls the amplitude of the carrier Equations (25) and (27), in the software version this controller is called $R_{in}$ and controls modulation. However, only $R_{in}$ allows the OCC to solve instability problems and power factor decrease.

As was mentioned earlier, phase-current is proportional to DC current, Equation (32), but only under practical limits, through the sensitivity of OCC modulator. Since a small distorted phase-current could appear when DC current is less than the threshold current, $I_{0th}$. In order to avoid this effect in software-OCC, maximum the controller limiter $R_{in-max}$ could be calibrated to set up minimum phase-current $I_{gmin}$, since $I_g=\frac{V_{Sg}}{R_{in}}$, Equation (20). Then, as voltage $V_{Sg}$ is fixed, minimum phase-current $I_{gmin}$ occurs when the resistance $R_{inmax}$ is reached, as $I_g{R}_{in}=V_{Sg}$ is a hyperbolic curve working at first quadrant, $I_g>0$, $R_{in}>0$. That is:

$$\begin{array}{ccc}\hfill I_{gmin}& =& \frac{V_{Sg}}{R_{inmax}}\hfill \end{array}$$

(41)

Thereby, to avoid phase-current distortion at no-load, $R_{inmax}$ must be set up to achieve a minimum phase-current $I_{gmin}$ when DC current is less than $I_{0th}$. Thus:

$$\begin{array}{ccc}\hfill I_g& =& \left\{\begin{array}{cc}{I}_{gmin},& when{I}_0<I_{0th}\\ K_4{I}_0,& when{I}_0\ge I_{0th}\end{array}\right.\hfill \end{array}$$

(42)

Figure 8 shows a plot of $I_g$ vs. $I_0$, Equation (32), when $I_{gmin}=1.4$ A, $I_{0th}=0.5$ A, $v_{Sg}=110$ V, $R_{inmax}=78.01$ $\mathsf{\Omega }$. Unlike hardware-OCC, a tiny DC controller value does not provoke overmodulation, so the current distortion becomes simpler to avoid. As at no-load, there is no current distortion, it would be necessary to check if at no-load PF derating could be generated. In this sense, no-load and high-load cases must be analyzed for PF derating. Thus, substituting $R_e=R_{in}$ in Equation (34):

$$\begin{array}{ccc}\hfill I_g& =& \frac{V_{Sg}}{R_{in}+sL}\hfill \end{array}$$

(43)

Note that in the former equation if denominator left term is much greater than the right one, $(R_{in}>>sL)$ on this way, the last equation becomes equivalent to Equation (20). However, to achieve UPF, another expression can be found by combining Equations (22) and (43), and relation $(R_{in}>>sL)$:

$$\begin{array}{ccc}\hfill I_g& =& \frac{V_{Sg}}{(V_0^{\ast }-V_0)(K_P+\frac{K_I}{s})}\hfill \end{array}$$

(44)

The Relation $(R_{in}>>sL)$ can be forced by setting resistance lower limit $R_{i{n}_{m}in}=10\omega L$, as showed in Figure 5, since in practice this relation implies $(R_{in}\ge 10\omega L$ $R_{in}\ge 10\omega L)$. Besides, from the Expression (44), admittance angle $(\varphi =arctan(\frac{I_g}{V_{Sg}}))$ is given by:

$$\begin{array}{ccc}\hfill {\varphi }_v& =& \frac{\pi }{2}-arctan(\frac{\omega K_P}{K_I})\hfill \end{array}$$

(45)

It can be noticed that this angle does not depend on the DC current, nor dc voltage. Figure 9 shows a plot of admittance angle ${\varphi }_v$ vs. $\omega$, for the software-OCC, Equation (45), when $K_P=1$ and $K_I=1$. This plot does not depend on the DC current.

4. DSP Implementation

As can be observed in Figure 10a, Software-OCC controller employs embedded DSP devices like PWM modulators, analog to digital converters and the arithmetic-logic unit, blocks to perform all its tasks digitally, arithmetic and logic operations (including multiplication and division), digital comparators, digital inverters, PI controllers, output limiters and lead-lag compensators (LLC). Yet, it is necessary a phase-current conditioner. As observed in the Figure 10b, it is necessary a phase-current conditioner consisting of a Hall-effect current-sensor [53], some operational amplifiers, OP-AMPs, and a few resistors to change phase-current over dc voltage and then transforms it into digital, through A/D converter.

Hence, a proportionality between analog and digital is guaranteed for DSP to perform OCC control operations, once a scale factor $K_S$ (bits /A) is maintained for all currents. For hardware-OCC, something similar occurs, but now the scale factor is a resistance $R_S$ (V/A), since a current-sensor resistor is generally used in hardware systems. Anyway, for the sake of simplicity, to establish an equivalency between hardware and software-OCC, it is defined in the later, resistor $R_S$ as unity, $R_S=1$ $\mathsf{\Omega }$, denoting that phase-current corresponds to the digital value adopted in DSP control operations. After the digitalizing process, phase-current pass through the software implemented LLC, which averages phase-current according to:

$$\begin{array}{c}\hfill F(s)=G_0\frac{(1+s{\tau }_1)}{(1+s{\tau }_2)}\end{array}$$

(46)

where $(F(s)=\frac{I_{gs}(s)}{I_g(s)})$, and $I_{gs}(s)$ and $I_g(s)$ correspond in the frequency domain to the phase current and its average respectively, in the time domain $G_0$ is the gain, and ${\tau }_1$, ${\tau }_2$ are lead and lag compensator constants. The main idea of the former equation is to average the phase-current $i_g$ without unwanted delay on phase angle, from the manipulation of ${\tau }_1$ and ${\tau }_2$ values. A further analysis of LLC on software-OCC is performed in [32]. On the other hand, for DSP, carrier waveshape (a sawtooth or a symmetrical triangle) is a choice of DSP-PWM modulator. Thus, in software-OCC, a triangle carrier is chosen since, for a sinusoidal modulating wave, it produces less current harmonics than those in a sawtooth carrier [54]. Another DSP choice is produced when carrier slope (rising or falling) intercepts current, generating an inherent delay related to the inverse of the carrier frequency. This does not jeopardize the time control algorithm, as DSP operations are performed between the interceptions. Yet, in software-OCC, a variation in carrier amplitude also involves a variation in carrier frequency, as shown in

Table 1. Carrier Amplitude and frequency for DSP TMS3020F335.

Carrier Amplitude (A)	${\mathit{f}}_{\mathit{C}}$ (kHz)
3750	20
5000	15
7500	10

[55]. Then, there is no direct method to change carrier amplitude without vary carrier frequency also. However, in order to solve this issue, focusing on generating the same firing pulses, the OCC modulator (Equation (23)) is modified as in the Equation (24), which becomes the most suitable expression for DSP implementation as it considers a fixed carrier amplitude. In fact, the software-OCC controller is based on Equations (21) and (24), as observed in Figure 10.

Cost-Effectiveness Software-OCC Discussion

Although the solution with Hardware-OCC is a cost effective solution [21], it presented serious stability problems, which was not practical for applications like APF [56] and photovoltaic systems [27]. Later instability solutions performed by hardware at no-load were reported, but there was always current distortion when dc current falls below a certain level [24,36,37,38,39,40], except when a bulky resistor was placed at dc-link [21,29] and at high-load where complex circuits [23,24,39,40,41], or costly systems were used [28,42]. Thereby, despite these works represent a nice try to solve specific problems, they do not provide a definitive solution, even sacrificing hardware simplicity, or cost-effectiveness of OCC [21,29]. Furthermore, any of the above-mentioned reported works were capable of operating both at no-load and at high-load. Thus, to compare the fair cost-effectiveness of existing hardware-OCC works with present software-OCC, it would be necessary to compare reported works of the same performance, that is, OCC rectifiers operating at a wide range of load. Otherwise, it is like comparing a calculator with a computer. Above all, although the present work was implemented by using a TMS $320F28335$ evaluation board in a laboratory prototype, a pretty cost-effective solution could be found acquiring a DSP chip and its accessories separately, or by using a simpler DSP, or a microcontroller chip, i.e., a PIC. In any case, the present proposal results in a cost-effective solution on a full range of load, at least, for lack of another option.

5. Simulation and Experimental Results

The performance of software-OCC has been verified by simulation by using MATLAB and PSCAD/EMTDC and by experimental runs using DSP TMS320F28335. The experiments were performed in a three-phase rectifier similar to the one shown on the Figure 11. The simulation results from PSCAD software are shown in the Figure 12, Figure 13 and Figure 14. The MATLAB ones are shown in the Figure 7 and Figure 9. From the Figure 15, Figure 16, Figure 17, Figure 18, Figure 19, Figure 20, Figure 21, Figure 22, Figure 23, Figure 24 and Figure 25 we show the experimental results.

Parameter values are in

Table 2. Parameters on simulation and experimentals.

Parameter	R ($\mathbf{\Omega }$)	$\mathit{\omega }$ (r/s)	L (mH)	${\mathit{C}}_1$$(\mathsf{\mu }$F)	${\mathit{C}}_2$ ($\mathsf{\mu }$F)	${\mathit{v}}_{\mathit{Sg}}$ (V)	${\mathit{\tau }}_1$ (ms)	${\mathit{\tau }}_2$ (ms)	${\mathit{f}}_{\mathit{C}}$ (kHz)
Simulation	1	377	1	670	670	110	1	0.15	20
Experimental	1	377	1	2200	2200	110	1	0.15	25

. In Figure 21 and Figure 26, $V_{grms}$ = 110 V and $V_0^{\ast }=100$ V, but in Figure 15, Figure 16, Figure 17, Figure 18, Figure 19 and Figure 20, due to technical problems, $V_{grms}$ = 21 V and $V_0^{\ast }=100$ V. Figure 12 presents a simulation result only with hardware-OCC evidencing its instability, while the Figure 26 presents a simulation result on stability at no-load and high-load conditions for software-OCC. It can be observed that at no-load, it does not present hardware-OCC stability issues, like overmodulation [21] (current distortion), nor present PF derating. This result verify Equation (43) when $K_{P1}>>K_{I1}$.

Experimental results in Figure 15, Figure 16, Figure 17, Figure 18, Figure 19, Figure 20, Figure 21, Figure 22, Figure 23 and Figure 24 are dedicated to confirm former result, or enhance it. Figure 26 shows software-OCC behavior at start-up at no-load, verifying that there is no current distortion, unlike [21], nor even in smaller amount [36,37,38]. This is because to avoid current distortion, software-OCC can define minimum current when load current is null, by using $R_{in}$. Figure 15 illustrates dc-link voltage response to a current step, from no-load to high-load, showing a relatively fast-software-OCC dynamic-response considering dc-link capacitors size, thus complementing the Figure 12, Figure 13 and Figure 14. Figure 16 is the enlargement of Figure 15 highlighting the rapid dynamics of the system. Figure 15 shows the dynamics of the emulated resistor $R_{in}$ due to load variation in the rectifier circuit.

It can be noticed in the Figure 26, that at no-load, when $I_0=0$, phase-current is small, but it does not exhibit current distortion, as it could be expected considering power balancing in Equation (41), but instead, regarding a minimum phase-current, according to Equation (42), see Figure 16, Figure 17 and Figure 19. Also, it can be observed that there is no power factor derating, as occurs in conventional hardware-OCC [21], (see Figure 18 and Figure 20), and to preserve power factor, it is not necessary to use bulky inductors, unlike [28,42], as observed in Table. Table 2. Thus, also confirming the Figure 26.

From Figure 17 and Figure 19, it can be deduced that the present proposal satisfies IEEE Std 519-1992 [8], as current distortion is small. The Figure 18 shows the proposed controller start-up when the load is high. It illustrates a high dynamic response of software-OCC at high-load and that in such conditions there is no PF derating. This result could substitute Figure 16 and Figure 23 results, once these figures do not achieve high-load results. On the other hand, the Figure 20 shows PF derating vs. phase current at different load conditions. Figure 20 demonstrates that there is a tiny variation when phase currents change. Figure 21 and Figure 22 illustrate DC-link voltage response to a current step, from high-load to no-load, showing a relatively fast software-OCC dynamic-response due to DC-link capacitors size, thus complementing the Figure 26. Figure 23 illustrate the current variation at the output of the rectifier $I_0$ and the resistance $R_{in}$.

Figure 24 illustrates the dynamic response of software PWM-OCC (switching frequency: 24 kHz, $R_L$: 100 $\mathsf{\Omega }$) as well as the charging capacitor of the dc-link voltage. It spends approximately $0.55$ s, which is consistent with C = 1100 $\mathsf{\mu }$F, Table 2, and $R_L$. The time constant $\tau =R_{L}C$ and charging capacitor should last $3\tau$ approx. Although OCC systems usually have a high dynamic response, for DC-link capacitor charging, this response depends on the capacitor value. In the present case, the capacitor value could not be changed due to the physical stability of the Semikron board and laboratory facilities setup Figure 25.

6. Conclusions

Despite the stability problems, the hardware-OCC contributions to power quality like hardware and control simplicity and high dynamic response are well known. Somehow, software-OCC raises as a solution to these problems and as a way to enhance and increase OCC contributions. The DSP can not emulate variable-carrier amplitude OCC in this software version, since switching frequency depends on the carrier amplitude and vice versa. However, using a mathematical equivalency, the firing gate pulses of the software-OCC and the hardware-OCC are equivalent. This allows the resistance controller limiters to solve stability issues.

From the stability analysis of the emulated-resistance controller for a PWM rectifier, it has stated that: despite, several authors provided solutions to hardware-OCC instability at no-load, or at high-load separately; any of these provide a full-load solution, at no-load and at high-load at the same time. The Software-OCC does not present Hardware-OCC problems, even over a wide load range, and presents a cost-effective solution, once DSP and its components were acquired separately, or a simpler DSP or a PIC was acquired. The Software-OCC also provided fast dynamic-response in comparison to the researches in this field, eliminating power factor derating and minimizing current distortion caused by overmodulation.