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Open AccessArticle

Reliability Characterization of Gallium Nitride MIS-HEMT Based Cascode Devices for Power Electronic Applications

by Surya Elangovan 1,†, Stone Cheng 1,*,† and Edward Yi Chang 2,†
1
Department of Mechanical Engineering, National Chiao Tung University, Hsinchu City 30010, Taiwan
2
Department of Material Science and Engineering, National Chiao Tung University, Hsinchu City 30010, Taiwan
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Energies 2020, 13(10), 2628; https://doi.org/10.3390/en13102628
Received: 17 April 2020 / Revised: 15 May 2020 / Accepted: 18 May 2020 / Published: 21 May 2020
(This article belongs to the Special Issue Reliability of Power Electronic Systems)
We present a detailed study of dynamic switching instability and static reliability of a Gallium Nitride (GaN) Metal-Insulator-Semiconductor High-Electron-Mobility-Transistor (MIS-HEMT) based cascode switch under off-state (negative bias) Gate bias stress (VGS, OFF). We have investigated drain channel current (IDS, Max) collapse/degradation and turn-on and rise-time (tR) delay, on-state resistance (RDS-ON) and maximum transconductance (Gm, max) degradation and threshold voltage (VTH) shift for pulsed and prolonged off-state gate bias stress VGS, OFF. We have found that as stress voltage magnitude and stress duration increases, similarly IDS, Max and RDS-ON degradation, VTH shift and turn-on/rise time (tR) delay, and Gm, max degradation increases. In a pulsed off-state VGS, OFF stress experiment, the device instabilities and degradation with electron trapping effects are studied through two regimes of stress voltages. Under low stress, VTH shift, IDS collapse, RDS-ON degradation has very minimal changes, which is a result of a recoverable surface state trapping effect. For high-stress voltages, there is an increased and permanent VTH shift and high IDS, Max and RDS-ON degradation in pulsed VGS, Stress and increased rise-time and turn-on delay. In addition to this, a positive VTH shift and Gm, max degradation were observed in prolonged stress experiments for selected high-stress voltages, which is consistent with interface state generation. These findings provide a path to understand the failure mechanisms under room temperature and also to accelerate the developments of emerging GaN cascode technologies. View Full-Text
Keywords: gallium nitride HEMT; cascode configuration; off-state gate bias stress; device degradation; failure mechanisms; electronic trapping effects gallium nitride HEMT; cascode configuration; off-state gate bias stress; device degradation; failure mechanisms; electronic trapping effects
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MDPI and ACS Style

Elangovan, S.; Cheng, S.; Chang, E.Y. Reliability Characterization of Gallium Nitride MIS-HEMT Based Cascode Devices for Power Electronic Applications. Energies 2020, 13, 2628.

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