A Coupled-Inductor DC-DC Converter with Input Current Ripple Minimization for Fuel Cell Vehicles

Abstract

A coupled-inductor DC-DC converter with a high voltage gain is proposed in this paper to match the voltage of a fuel cell stack to a DC link bus. The proposed converter can minimize current ripples and can also achieve a high voltage gain by adjusting the duty cycle d and the turns ratio n of a coupled inductor. A passive lossless clamping circuit that is composed of one capacitor and one diode is employed, and this suppresses voltage spikes across the power device resulting from system leakage inductance. The operating principles and the characteristics of the proposed converter are analyzed and discussed. A 400-W experimental prototype was developed, and it had a wide voltage gain range (4–13.33) and a maximum efficiency of 95.12%.

1. Introduction

With extensive use of fossil fuels in transport, power, and heating, addressing the imminent global energy crisis has become an increasing concern [1,2,3]. In addition, considerations such as the greenhouse effect and increasing air pollution (especially in cities) caused particularly by emissions from fossil fuel vehicles have become significant influences on quality of life and health [4]. Renewable energy vehicles, including fuel cell vehicles, pure electric vehicles, and hybrid energy source vehicles [5,6], can greatly reduce the impact of transport on the environment due to their pollution-free characteristics [7,8]. Fuel cell vehicles have attracted wide attention because of their higher energy conversion rate compared to locomotives [9] and their longer cycle range compared to battery electric vehicles [10]. However, a fuel cell source cannot be connected to the propulsion system’s DC bus directly, as it can have a low and variable output voltage and a large output current [11]. As a result, a DC-DC boost converter is needed to lift the voltage of the fuel cell source and to match the DC bus voltage [12]. Above all, a DC-DC converter with a minimal input current ripple and a high voltage gain is extremely important for the future development of fuel cell vehicles.

The traditional DC-DC boost converter features a simple structure and low component counts. However, low voltage gain and high voltage stresses across all semiconductor devices limit its application. Although a three-level DC-DC boost converter lowers the voltage stress to half of the output voltage, the duty cycle is extreme, while the voltage gain is high. A three-level DC-DC converter with a high voltage gain and without extreme duty cycles was proposed in Reference [13], but it had a greater cost due to the number of semiconductors (eight MOSFETs and four diodes), and the control strategy was also more complicated. In References [14,15], the proposed converters employed switched-capacitor cells to achieve a high voltage gain, while the number of switched-capacitor cells, the volume of the converter, and the cost increased. Coupled inductors have been employed to improve the voltage gain of converters (proposed in [16,17]). However, the higher the voltage gain was, the greater the turns ratio required from the coupled inductors was, which increased the leakage inductance of the coupled inductors and made manufacturing more difficult. A novel high step-up DC-DC converter with coupled inductors and a switched capacitor was proposed in Reference [18]. However, the leakage inductance of the coupled inductors resulted in a high voltage spike across the power switches. An active clamp [19] or a passive snubber circuit [20] are often adopted to solve the aforementioned voltage spike issues. However, the complexity of the control strategy and the circuit also increase. At the same time, these converters have different levels of input current ripples, and a large current ripple has a serious impact on the lifetime of fuel cells [21]. In References [22,23,24], interleaved converters were proposed to cut down the input current ripple. The improved modulation strategy proposed in Reference [13] could also obtain a lower input current ripple. However, as the voltage gain increased, the input current became large, and therefore the increased current ripple was still a disadvantage for fuel cell sources. An active compensation method was proposed in Reference [25] based on the designed push–pull DC-DC converter by adding an active-clamp circuit to further reduce current ripples in the uninterruptible power supply (UPS) system. However, the method focused on the low-frequency current ripple and employed an extra circuit. A maximum power point tracking (MPPT) control with a perturbed duty ratio D_p was employed in Reference [26] to simply reduce the input ripple current of a proton exchange membrane (PEM) fuel cell. However, it was only suitable for AC output applications. A pre-regulator was introduced in Reference [27] to interface with the main regulator for reducing the current ripple. However, the pre-regulator employed an interleaved structure that was not indispensable. The introduced pre-regulator reduced the power density and increased the cost of the proposed converter. To reduce the low-frequency input current ripple without the auxiliary circuit, a control method based on a front-end DC-DC converter was proposed in Reference [28]. This method intended to modify the DC bus voltage reference and control the DC bus voltage to fluctuate properly at 2f_o, making the DC bus capacitor support nearly all of the fluctuating power. However, it was not suitable for high-frequency current ripples caused by a charging/discharging current flowing through the input inductor.

Based on the step-up DC-DC converter with an input current ripple minimization proposed in Reference [29], a novel coupled-inductor converter with a high voltage gain is proposed in this paper. The converter benefits from input current ripple minimization, further improves voltage gain, and reduces voltage stresses. A passive lossless clamping circuit is introduced, consisting of one capacitor and one diode. As a result, voltage spikes across the power switch caused by leakage inductance can be suppressed. In addition, the output and the input share a common ground, which can eliminate additional electromagnetic interference (EMI) issues. Section 2 presents the topology of the proposed converter. The operating principles and characteristics of the converter are analyzed in Section 3 in detail. In Section 4, the voltage and current stresses of the semiconductors are analyzed, and a comparison to the counterpart in Reference [29] is made. In Section 5, an experimental prototype is built, and experimental results validate the theoretical analysis.

2. Topology

The topology of the proposed converter and its equivalent circuit are shown in Figure 1a,b, respectively. As the equivalent circuit shows, the coupled inductor is composed of a magnetizing inductance L_M, a leakage inductance L_r, and an ideal transformer whose turns ratio is n_p:n_s = 1:n. The inductor L_a and the capacitor C₁ form an input current ripple minimization unit, and the diode D₁ and the capacitor C₄ form a passive lossless clamping circuit. Consequently, the voltage stress across the power switch Q can be clamped to the voltage across C₄ when Q is turned off. The voltage doubling unit is composed of the capacitor C₂ and the coupled inductor L_s, while the capacitor C₃ and the capacitor C₄ are the energy storage capacitors in the high voltage side.

3. Analysis of Operating Principles and Characteristics

3.1. Operating Principles

The proposed converter has 10 operating modes (in which Mode G and Mode H cannot coexist simultaneously in a single switching period), and the corresponding current flow paths are depicted in Figure 2.

Mode A: The power switch Q is turned on. The currents that flow through both sides of the ideal transformer decrease rapidly. Meanwhile, diode D₃ is still conducting, and the current flowing through capacitor C₁ starts to decrease. This mode ends when the current flowing in C₃ becomes zero.

Mode B: The current flowing into diode D₃ is no longer able to provide energy for the load and continues to decrease. Accordingly, capacitor C₃ begins to discharge, and the current flowing through it increases. The trends of the currents flowing in other branches of the circuit remain the same. This mode ends when the current flowing through diode D₃ decreases to zero.

Mode C: The currents flowing into both sides of the ideal transformer are reversed and gradually increase. Diode D₂ is turned on, and capacitor C₃ is still discharging. The coupled inductor transfers energy to capacitor C₂, and it starts to charge. The capacitor C₁ continues to discharge, but its current decreases gradually. Meanwhile, capacitor C₄ continues to charge, and its current gradually decreases to zero, at which time this mode ends.

Mode D: The current flowing through capacitor C₄ begins to reverse and gradually increase, and C₄ begins to discharge. The current flowing through capacitor C₁ continuously decreases, while the current flowing in diode D₂ rises gradually. This mode ends when the current flowing through capacitor C₁ is equal to the current flowing in diode D₂.

Mode E: The current flowing in diode D₂ continues to increase, and it is larger than the current flowing through capacitor C₁. As a result, the current flowing through capacitor C₄ continues to rise. When the current flowing into capacitor C₁ decreases to zero, this mode ends.

Mode F: Capacitor C₁ starts to charge, and the current flowing in it increases gradually. Then the current decreases as the capacitor voltage rises.

Mode G: The charging process of capacitor C₂ is completed, and the current flowing in the secondary side of the ideal transformer n_s reduces to zero. The current flowing in the primary side n_p of the ideal transformer increases faster because there is no energy being transferred to the secondary side. This mode does not exist when the duty cycle is small (based on the magnetizing inductor).

Mode H: This mode and Mode G are mutually exclusive, and the converter goes directly into Mode I when Mode G exists. Q is turned off at the beginning, and the magnetizing inductor L_M discharges. As a result, the current flowing into the leakage inductance L_r starts to decrease. Because of the conduction of diode D₁, the voltage stress across Q is clamped at the voltage across the capacitor C₄. The capacitor C₄ continues charging. Meanwhile, capacitor C₂ is still in the charging state because the currents flowing into both sides of the ideal transformer have not reversed yet. The diode D₂ remains turned on, and the current flowing through capacitor C₁ begins to decrease. This mode finishes when the current flowing in capacitor C₂ reduces to zero.

Mode I: In this mode, the currents flowing into both sides of the ideal transformer reverse and start to increase, and the current flowing into C₃ begins to decrease because of the conduction of D₃. When the current flowing into C₃ decreases to zero, this mode ends.

Mode J: The current flowing into D₃ continues to increase, and C₃ changes into a charging state. The current trends of other branches remain unchanged. This mode terminates when the current flowing into C₁ decreases to zero.

Mode K: C₁ begins to discharge, and energy is transferred to C₄ from C₁. As the current flowing through L_a does not change, the current flowing into the primary side n_p falls. As a result, the current flowing into the secondary side n_s begins to decrease. This mode terminates when the power switch Q turns on.

Mode F, Mode G, and Mode K have the longest durations of these 10 modes (Mode G and Mode H cannot coexist simultaneously), while the other 7 modes are transient states that last for a very short time. As a result, the simplified current waveforms of the circuit elements in a switching period are given in Figure 3.

According to the states of Mode A–Mode G shown in Figure 2, the relationship between inductors and a current ripple can be obtained as

$$L_{\mathrm{M}}+L_{\mathrm{a}}+L_{\mathrm{r}}=\frac{U_{\mathrm{in}}d}{2f\alpha I_{\mathrm{L}}}$$

(1)

where α is the current ripple coefficient. The output filtering capacitors are chosen to be large enough that the voltage ripples can be limited well. Therefore, the relationship between C₄ and its voltage ripple can be obtained as

$$C_4\ge \frac{\Delta i_{\mathrm{L}}{T}_{\mathrm{s}}}{8\Delta u}=\frac{\alpha I_{\mathrm{L}}{T}_{\mathrm{s}}}{8\Delta u}$$

(2)

3.2. Analysis of Ripple Minimization Characteristics

Assume that the capacitors and the inductors employed are large enough, and the forward voltage and the on-state resistances of all semiconductors are negligible. The average voltages across C₁, C₂, C₃, and C₄ are U_C1, U_C2, U_C3, and U_C4 respectively; U_in is the steady input voltage; u_La is the instantaneous inductor voltage; the instantaneous current flowing into L_a is i_La and the average inductor current is I_La; and the duty cycle is d.

Over the whole switching period, the input inductor L_a, the capacitor C₁, and the capacitor C₄ form a closed circuit loop, and the following equation can be derived by applying Kirchhoff’s Voltage Laws (KVLs):

$$\{\begin{array}{l}{u}_{\mathrm{La}}=u_{\mathrm{in}}-u_{\mathrm{C}4}+u_{\mathrm{C}1}\\ u_{\mathrm{La}}=L_{\mathrm{a}}\frac{\mathrm{d}{i}_{\mathrm{La}}(t)}{\mathrm{d}t}\end{array},$$

(3)

where u_in is the instantaneous input voltage, and u_c1 and u_c4 are the instantaneous voltages across C₁ and C₄.

Considering the steady state, the inductor L_a satisfies the voltage second balance principle, and thus the average voltage across the inductor L_a is zero in each switching period. Therefore, Equation (4) can be obtained. The voltage ripples across C₁ and C₄ are very close to zero, and the input voltage is regarded as constant in a switching period, so the instantaneous inductor voltage u_La is very small, according to Equation (3). Therefore, the current ripple of the inductor current i_La can be regarded as zero, which means that input current ripple minimization can be realized:

$$\{\begin{array}{l}{U}_{\mathrm{C}1}=U_{\mathrm{C}4}-U_{\mathrm{in}}\\ U_{\mathrm{La}}=0\end{array}.$$

(4)

It can be seen that the characteristics of current ripple minimization are affected by L_a, u_C1, and u_C4. The capacitor voltage fluctuation is smaller if the capacitances of C₁ and C₄ are larger, which is beneficial to the realization of current ripple minimization.

3.3. Voltage Gain Analysis

In a steady state, neglecting the other transient state modes, the main modes (Mode F, Mode G, and Mode K) are analyzed. In view of the influence of leakage inductance on the voltage gain, the coupling coefficient k = L_M/(L_M + L_r) is introduced.

When the power switch Q is turned on, the voltage across the primary side n_p of the ideal transformer is equal to kU_in, while the voltage across the secondary side n_s is U_C2 − U_C4. Equation (5) can be obtained:

$$nk{U}_{\mathrm{in}}=U_{\mathrm{C}4}-U_{\mathrm{C}2}.$$

(5)

When the power switch Q is turned off, the voltage across the primary side n_p is changed to kU_C1, and the voltage across the secondary side n_s becomes U_C3 − U_C2. Therefore, Equation (6) can be obtained:

$$nk{U}_{\mathrm{C}1}=U_{\mathrm{C}3}-U_{\mathrm{C}2}.$$

(6)

Applying the voltage second balance principle to the magnetizing inductor L_M yields Equation (7):

$$k{U}_{\mathrm{in}}d=k\left(U_{\mathrm{C}4}-U_{\mathrm{in}}\right)\left(1-d\right).$$

(7)

From Equations (4)–(7), the voltages across C₁, C₂, C₃, and C₄ can be derived as

$$\{\begin{array}{l}{U}_{\mathrm{C}1}=\frac{d}{1-d}{U}_{\mathrm{in}}\\ U_{\mathrm{C}2}=\frac{nk-nkd+1}{1-d}{U}_{in}\\ U_{\mathrm{C}3}=\frac{nk+1}{1-d}{U}_{\mathrm{in}}\\ U_{\mathrm{C}4}=\frac{1}{1-d}{U}_{\mathrm{in}}\end{array}.$$

(8)

Above all, the voltage gain M of the proposed converter can be expressed as

$$M=\frac{U_{\mathrm{out}}}{U_{\mathrm{in}}}=\frac{U_{\mathrm{C}3}+U_{\mathrm{C}4}}{U_{\mathrm{in}}}=\frac{nk+2}{1-d}.$$

(9)

3.4. Analysis of Passive Lossless Clamping Circuit

As can be seen in Figure 2h, the diode D₁ and the capacitor C₄ form a passive lossless clamping circuit. C₄ can absorb the energy stored in the leakage inductance through D₁ and limit the voltage stress across the power switch Q to U_C4. This passive lossless clamping circuit provides a path for transmitting leakage inductance energy to the load. Moreover, it can raise the efficiency of the converter and suppress the voltage spike across the power switch Q caused by leakage inductance L_r.

4. Voltage and Current Stresses and Performance Comparisons

4.1. Voltage Stresses

In view of the analysis of the operating modes, the power switch Q and the capacitor C₄ are connected in parallel when Q is turned off, and D₂ is connected to the capacitor C₃ in parallel when D₂ is turned off. In other words, the voltages across Q and C₄ are equal, and the voltage stress across D₂ is U_C3. The voltage stresses across Q and D₂ can be derived as

$$U_{\mathrm{Q}}=U_{\mathrm{C}4}=\frac{1}{1-d}{U}_{\mathrm{in}},$$

(10)

$$U_{\mathrm{D}2}=U_{\mathrm{C}3}=\frac{nk+1}{1-d}{U}_{\mathrm{in}}.$$

(11)

Similarly, the voltage stress across D₁ is U_C4 and the voltage stress across D₃ is U_C3 when Q is turned on. Thus, the voltage stresses across D₁ and D₃ can be derived as

$$U_{\mathrm{D}1}=U_{\mathrm{C}4}=\frac{1}{1-d}{U}_{\mathrm{in}},$$

(12)

$$U_{\mathrm{D}3}=U_{\mathrm{C}3}=\frac{nk+1}{1-d}{U}_{\mathrm{in}}.$$

(13)

It can be concluded that the voltage stresses across the power switch Q and the diode D₁ are independent of the coupled inductors and are only related to the duty cycle d and the input voltage U_in. The voltage stresses across diode D₂ and diode D₃ are not only related to d, but are also related to the turns ratio n. Hence, it is beneficial to choose a desired turns ratio n for the coupled inductors to obtain a trade-off between the voltage gain and the voltage stresses across D₂ and D₃.

4.2. Current Stresses

To simplify the calculation of current stresses, the influence of leakage inductance is neglected, which means k = 1 (see Figure 4). When the power switch Q is turned on, the currents flowing into C₁, C₂, C₃, and C₄ are I_C1on, I_C2on, I_C3on, and I_C4on; and the current flowing into L_a is I_Laon. I_npon is the current flowing into the primary side of the ideal transformer, while I_nson is the current flowing into the secondary side. Meanwhile, the current flowing into L_M is I_LMon, and the current flowing into L_r is I_Lron. I_D2 is the current of D₂. I_inon and I_outon are the input current and the output current, respectively.

When the power switch Q is turned off, the currents flowing into C₁, C₂, C₃, and C₄ are I_C1off, I_C2off, I_C3off, and I_C4off; the current flowing into L_a is I_Laoff; and the currents flowing into both sides of the ideal transformer are I_npoff and I_nsoff. I_LMoff is the current flowing into L_M, and the current flowing into L_r is I_Lroff. I_D1 is the current of D₁, while I_D3 is the current of D₃. The input current and the output current are I_inoff and I_outoff, respectively.

By applying the ampere second balance principle to C₁–C₄, the equations can be derived as

$$\{\begin{array}{l}{I}_{\mathrm{C}1\mathrm{on}}d=I_{\mathrm{C}1\mathrm{off}}\left(1-d\right)\\ I_{\mathrm{C}2\mathrm{on}}d=I_{\mathrm{C}2\mathrm{off}}\left(1-d\right)\\ I_{\mathrm{C}3\mathrm{on}}d=I_{\mathrm{C}3\mathrm{off}}\left(1-d\right)\\ I_{\mathrm{C}4\mathrm{on}}d=I_{\mathrm{C}4\mathrm{off}}\left(1-d\right)\end{array}.$$

(14)

According to Figure 4a, it can be deduced that

$$\{\begin{array}{l}{I}_{\mathrm{C}3\mathrm{on}}=I_{\mathrm{outon}}\\ I_{\mathrm{C}1\mathrm{on}}+I_{\mathrm{C}2\mathrm{on}}+I_{\mathrm{C}3\mathrm{on}}=I_{\mathrm{C}4\mathrm{on}}\\ I_{\mathrm{Laon}}+I_{\mathrm{C}1\mathrm{on}}=I_{\mathrm{LMon}}+I_{\mathrm{npon}}\\ I_{\mathrm{npon}}=n{I}_{\mathrm{nson}}=n{I}_{\mathrm{C}2\mathrm{on}}\end{array}.$$

(15)

Similarly, Equation (16) can be derived from Figure 4b:

$$\{\begin{array}{l}{I}_{\mathrm{Laoff}}=I_{\mathrm{C}1\mathrm{off}}+I_{\mathrm{LM}}{}_{\mathrm{off}}-I_{\mathrm{npoff}}\\ I_{\mathrm{C}2\mathrm{off}}=I_{\mathrm{C}3\mathrm{off}}+I_{\mathrm{out}}{}_{\mathrm{off}}\\ I_{\mathrm{Laoff}}-I_{\mathrm{out}}{}_{\mathrm{off}}=I_{\mathrm{C}4\mathrm{off}}\\ I_{\mathrm{npoff}}=n{I}_{\mathrm{nsoff}}=n{I}_{\mathrm{C}2\mathrm{off}}\end{array}.$$

(16)

Considering that the load is resistive, and the currents flowing into L_a and L_M are assumed to be constant, Equation (17) can be derived:

$$\{\begin{array}{l}{I}_{\mathrm{outon}}=I_{\mathrm{outoff}}=I_{\mathrm{out}}\\ I_{\mathrm{Laon}}=I_{\mathrm{Laoff}}=I_{\mathrm{La}}\\ I_{\mathrm{LMon}}=I_{\mathrm{LMoff}}=I_{\mathrm{LM}}\end{array}.$$

(17)

In terms of Equations (14)–(17), the capacitor currents can be deduced as Equations (18) and (19):

$$\{\begin{array}{l}{I}_{\mathrm{C}1\mathrm{on}}=\frac{n}{d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}1\mathrm{off}}=\frac{n}{1-d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}2\mathrm{on}}=\frac{1}{d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}2\mathrm{off}}=\frac{1}{1-d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}3\mathrm{on}}=I_{\mathrm{out}}\\ I_{\mathrm{C}3\mathrm{off}}=\frac{d}{1-d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}4\mathrm{on}}=\frac{1+n+d}{d}{I}_{\mathrm{out}}\\ I_{\mathrm{C}4\mathrm{off}}=\frac{1+n+d}{1-d}{I}_{\mathrm{out}}\end{array},$$

(18)

$$\{\begin{array}{l}{I}_{\mathrm{La}}=\frac{n+2}{1-d}{I}_{\mathrm{out}}\\ I_{\mathrm{LM}}=\frac{n+2}{1-d}{I}_{\mathrm{out}}\end{array}.$$

(19)

The current stresses of the power switch Q and the diode D₂ can be obtained according to Figure 4a, Equations (18) and (19):

$$I_{\mathrm{Q}}=I_{\mathrm{La}}+I_{\mathrm{C}4\mathrm{on}}-I_{\mathrm{C}3\mathrm{on}}=\frac{n+2d}{\left(1-d\right)d}{I}_{\mathrm{out}},$$

(20)

$$I_{\mathrm{D}2}=I_{\mathrm{C}2\mathrm{on}}=\frac{1}{d}{I}_{\mathrm{out}}.$$

(21)

Similarly, the current stresses of D₁ and D₃ can be obtained by means of Figure 4b, Equations (18) and (19):

$$I_{\mathrm{D}1}=I_{\mathrm{La}}-I_{\mathrm{C}1\mathrm{off}}-I_{\mathrm{C}2\mathrm{off}}=\frac{1}{1-d}{I}_{\mathrm{out}},$$

(22)

$$I_{\mathrm{D}3}=I_{\mathrm{C}2\mathrm{off}}=\frac{1}{1-d}{I}_{\mathrm{out}}.$$

(23)

4.3. Performance Comparisons

The proposed converter was compared to the converter in Reference [29] without considering the influence of leakage inductance. The specific comparisons are shown in

Table 1. Comparisons of two types of converters with input current ripple minimization.

Characteristics	Converter in [29]	Proposed Converter
Voltage Gain	$(nd+1)/(1-d)$	$(n+2)/(1-d)$
Voltage Stress of power switch	$\frac{1}{1-d}{U}_{\mathrm{in}}$	$\frac{1}{1-d}{U}_{\mathrm{in}}$
Voltage Stress of diodes	$D_{\mathrm{C}}:\frac{1}{1-d}{U}_{\mathrm{in}}$	$D_1:\frac{1}{1-d}{U}_{\mathrm{in}}$
	$D_1:\frac{n+1}{1-d}{U}_{\mathrm{in}}$	$D_2,D_3:\frac{n+1}{1-d}{U}_{\mathrm{in}}$
Current Stress of power switch	$\frac{nd+1}{\left(1-d\right)d}{I}_{\mathrm{out}}$	$\frac{n+2d}{\left(1-d\right)d}{I}_{\mathrm{out}}$
Current Stress of diodes	$D_{\mathrm{C}}:\frac{nd+1}{2\left(1-d\right)d}{I}_{\mathrm{out}}$	$D_1,D_3:\frac{1}{1-d}{I}_{\mathrm{out}}$
	$D_1:\frac{nd+1}{\left(1-d\right)d}{I}_{\mathrm{out}}$	$D_2:\frac{1}{d}{I}_{\mathrm{out}}$
Number of power switches	1	1
Number of diodes	2	3
Ripple-minimization input current	Yes	Yes

. The voltage stress across the diode D₁ was larger than the output voltage in the converter of Reference [29], while the voltage stresses across all semiconductors in the proposed converter were less than the output voltage. Moreover, the proposed converter could achieve a much higher voltage gain at the cost of one more diode and one more capacitor. The voltage gain M versus the duty cycle d is shown in Figure 5 when the turns ratio n is equal to 1 and 2.

5. Experimental Results and Analysis

In order to validate the feasibility of the proposed converter, a 400-W prototype was developed, as shown in Figure 6. An adjustable DC source with a voltage range of U_in = 30–100 V was used as the input of the converter to simulate a fuel cell source. The output voltage was controlled to 400 V by a voltage loop implemented on a digital signal processor (DSP) TMS320F28335. The experiment parameters are listed in

Table 2. Experiment parameters.

Parameters	Values
Rated power Pn	400 W
Switching frequency fs	20 kHz
Capacitor C1	270 μF
Capacitors C2, C3, and C4	540 μF
Inductor La	241 μH
Magnetizing inductor LM	368 μH
Leakage inductance Lr	3.25 μH
Turns ratio np:ns	1:1
Output voltage Uout	400 V
Input voltage Uin	30–100 V
Power switch Q	IXTH88N30P
Diodes D1–D3	DPG60C300HB

. According to Equation (1), the current ripple coefficient α is defined as 0.2, and a large L_a can reduce the input current ripple: Therefore, L_a and L_M were taken as 241 μH and 368 μH, respectively. From Equation (2), the voltage ripple Δu is defined as 0.5 V. Considering practical experience and the laboratory conditions, C₂–C₄ were taken as 540 μF, and C₁ was taken as 270 μF.

The voltage stresses across all of the semiconductors for d = 0.625 and U_out = 400V are shown in Figure 7. Figure 7a shows the voltage stresses across Q and D₁, which were equal to 133 V, while Figure 7b shows the voltage stresses across D₂ and D₃, which were 267 V, which was consistent with the theoretical analysis. In addition, the energy stored in the leakage inductance was released through the diode D₁ when Q was turned off. As a result, the voltage spike across the power switch Q was reduced significantly. The current flowing into the inductor L_a and the voltage across the capacitor C₁ are shown in Figure 8. The input current I_in, which flowed into L_a, had no fluctuation in each switching period, and neither did the voltage across C₁. Thus, it could be concluded that input current ripple minimization was achieved, as analyzed in Section 3.2. Figure 9 shows the currents flowing into both sides of the coupled inductors. The capacitor C₂ received energy from the coupled inductors when Q was turned on. On the contrary, the current I_Lp flowing into the primary side started to decrease when Q was turned off, C₂ started to discharge, and the current I_Ls flowing into the secondary side transferred energy to the load through D₃. The experimental results were consistent with the theoretical analysis.

Figure 10 shows that with the voltage control loop, the output voltage U_out could be kept constant at 400 V, even when the input voltage U_in varied from 30 V to 100 V continuously. This demonstrated that the proposed converter could operate well in a wide voltage gain range from 13.33 to 4.

The efficiencies of the proposed converter with different input voltages and different powers were measured by a power analyzer (YOKOGAWA/WT3000), as shown in Figure 11. When the input voltage U_in = 100 V and the load power P = 400 W, the proposed converter reached a maximum conversion efficiency of 95.12%. The minimum efficiency was 89.24% when the input voltage U_in = 40 V and the load power P = 400 W. To sum up, with the same power, as the voltage gain increased (i.e., the input voltage decreased), the efficiency of the proposed converter decreased. Since the input current rose as the low-side voltage decreased, the copper loss and the switching losses of the converter rose. Therefore, the efficiency of the converter appeared to degrade at a high voltage gain.

6. Conclusions

A coupled-inductor DC-DC converter with a high voltage gain and input current ripple minimization was proposed in this paper. The converter can obtain a wide voltage gain range, and the voltage stresses across all semiconductors are lower than the output voltage. In addition, the proposed converter can benefit from the minimization of input current ripples. Furthermore, the passive lossless clamping circuit effectively suppresses voltage spikes caused by leakage inductance. Therefore, it is a good candidate for the power interface of fuel cell vehicles.