A Coupled-Inductor DC-DC Converter with Input Current Ripple Minimization for Fuel Cell Vehicles

Fuwu Yan 1, Jingyuan Li 1, Changqing Du 1, Chendong Zhao 2, Wei Zhang 3 and Yun Zhang 3,* 1 Hubei Key Laboratory of Advanced Technology for Automotive Components, Wuhan University of Technology, Wuhan 430070, China; yanfuwu@vip.sina.com (F.Y.); lijingyuan@catarc.ac.cn (J.L.); cq_du@whut.edu.cn (C.D.) 2 State Grid Shanghai Jiading Electric Power Supply Company, Shanghai 201800, China; zhaochendong@tju.edu.cn 3 School of Electrical and Information Engineering, Tianjin University, Tianjin 300070, China; duanyidelei@163.com * Correspondence: zhangy@tju.edu.cn


Introduction
With extensive use of fossil fuels in transport, power, and heating, addressing the imminent global energy crisis has become an increasing concern [1][2][3].In addition, considerations such as the greenhouse effect and increasing air pollution (especially in cities) caused particularly by emissions from fossil fuel vehicles have become significant influences on quality of life and health [4].Renewable energy vehicles, including fuel cell vehicles, pure electric vehicles, and hybrid energy source vehicles [5,6], can greatly reduce the impact of transport on the environment due to their pollution-free characteristics [7,8].Fuel cell vehicles have attracted wide attention because of their higher energy conversion rate compared to locomotives [9] and their longer cycle range compared to battery electric vehicles [10].However, a fuel cell source cannot be connected to the propulsion system's DC bus directly, as it can have a low and variable output voltage and a large output current [11].As a result, a DC-DC boost converter is needed to lift the voltage of the fuel cell source and to match the DC bus voltage [12].Above all, a DC-DC converter with a minimal input current ripple and a high voltage gain is extremely important for the future development of fuel cell vehicles.
The traditional DC-DC boost converter features a simple structure and low component counts.However, low voltage gain and high voltage stresses across all semiconductor devices limit its application.Although a three-level DC-DC boost converter lowers the voltage stress to half of the output voltage, the duty cycle is extreme, while the voltage gain is high.A three-level DC-DC converter with a high voltage gain and without extreme duty cycles was proposed in Reference [13], but it had a greater cost due to the number of semiconductors (eight MOSFETs and four diodes), and the control strategy was also more complicated.In References [14,15], the proposed converters employed switched-capacitor cells to achieve a high voltage gain, while the number of switched-capacitor cells, the volume of the converter, and the cost increased.Coupled inductors have been employed to improve the voltage gain of converters (proposed in [16,17]).However, the higher the voltage gain was, the greater the turns ratio required from the coupled inductors was, which increased the leakage inductance of the coupled inductors and made manufacturing more difficult.A novel high step-up DC-DC converter with coupled inductors and a switched capacitor was proposed in Reference [18].However, the leakage inductance of the coupled inductors resulted in a high voltage spike across the power switches.An active clamp [19] or a passive snubber circuit [20] are often adopted to solve the aforementioned voltage spike issues.However, the complexity of the control strategy and the circuit also increase.At the same time, these converters have different levels of input current ripples, and a large current ripple has a serious impact on the lifetime of fuel cells [21].In References [22][23][24], interleaved converters were proposed to cut down the input current ripple.The improved modulation strategy proposed in Reference [13] could also obtain a lower input current ripple.However, as the voltage gain increased, the input current became large, and therefore the increased current ripple was still a disadvantage for fuel cell sources.An active compensation method was proposed in Reference [25] based on the designed push-pull DC-DC converter by adding an active-clamp circuit to further reduce current ripples in the uninterruptible power supply (UPS) system.However, the method focused on the low-frequency current ripple and employed an extra circuit.A maximum power point tracking (MPPT) control with a perturbed duty ratio D p was employed in Reference [26] to simply reduce the input ripple current of a proton exchange membrane (PEM) fuel cell.However, it was only suitable for AC output applications.A pre-regulator was introduced in Reference [27] to interface with the main regulator for reducing the current ripple.However, the pre-regulator employed an interleaved structure that was not indispensable.The introduced pre-regulator reduced the power density and increased the cost of the proposed converter.To reduce the low-frequency input current ripple without the auxiliary circuit, a control method based on a front-end DC-DC converter was proposed in Reference [28].This method intended to modify the DC bus voltage reference and control the DC bus voltage to fluctuate properly at 2f o , making the DC bus capacitor support nearly all of the fluctuating power.However, it was not suitable for high-frequency current ripples caused by a charging/discharging current flowing through the input inductor.
Based on the step-up DC-DC converter with an input current ripple minimization proposed in Reference [29], a novel coupled-inductor converter with a high voltage gain is proposed in this paper.The converter benefits from input current ripple minimization, further improves voltage gain, and reduces voltage stresses.A passive lossless clamping circuit is introduced, consisting of one capacitor and one diode.As a result, voltage spikes across the power switch caused by leakage inductance can be suppressed.In addition, the output and the input share a common ground, which can eliminate additional electromagnetic interference (EMI) issues.Section 2 presents the topology of the proposed converter.The operating principles and characteristics of the converter are analyzed in Section 3 in detail.In Section 4, the voltage and current stresses of the semiconductors are analyzed, and a comparison to the counterpart in Reference [29] is made.In Section 5, an experimental prototype is built, and experimental results validate the theoretical analysis.

Topology
The topology of the proposed converter and its equivalent circuit are shown in Figure 1a,b, respectively.As the equivalent circuit shows, the coupled inductor is composed of a magnetizing inductance L M , a leakage inductance L r , and an ideal transformer whose turns ratio is n p :n s = 1:n.The inductor L a and the capacitor C 1 form an input current ripple minimization unit, and the diode D 1 and the capacitor C 4 form a passive lossless clamping circuit.Consequently, the voltage stress across the power switch Q can be clamped to the voltage across C 4 when Q is turned off.The voltage doubling unit is composed of the capacitor C 2 and the coupled inductor L s , while the capacitor C 3 and the capacitor C 4 are the energy storage capacitors in the high voltage side.

Operating Principles
The proposed converter has 10 operating modes (in which Mode G and Mode H cannot coexist simultaneously in a single switching period), and the corresponding current flow paths are depicted in Figure 2.
Mode A: The power switch Q is turned on.The currents that flow through both sides of the ideal transformer decrease rapidly.Meanwhile, diode D3 is still conducting, and the current flowing through capacitor C1 starts to decrease.This mode ends when the current flowing in C3 becomes zero.
Mode B: The current flowing into diode D3 is no longer able to provide energy for the load and continues to decrease.Accordingly, capacitor C3 begins to discharge, and the current flowing through it increases.The trends of the currents flowing in other branches of the circuit remain the same.This mode ends when the current flowing through diode D3 decreases to zero.
Mode C: The currents flowing into both sides of the ideal transformer are reversed and gradually increase.Diode D2 is turned on, and capacitor C3 is still discharging.The coupled inductor transfers energy to capacitor C2, and it starts to charge.The capacitor C1 continues to discharge, but its current decreases gradually.Meanwhile, capacitor C4 continues to charge, and its current gradually decreases to zero, at which time this mode ends.
Mode D: The current flowing through capacitor C4 begins to reverse and gradually increase, and C4 begins to discharge.The current flowing through capacitor C1 continuously decreases, while the current flowing in diode D2 rises gradually.This mode ends when the current flowing through capacitor C1 is equal to the current flowing in diode D2.
Mode E: The current flowing in diode D2 continues to increase, and it is larger than the current flowing through capacitor C1.As a result, the current flowing through capacitor C4 continues to rise.When the current flowing into capacitor C1 decreases to zero, this mode ends.
Mode F: Capacitor C1 starts to charge, and the current flowing in it increases gradually.Then the current decreases as the capacitor voltage rises.
the ripple-free input current unit the voltage doubling unit the passive lossless clamping circuit

Operating Principles
The proposed converter has 10 operating modes (in which Mode G and Mode H cannot coexist simultaneously in a single switching period), and the corresponding current flow paths are depicted in Figure 2.
Mode A: The power switch Q is turned on.The currents that flow through both sides of the ideal transformer decrease rapidly.Meanwhile, diode D 3 is still conducting, and the current flowing through capacitor C 1 starts to decrease.This mode ends when the current flowing in C 3 becomes zero.
Mode B: The current flowing into diode D 3 is no longer able to provide energy for the load and continues to decrease.Accordingly, capacitor C 3 begins to discharge, and the current flowing through it increases.The trends of the currents flowing in other branches of the circuit remain the same.This mode ends when the current flowing through diode D 3 decreases to zero.
Mode C: The currents flowing into both sides of the ideal transformer are reversed and gradually increase.Diode D 2 is turned on, and capacitor C 3 is still discharging.The coupled inductor transfers energy to capacitor C 2 , and it starts to charge.The capacitor C 1 continues to discharge, but its current decreases gradually.Meanwhile, capacitor C 4 continues to charge, and its current gradually decreases to zero, at which time this mode ends.
Mode D: The current flowing through capacitor C 4 begins to reverse and gradually increase, and C 4 begins to discharge.The current flowing through capacitor C 1 continuously decreases, while the current flowing in diode D 2 rises gradually.This mode ends when the current flowing through capacitor C 1 is equal to the current flowing in diode D 2 .
Mode E: The current flowing in diode D 2 continues to increase, and it is larger than the current flowing through capacitor C 1 .As a result, the current flowing through capacitor C 4 continues to rise.When the current flowing into capacitor C 1 decreases to zero, this mode ends.
Mode F: Capacitor C 1 starts to charge, and the current flowing in it increases gradually.Then the current decreases as the capacitor voltage rises.
Mode G: The charging process of capacitor C 2 is completed, and the current flowing in the secondary side of the ideal transformer n s reduces to zero.The current flowing in the primary side n p of the ideal transformer increases faster because there is no energy being transferred to the secondary side.This mode does not exist when the duty cycle is small (based on the magnetizing inductor).
Mode H: This mode and Mode G are mutually exclusive, and the converter goes directly into Mode I when Mode G exists.Q is turned off at the beginning, and the magnetizing inductor L M discharges.As a result, the current flowing into the leakage inductance L r starts to decrease.Because of the conduction of diode D 1 , the voltage stress across Q is clamped at the voltage across the capacitor C 4 .The capacitor C 4 continues charging.Meanwhile, capacitor C 2 is still in the charging state because the currents flowing into both sides of the ideal transformer have not reversed yet.The diode D 2 remains turned on, and the current flowing through capacitor C 1 begins to decrease.This mode finishes when the current flowing in capacitor C 2 reduces to zero.
Mode I: In this mode, the currents flowing into both sides of the ideal transformer reverse and start to increase, and the current flowing into C 3 begins to decrease because of the conduction of D 3 .When the current flowing into C 3 decreases to zero, this mode ends.
Mode G: The charging process of capacitor C2 is completed, and the current flowing in the secondary side of the ideal transformer ns reduces to zero.The current flowing in the primary side np of the ideal transformer increases faster because there is no energy being transferred to the secondary side.This mode does not exist when the duty cycle is small (based on the magnetizing inductor).
Mode H: This mode and Mode G are mutually exclusive, and the converter goes directly into Mode I when Mode G exists.Q is turned off at the beginning, and the magnetizing inductor LM discharges.As a result, the current flowing into the leakage inductance Lr starts to decrease.Because of the conduction of diode D1, the voltage stress across Q is clamped at the voltage across the capacitor C4.The capacitor C4 continues charging.Meanwhile, capacitor C2 is still in the charging state because the currents flowing into both sides of the ideal transformer have not reversed yet.The diode D2 remains turned on, and the current flowing through capacitor C1 begins to decrease.This mode finishes when the current flowing in capacitor C2 reduces to zero.
Mode I: In this mode, the currents flowing into both sides of the ideal transformer reverse and start to increase, and the current flowing into C3 begins to decrease because of the conduction of D3.When the current flowing into C3 decreases to zero, this mode ends.
Mode J: The current flowing into D3 continues to increase, and C3 changes into a charging state.The current trends of other branches remain unchanged.This mode terminates when the current flowing into C1 decreases to zero.
(g) Mode K: C1 begins to discharge, and energy is transferred to C4 from C1.As the current flowing through La does not change, the current flowing into the primary side np falls.As a result, the current flowing into the secondary side ns begins to decrease.This mode terminates when the power switch Q turns on.Mode J: The current flowing into D 3 continues to increase, and C 3 changes into a charging state.The current trends of other branches remain unchanged.This mode terminates when the current flowing into C 1 decreases to zero.
Mode K: C 1 begins to discharge, and energy is transferred to C 4 from C 1 .As the current flowing through L a does not change, the current flowing into the primary side n p falls.As a result, the current flowing into the secondary side n s begins to decrease.This mode terminates when the power switch Q turns on.
Mode F, Mode G, and Mode K have the longest durations of these 10 modes (Mode G and Mode H cannot coexist simultaneously), while the other 7 modes are transient states that last for a very short time.As a result, the simplified current waveforms of the circuit elements in a switching period are given in Figure 3. Mode F, Mode G, and Mode K have the longest durations of these 10 modes (Mode G and Mode H cannot coexist simultaneously), while the other 7 modes are transient states that last for a very short time.As a result, the simplified current waveforms of the circuit elements in a switching period are given in Figure 3.According to the states of Mode A-Mode G shown in Figure 2, the relationship between inductors and a current ripple can be obtained as where α is the current ripple coefficient.The output filtering capacitors are chosen to be large enough that the voltage ripples can be limited well.Therefore, the relationship between C 4 and its voltage ripple can be obtained as

Analysis of Ripple Minimization Characteristics
Assume that the capacitors and the inductors employed are large enough, and the forward voltage and the on-state resistances of all semiconductors are negligible.The average voltages across C 1 , C 2 , C 3 , and C 4 are U C1 , U C2 , U C3 , and U C4 respectively; U in is the steady input voltage; u La is the instantaneous inductor voltage; the instantaneous current flowing into L a is i La and the average inductor current is I La ; and the duty cycle is d.
Over the whole switching period, the input inductor L a , the capacitor C 1 , and the capacitor C 4 form a closed circuit loop, and the following equation can be derived by applying Kirchhoff's Voltage Laws (KVLs): where u in is the instantaneous input voltage, and u c1 and u c4 are the instantaneous voltages across C 1 and C 4 .
Considering the steady state, the inductor L a satisfies the voltage second balance principle, and thus the average voltage across the inductor L a is zero in each switching period.Therefore, Equation (4) can be obtained.The voltage ripples across C 1 and C 4 are very close to zero, and the input voltage is regarded as constant in a switching period, so the instantaneous inductor voltage u La is very small, according to Equation (3).Therefore, the current ripple of the inductor current i La can be regarded as zero, which means that input current ripple minimization can be realized: It can be seen that the characteristics of current ripple minimization are affected by L a , u C1 , and u C4 .The capacitor voltage fluctuation is smaller if the capacitances of C 1 and C 4 are larger, which is beneficial to the realization of current ripple minimization.

Voltage Gain Analysis
In a steady state, neglecting the other transient state modes, the main modes (Mode F, Mode G, and Mode K) are analyzed.In view of the influence of leakage inductance on the voltage gain, the coupling coefficient k = L M /(L M + L r ) is introduced.
When the power switch Q is turned on, the voltage across the primary side n p of the ideal transformer is equal to kU in , while the voltage across the secondary side n s is U C2 − U C4 .Equation ( 5) can be obtained: When the power switch Q is turned off, the voltage across the primary side n p is changed to kU C1 , and the voltage across the secondary side n s becomes U C3 − U C2 .Therefore, Equation ( 6) can be obtained: Applying the voltage second balance principle to the magnetizing inductor L M yields Equation ( 7): From Equations ( 4)-( 7), the voltages across C 1 , C 2 , C 3 , and C 4 can be derived as Above all, the voltage gain M of the proposed converter can be expressed as

Analysis of Passive Lossless Clamping Circuit
As can be seen in Figure 2h, the diode D 1 and the capacitor C 4 form a passive lossless clamping circuit.C 4 can absorb the energy stored in the leakage inductance through D 1 and limit the voltage stress across the power switch Q to U C4 .This passive lossless clamping circuit provides a path for transmitting leakage inductance energy to the load.Moreover, it can raise the efficiency of the converter and suppress the voltage spike across the power switch Q caused by leakage inductance L r .

Voltage Stresses
In view of the analysis of the operating modes, the power switch Q and the capacitor C 4 are connected in parallel when Q is turned off, and D 2 is connected to the capacitor C 3 in parallel when D 2 is turned off.In other words, the voltages across Q and C 4 are equal, and the voltage stress across D 2 is U C3 .The voltage stresses across Q and D 2 can be derived as Similarly, the voltage stress across D 1 is U C4 and the voltage stress across D 3 is U C3 when Q is turned on.Thus, the voltage stresses across D 1 and D 3 can be derived as It can be concluded that the voltage stresses across the power switch Q and the diode D 1 are independent of the coupled inductors and are only related to the duty cycle d and the input voltage U in .The voltage stresses across diode D 2 and diode D 3 are not only related to d, but are also related to the turns ratio n.Hence, it is beneficial to choose a desired turns ratio n for the coupled inductors to obtain a trade-off between the voltage gain and the voltage stresses across D 2 and D 3 .

Current Stresses
To simplify the calculation of current stresses, the influence of leakage inductance is neglected, which means k = 1 (see Figure 4).When the power switch Q is turned on, the currents flowing into C 1 , C 2 , C 3 , and C 4 are I C1on , I C2on , I C3on , and I C4on ; and the current flowing into L a is I Laon .I npon is the current flowing into the primary side of the ideal transformer, while I nson is the current flowing into the secondary side.Meanwhile, the current flowing into L M is I LMon , and the current flowing into L r is I Lron .I D2 is the current of D 2 .I inon and I outon are the input current and the output current, respectively.

Performance Comparisons
The proposed converter was compared to the converter in Reference [29] without considering the influence of leakage inductance.The specific comparisons are shown in Table 1.The voltage stress across the diode D1 was larger than the output voltage in the converter of Reference [29], while the voltage stresses across all semiconductors in the proposed converter were less than the output voltage.Moreover, the proposed converter could achieve a much higher voltage gain at the cost of one more diode and one more capacitor.The voltage gain M versus the duty cycle d is shown in Figure 5 when the turns ratio n is equal to 1 and 2.   By applying the ampere second balance principle to C 1 -C 4 , the equations can be derived as According to Figure 4a, it can be deduced that Similarly, Equation ( 16) can be derived from Figure 4b: Considering that the load is resistive, and the currents flowing into L a and L M are assumed to be constant, Equation ( 17) can be derived: In terms of Equations ( 14)-( 17), the capacitor currents can be deduced as Equations ( 18) and ( 19): The current stresses of the power switch Q and the diode D 2 can be obtained according to Figure 4a, Equations ( 18) and ( 19): Similarly, the current stresses of D 1 and D 3 can be obtained by means of Figure 4b, Equations ( 18) and ( 19):

Performance Comparisons
The proposed converter was compared to the converter in Reference [29] without considering the influence of leakage inductance.The specific comparisons are shown in Table 1.The voltage stress across the diode D 1 was larger than the output voltage in the converter of Reference [29], while the voltage stresses across all semiconductors in the proposed converter were less than the output voltage.Moreover, the proposed converter could achieve a much higher voltage gain at the cost of one more diode and one more capacitor.The voltage gain M versus the duty cycle d is shown in Figure 5 when the turns ratio n is equal to 1 and 2.

Characteristics Converter in [29] Proposed Converter
Voltage Gain

Performance Comparisons
The proposed converter was compared to the converter in Reference [29] without considering the influence of leakage inductance.The specific comparisons are shown in Table 1.The voltage stress across the diode D1 was larger than the output voltage in the converter of Reference [29], while the voltage stresses across all semiconductors in the proposed converter were less than the output voltage.Moreover, the proposed converter could achieve a much higher voltage gain at the cost of one more diode and one more capacitor.The voltage gain M versus the duty cycle d is shown in Figure 5 when the turns ratio n is equal to 1 and 2.

Experimental Results and Analysis
In order to validate the feasibility of the proposed converter, a 400-W prototype was developed, as shown in Figure 6.An adjustable DC source with a voltage range of U in = 30-100 V was used as the input of the converter to simulate a fuel cell source.The output voltage was controlled to 400 V by a voltage loop implemented on a digital signal processor (DSP) TMS320F28335.The experiment parameters are listed in Table 2.According to Equation (1), the current ripple coefficient α is defined as 0.2, and a large L a can reduce the input current ripple: Therefore, L a and L M were taken as 241 µH and 368 µH, respectively.From Equation (2), the voltage ripple ∆u is defined as 0.5 V. Considering practical experience and the laboratory conditions, C 2 -C 4 were taken as 540 µF, and C 1 was taken as 270 µF.
The voltage stresses across all of the semiconductors for d = 0.625 and U out = 400V are shown in Figure 7. Figure 7a shows the voltage stresses across Q and D 1 , which were equal to 133 V, while Figure 7b shows the voltage stresses across D 2 and D 3 , which were 267 V, which was consistent with the theoretical analysis.In addition, the energy stored in the leakage inductance was released through the diode D 1 when Q was turned off.As a result, the voltage spike across the power switch Q was reduced significantly.The current flowing into the inductor L a and the voltage across the capacitor C 1 are shown in Figure 8.The input current I in , which flowed into L a , had no fluctuation in each switching period, and neither did the voltage across C 1 .Thus, it could be concluded that input current ripple minimization was achieved, as analyzed in Section 3.2.Figure 9 shows the currents flowing into both sides of the coupled inductors.The capacitor C 2 received energy from the coupled inductors when Q was turned on.On the contrary, the current I Lp flowing into the primary side started to decrease when Q was turned off, C 2 started to discharge, and the current I Ls flowing into the secondary side transferred energy to the load through D 3 .The experimental results were consistent with the theoretical analysis.Figure 10 shows that with the voltage control loop, the output voltage Uout could be kept constant at 400 V, even when the input voltage Uin varied from 30 V to 100 V continuously.This demonstrated that the proposed converter could operate well in a wide voltage gain range from 13.33 to 4.

Input voltage
The efficiencies of the proposed converter with different input voltages and different powers were measured by a power analyzer (YOKOGAWA/WT3000), as shown in Figure 11.When the input voltage Uin = 100 V and the load power P = 400 W, the proposed converter reached a maximum conversion efficiency of 95.12%.The minimum efficiency was 89.24% when the input voltage Uin = 40 V and the load power P = 400 W. To sum up, with the same power, as the voltage gain increased (i.e., the input voltage decreased), the efficiency of the proposed converter decreased.Since the input current rose as the low-side voltage decreased, the copper loss and the switching losses of the converter rose.Therefore, the efficiency of the converter appeared to degrade at a high voltage gain.Figure 10 shows that with the voltage control loop, the output voltage U out could be kept constant at 400 V, even when the input voltage U in varied from 30 V to 100 V continuously.This demonstrated that the proposed converter could operate well in a wide voltage gain range from 13.33 to 4.

Conclusions
A coupled-inductor DC-DC converter with a high voltage gain and input current ripple minimization was proposed in this paper.The converter can obtain a wide voltage gain range, and the voltage stresses across all semiconductors are lower than the output voltage.In addition, the proposed converter can benefit from the minimization of input current ripples.Furthermore, the passive lossless clamping circuit effectively suppresses voltage spikes caused by leakage inductance.Therefore, it is a good candidate for the power interface of fuel cell vehicles.The efficiencies of the proposed converter with different input voltages and different powers were measured by a power analyzer (YOKOGAWA/WT3000), as shown in Figure 11.When the input voltage U in = 100 V and the load power P = 400 W, the proposed converter reached a maximum conversion efficiency of 95.12%.The minimum efficiency was 89.24% when the input voltage U in = 40 V and the load power P = 400 W. To sum up, with the same power, as the voltage gain increased (i.e., the input voltage decreased), the efficiency of the proposed converter decreased.Since the input current rose as the low-side voltage decreased, the copper loss and the switching losses of the converter rose.Therefore, the efficiency of the converter appeared to degrade at a high voltage gain.

Conclusions
A coupled-inductor DC-DC converter with a high voltage gain and input current ripple

Conclusions
A coupled-inductor DC-DC converter with a high voltage gain and input current ripple minimization was proposed in this paper.The converter can obtain a wide voltage gain range, and the voltage stresses across all semiconductors are lower than the output voltage.In addition, the proposed converter can benefit from the minimization of input current ripples.Furthermore, the passive lossless clamping circuit effectively suppresses voltage spikes caused by leakage inductance.Therefore, it is a good candidate for the power interface of fuel cell vehicles.

Figure 2 .
Figure 2. Current flow paths of the proposed converter in one switching period.(a) Mode A; (b) Mode B; (c) Mode C; (d) Mode D; (e) Mode E; (f) Mode F; (g) Mode G; (h) Mode H; (i) Mode I; (j) Mode J; (k) Mode K.

Figure 2 .
Figure 2. Current flow paths of the proposed converter in one switching period.(a) Mode A; (b) Mode B; (c) Mode C; (d) Mode D; (e) Mode E; (f) Mode F; (g) Mode G; (h) Mode H; (i) Mode I; (j) Mode J; (k) Mode K.

Figure 3 .
Figure 3.The simplified current waveforms of the converter.Mode A: End with iC3 dropping to 0; Mode B: End with iD3 dropping to 0; Mode C: End with iC4 dropping to 0; Mode D: End with iC1 equaling iD2; Mode E: End with iC1 dropping to 0; Mode I: End with iC3 dropping to 0; Mode J: End with iC1 dropping to 0.

Figure 3 .
Figure 3.The simplified current waveforms of the converter.Mode A: End with i C3 dropping to 0; Mode B: End with i D3 dropping to 0; Mode C: End with i C4 dropping to 0; Mode D: End with i C1 equaling i D2 ; Mode E: End with i C1 dropping to 0; Mode I: End with i C3 dropping to 0; Mode J: End with i C1 dropping to 0.

Figure 4 .
Figure 4.The current distribution in different states: (a) Q is turned on; (b) Q is turned off.

Figure 5 .
Figure 5. Curves of voltage gain versus duty cycle for two types of converters with input current

Figure 4 .
Figure 4.The current distribution in different states: (a) Q is turned on; (b) Q is turned off.When the power switch Q is turned off, the currents flowing into C 1 , C 2 , C 3 , and C 4 are I C1off , I C2off , I C3off , and I C4off ; the current flowing into L a is I Laoff ; and the currents flowing into both sides of the ideal transformer are I npoff and I nsoff .I LMoff is the current flowing into L M , and the current flowing into L r is I Lroff .I D1 is the current of D 1 , while I D3 is the current of D 3 .The input current and the output current are I inoff and I outoff , respectively.By applying the ampere second balance principle to C 1 -C 4 , the equations can be derived as

2 Figure 4 .
Figure 4.The current distribution in different states: (a) Q is turned on; (b) Q is turned off.

Figure 5 .Figure 5 .
Figure 5. Curves of voltage gain versus duty cycle for two types of converters with input current ripple minimization.

Figure 6 .Figure 6 .
Figure 6.The experimental prototype of the proposed converter.

Figure 6 .
Figure 6.The experimental prototype of the proposed converter.

Figure 8 .
Figure 8.The current flowing into the inductor La and the voltage across the capacitor C1.

Figure 7 .Figure 7 .
Figure 7. Voltage stresses across all semiconductors when U in = 50 V and U out = 400 V: (a) Voltage stresses across Q and D 1 ; (b) voltage stresses across D 2 and D 3 .

Figure 8 .
Figure 8.The current flowing into the inductor La and the voltage across the capacitor C1.Figure 8.The current flowing into the inductor L a and the voltage across the capacitor C 1 .

Figure 8 .
Figure 8.The current flowing into the inductor La and the voltage across the capacitor C1.Figure 8.The current flowing into the inductor L a and the voltage across the capacitor C 1 .

Figure 8 .
Figure 8.The current flowing into the inductor La and the voltage across the capacitor C1.

Figure 9 .
Figure 9.The currents flowing into both sides of the coupled inductor.

Figure 9 .
Figure 9.The currents flowing into both sides of the coupled inductor.

18 Figure 10 .
Figure 10.The output voltage and the wide-range input voltage from 30 V to 100 V.

Figure 11 .
Figure 11.Efficiencies of the proposed converter with different output powers at different input voltages (i.e., different voltage gains) when Uout = 400 V.

Figure 10 .
Figure 10.The output voltage and the wide-range input voltage from 30 V to 100 V.

Figure 10 .
Figure 10.The output voltage and the wide-range input voltage from 30 V to 100 V.

Figure 11 .
Figure 11.Efficiencies of the proposed converter with different output powers at different input voltages (i.e., different voltage gains) when Uout = 400 V.

Figure 11 .
Figure 11.Efficiencies of the proposed converter with different output powers at different input voltages (i.e., different voltage gains) when U out = 400 V.

Table 1 .
Comparisons of two types of converters with input current ripple minimization.