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Article

Minimum Short Circuit Ratio Requirement for MMC-HVDC Systems Based on Small-Signal Stability Analysis

1
College of Electrical Engineering, Zhejiang University, Hangzhou 310027, China
2
China Southern Grid Power Dispatching and Control Center, Guangzhou, Guangdong 510700, China
*
Author to whom correspondence should be addressed.
Energies 2019, 12(17), 3283; https://doi.org/10.3390/en12173283
Submission received: 26 June 2019 / Revised: 16 August 2019 / Accepted: 18 August 2019 / Published: 26 August 2019
(This article belongs to the Section F: Electrical Engineering)

Abstract

:
This paper determines the minimum short circuit ratio (SCR) requirement for a modular multilevel converter based high-voltage direct current (MMC-HVDC) transmission systems. Firstly, a simplified model of MMC is introduced; the MMC is represented by its AC and DC side equivalent circuit. Next, by linearizing the MMC subsystem and the DC network subsystem, the deduction of the small-signal models of MMC subsystem, the small-signal model of the DC network and MMC-HVDC are carried out successively. Thirdly, the procedure for determining the minimum SCR requirement of MMC-HVDC is described. Finally, case studies are performed on a two-terminal MMC-HVDC system under four typical control schemes. The results show that the restraint factors for the rectifier MMC is predominantly the voltage safety limit constraint, and the restraint factors for the inverter MMC are mainly the phase locked loop (PLL) or the outer reactive power controller. It is suggested that the minimum SCR requirement for the sending and the receiving systems should be 2.0 and 1.5 in the planning stage.

1. Introduction

Recently, the modular multilevel converter based high-voltage direct current (MMC-HVDC) system has drawn significant attention from both the industry and academia. As a new breed of voltage-sourced converter (VSC), MMC outperformed the Line Commutated Converter (LCC) thanks to the decoupled control of active and reactive powers, the low harmonic voltages, the flexible scalability and the elimination of commutation failure [1,2,3,4]. MMC-HVDC has been widely used in transmission and distribution applications, such as wind farm connection, multi-terminal operation, and passive network power supply [5,6,7].
In the planning stage, one of the most important characteristics for the connected AC system is the short circuit ratio (SCR). For the LCC-HVDC, detailed research has been carried out by CIGRE and IEEE in which the AC system strength is categorized by the SCR [8,9]. The AC systems with SCR less than two are defined as very low SCR systems because the connected LCC cannot operate in a consistently stable manner [8]. For MMC-HVDC, there is no commonly accepted quantitation standard for describing the strength of the connected AC system, and there are no commonly accepted answers to the following two questions: (1) What are the minimum SCR requirements for the rectifier and the inverter MMC-HVDC station to transmit rated active power, respectively? and (2) Does the minimum SCR requirement vary with different control schemes?
As pointed out in [10], the steady-state power flow constraint, the small-signal stability constraint and the transient stability constraint should be all satisfied if MMC-HVDC (VSC-HVDC) could operate stably. To determine the minimum SCR under the third constraint, a time-domain simulation of certain faults is the conventional method, given the lack of a mature analytical method. Therefore, research on the minimum SCR is usually based on the former two constraints.
By using a Thevenin voltage source, the maximum available power (MAP) of VSC is plotted, and determines how the MAP is influenced by the SCR of the connected AC system, the angle of AC system impedance, the limitation on the internal voltage of the converter, and the reactive power support [11,12]. In [13], the minimum SCR for MMC-HVDC is calculated based on the steady-state power flow constraint. Because the dynamics of the converter is neglected, the results using the steady-state power flow constraint tend to be optimistic, and the results of [11,12,13] are only the ideal theoretical minimum SCR requirements. Recently, the small-signal stability analysis has drawn great attention in academia, with which a stricter minimum SCR requirement could be calculated. An eighth-order small-signal model of a VSC connected to weak AC system is derived in [14]; the results illustrate that the dynamics of PLL and the AC filter are crucial components for system stability. On the basis of the small-signal model, the influence of SCR and the phase-locked loop (PLL) on VSC was studied, and the connected AC systems with a SCR lower than 1.3 are defined as weak systems [15]. By studying the stability difference between MMC and VSC, the maximum power transmission capability of MMC could approach VSC by adjusting the PI parameters of PLL [16]. The small-signal stability of MMC is analyzed under the rectifier and the inverter mode, and the calculated minimum SCR of rectifier/inverter is 1.28–1.72/2.84–3.04 [17]. The explicit mathematical expression for the VSC system eigenvalues is derived based on reduced order model in [18], and result shows that the small signal stability of the system is significantly affected by the AC system strength (SCR) and PLL parameters. It is pointed out in [19] that the connected AC system could be considered weak if its SCR is less than 2.0 for VSCs with the classic vector current control scheme, while the virtual synchronous generator control scheme is especially suitable for weak system connections.
Generally speaking, existed small-signal stability analysis based method has the space for improvement considering the following three aspects: First, detailed high-order, small-signal model of MMCs with internal dynamics were usually adopted [20], which are not suitable for system-level planning studies. The high-order, small-signal model necessitates substantial requirements for modeling and computation resources, and its applicability in the system planning stage is limited. Second, one-terminal MMC with ideal DC source was usually adopted for calculating the minimum SCR, regardless of the dc network and other converter stations. Third, existed work mainly focused on the influence on small signal stability by controller parameters under single control scheme, influence on small signal stability by different control schemes has not been considered.
To overcome the aforementioned shortness of the existed research, improvements of this paper are made according to the following three aspects: (1) Derive the small-signal model of MMC-HVDC based on the simplified model of MMC; the internal dynamics of the MMC such as the circulating current is ignored to achieve computational efficiency; (2) Analysis is carried out using a two-terminal MMC-HVDC; the DC side of an MMC is connected to another MMC through the DC line as opposed to an ideal DC voltage source; in comparison with the MMC with an ideal DC voltage source, the model in this paper is more realistic and provides more reasonable results; (3) Four different control schemes are analyzed and compared, which provides more comprehensive results than a single control scheme.
The outline of this paper is as follows: Section 2 discusses the theory and introduces the simplified model of MMC for determine the minimum SCR requirement. Section 3 discusses the deduction of a small-signal model for MMC-HVDC. Section 4 describes the procedure of the proposed methodology. The case studies have been conducted on a 2-terminal MMC-HVDC system with four typical control schemes in Section 5. Section 6 is the concluding section.

2. Theory and Simplified Model of Modular Multilevel Converter (MMC)

The structure of the MMC is illustrated in Figure 1. The converter consists of six arms; the upper and lower arms in the same phase form a phase unit. Each arm consists of two parts, i.e., N series-connected identical sub-modules (SMs) and an arm inductor Larm. The equivalent arm resistor, the equivalent transformer inductor and resistor are denoted as Rarm, Lt and Rt, respectively. For simplicity, only half bridge SMs [3] are considered in this paper.
As seen in Figure 1, urj and irj are the arm voltage and the arm current, where j (j = a, b, c) denotes phase and r (r = p, n) denotes the upper or lower arm. mrj and u r j are the arm average switching function and the sum of arm SM capacitor voltage [21]. ivj is the MMC AC output current in phase j. ugj is the AC voltage at the point of common coupling (PCC) in phase j. udc is the DC voltage, and idc is the DC current.
According to Kirchhoff’s voltage law, the mathematical model in phase j could be derived as follows:
u g j L t d i v j d t R t i v j L a r m d i p j d t R a r m i p j + u p j = u d c 2
u g j L t d i v j d t R t i v j + L a r m d i n j d t + R a r m i n j u n j = u d c 2
Dividing the sum of (1) and (2) by 2, the AC side model of MMC could be derived as:
{ u g j ( L t + L a r m 2 ) d i v j d t ( R t + R a r m 2 ) i v j = u v j u v j = ( u n k u p k ) / 2
By subtracting (2) from (1), the DC side model of phase j in MMC could be derived as:
{ L a r m d i c i r j d t + R a r m i c i r j = u c o m j u d c 2 u c o m j = u p j + u n j 2 ,   i c i r j = i p j + i n j 2
A summation (4) of all three phases, and the DC side model of MMC could be concluded as follows:
{ 2 3 L a r m d i d c d t + 2 3 R a r m i d c = u C e q u d c i d c = j = a , b , c i c i r j ,   u C e q = 2 3 j = a , b , c u c o m j
Because each arm of the MMC consists of a large number of SMs, it is common practice to evaluate the average voltage and current quantities of all the SMs in one arm. Suppose the average arm SM capacitor voltage and the SM capacitor are denoted as u ¯ r j and Csm, the dynamics of SM capacitor could be concluded as:
{ u r j = m r j u r j = m r j N u ¯ r j d u ¯ r j d t = d u r j N d t = m r j C s m i r j
According to [21], the arm average switching function could be denoted as in (7):
{ m p j = 1 M cos ( ω g t + φ j ) 2 m n j = 1 + M cos ( ω g t + φ j ) 2
where M, ωg and φj are the modulation index [13], the fundamental angle frequency and the initial phase of arm average switching function.
Note that, in normal operation conditions u n j u p j , uCeq in (5) could be simplified as (8) by substituting (7) into it:
u C e q = 2 3 j = a , b , c u com j = j = a , b , c 1 6 ( u p j + u n j )
On the basis of (5), (6), and (8), the DC side model of MMC could be derived as in (9):
C e q d u C e q d t = j = a , b , c u v j i v j / u C e q i d c = i d c s i d c
where Ceq = 6Csm/N. Therefore, the AC and DC side model of MMC could be respectively described as in (3), (5), and (9). The equivalent circuit of MMC is plotted in Figure 2, where uv is the phasor of the three-phase voltage uvj (j = a, b, c).

3. Deduction of Small-Signal Model for Modular Multilevel Converter Based High-Voltage Direct Current (MMC-HVDC)

3.1. Structure of Small-Signal Model

The dq-frame vector current controller is widely used in practical MMC-HVDCs. With the dq-frame vector current controller, the MMC AC voltage is generated by the inner controller, and the current orders to the inner controller are calculated from the outer controller [22]. The small-signal model for determine minimum SCR is derived based on the AC and DC side equivalent circuit that is illustrated in Section 2. As plotted in Figure 3, the dq-frame vector current controller, the MMC AC side equivalent circuit and the connected AC system could be modeled as a subsystem while the MMC DC side equivalent circuit and the DC network could be modeled as another subsystem. The basic structure of a small-signal model for an m-terminal MMC-HVDC is plotted in Figure 3.
Here in Figure 3, us, Ls and Rs are the equivalent voltage source phasor, the equivalent inductor, and the equivalent resistor of the connected AC system, respectively. Pg and Qg is the active and reactive power injecting into the MMC; Pv and Qv are the active and reactive power injecting into the voltage source uv; ug and iv denote the phasor of the three-phase voltage ugj and the three-phase current ivj (j = a, b, c); L and R are the connecting reactor and resistor between PCC and uv, which could be calculated according to Figure 2a:
{ L = L t + 0.5 L a r m R = R t + 0.5 R a r m

3.2. Small-Signal Model of MMC Subsystem

3.2.1. Small-Signal Model of Inner Controller and MMC AC Side Model

According to (3), the dq-frame mathematical model of MMC AC side could be deduced as in (11):
L d d t [ i v d i v q ] = [ u g d u g q ] [ u v d u v q ] + [ R       ω g L ω g L   R ] [ i v d i v q ]
The block diagram of the MMC AC side model together with the inner controller is plotted in Figure 4.
Here in Figure 4, ivd and ivq are the d-axis and the q-axis component of iv; ivdref and ivqref are the reference values of ivd and ivq; ugd and ugq are the d-axis and the q-axis component of ug; uvd and uvq are the d-axis and the q-axis component of uv; uvdref and uvqref are the reference value of uvd and uvq; Kpd (Kpq) and Kid (Kiq) are the proportional gain and the integral gain of the inner controller d-axis (q-axis); ωg is the instantaneous fundamental angular speed; Considering the small time-delay of modulation process, uvdref (uvqref) is supposed the same as uvd (uvq) in this paper.
In deducing the small-signal model, the prefix Δ and subscript 0 mean the small deviation and initial value of each variable. Based on the block diagram in Figure 4, the small-signal model of the MMC AC side model together with the inner controller could be derived as (12).
{ d Δ i v d d t = R L Δ i v d + K p d L ( Δ i v d r e f Δ i v d ) + 1 L Δ M i d d Δ i v q d t = R L Δ i v q + K p q L ( Δ i v q r e f Δ i v q ) + 1 L Δ M i q d Δ M i d d t = K i d ( Δ i v d r e f Δ i v d ) d Δ M i q d t = K i q ( Δ i v q r e f Δ i v q )
Here in (12), Mid (Miq) is the state variable of the inner controller d-axis (q-axis) integral part.

3.2.2. Small-Signal Model of Phase-Locked Loop (PLL)

In this paper, the widely used single synchronous reference frame phase-locked loop (SRF-PLL) [23] is studied, and its block diagram is plotted in Figure 5. As plotted in Figure 5, ugx and ugy are the x-axis and y-axis component of ug in common network frame [24]; K and K are the proportional gain and the integral gain of the PI controller; θg is the output of PLL.
Suppose M is the state variable of the integral part in the PI controller of SRF-PLL, the respectively small-signal model of PLL could be expressed as (13):
{ d Δ M i θ d t = K i θ Δ u g q d Δ θ g d t = Δ ω g = K p θ Δ u g q + Δ M i θ
On the basis of Kirchhoff’s voltage law, the dynamics of the AC system and MMC AC side equivalent circuit could be described as (14):
{ d i v d d t = u g d u v d R i v d + ω g L i v q L = u s d u g d R s i v d + ω g L s i v q L s d i v q d t = u g q u v q R i v q ω g L i v d L = u s q u g q R s i v q ω g L s i v d L s
On the basis of the linearized small-signal model of (14), Δugd and Δugq could be derived as (15):
{ Δ u g d = L L s + L Δ u s d + L s L s + L Δ u v d + R L s R s L L s + L Δ i v d Δ u g q = L L s + L Δ u s q + L s L s + L Δ u v q + R L s R s L L s + L Δ i v q
On the basis of Figure 4, the linearized small-signal model of the inner controller could be derived as (16):
{ Δ u v d = Δ u g d + ω g 0 L Δ i v q + L i v q 0 Δ ω g K p d ( Δ i v d r e f Δ i v d ) Δ M i d Δ u v q = Δ u g q ω g 0 L Δ i v d L i v d 0 Δ ω g K p q ( Δ i v q r e f Δ i v q ) Δ M i q
Note that the relationship of us in the dq-frame and the common network frame as in (17), Δusd and Δusq could be represented by usx0, usy0 and Δθg as in (18):
u s d + j u s q = ( u s x + j u s y ) e j θ g
{ Δ u s d = ( u s x 0 sin θ g 0 + u s y 0 cos θ g 0 ) Δ θ g = U d 0 Δ θ g Δ u s q = ( u s x 0 cos θ g 0 u s y 0 sin θ g 0 ) Δ θ g = U q 0 Δ θ g
where usd and usq are the d-axis and the q-axis component of us in the dq-frame; usx and usy are the x-axis and the y-axis component of us in the common network frame; Ud0 and Uq0 is the intermediate variables.
On the basis of (12)–(18), the small-signal model of the MMC AC side model, the inner controller and the PLL could be derived as (19):
d Δ x v d t = A v Δ x v + B r Δ r + B u Δ u C e q
where Δ x v = [ Δ i v d   Δ i v q   Δ M i d   Δ M i q   Δ M i θ   Δ θ g ] T , Δ r = [ Δ i v d r e f   Δ i v q r e f ] T , B u = [ 0 ] 6 × 1 ; the detailed expressions of A v and B r of which are referred to the Appendix A.

3.2.3. Small-Signal Model of MMC DC Side Current Source

The MMC DC side current source idcs could be derived based on the conservation of active power.
i d c s = u v d i v d + u v q i v q u C e q
The linearized small-signal model of (20) could be written as (21); (21) could be further simplified into (22) after eliminating Δuvd and Δuvq:
Δ i d c s = u v d 0 u C e q 0 Δ i v d + u v q 0 u C e q 0 Δ i v q + i v d 0 u C e q 0 Δ u v d + i v q 0 u C e q 0 Δ u v q i v d 0 u v d 0 + i v q 0 u v q 0 u C e q 0 2 Δ u C e q
Δ i d c s = C v Δ x v + D r Δ r + D u Δ u C e q
where the detailed expressions of C v , D r and D u of which are referred to the Appendix A.
{ d Δ x v d t = A v Δ x v + B r Δ r + B u Δ u C e q Δ i d c s = C v Δ x v + D r Δ r + D u Δ u C e q

3.2.4. Small-Signal Model of Outer Controller

Because the current order ivdref and uvqref are generated by the outer controller, the small-signal model of MMC subsystem could be deducted by eliminating in (23) with the small-signal model of outer controller.
Theoretically, the d-axis current order ivdref could be generated by the active power controller or the DC voltage controller; the q-axis current order ivqref could be generated by the reactive power controller or the AC voltage controller. Therefore, details of the small-signal model of the aforementioned four types of outer controllers can be found in the following paragraphs.
For the DC voltage controller, the small-signal model is outlined as (24), where MiUdc, KiUdc, and KpUdc are the state variable of the integral part, the proportional gain, and the integral gain of the outer controller.
{ d Δ M i U d c d t = K i U d c ( Δ u d c r e f Δ u C e q ) Δ i v d r e f = K p U d c ( Δ u d c r e f Δ u C e q ) + Δ M i U d c
For the active power controller, the small-signal model is outlined as (25), where MiPg, KiPg, and KpPg are the state variable of the integral part, the proportional gain, and the integral gain of the outer controller.
{ Δ i v d r e f = K p P g ( Δ P g r e f Δ P g ) + Δ M i P g d Δ M i P g d t = K i P g ( Δ P g r e f Δ P g )    Δ P g = u g d 0 Δ i v d + u g q 0 Δ i v q + i v d 0 Δ u g d + i v q 0 Δ u g q
For the reactive power controller, the small-signal model is outlined as (26), where MiQg, KiQg, and KpQg are the state variable of the integral part, the proportional gain, and the integral gain of the outer controller.
{   Δ i v q r e f = K p Q g ( Δ Q g r e f + Δ Q g ) + Δ M i Q g d Δ M i Q g d t = K i Q g ( Δ Q g r e f + Δ Q g )    Δ Q g = u g q 0 Δ i v d u g d 0 Δ i v q i v q 0 Δ u g d + i v d 0 Δ u g q
For the AC voltage controller, the small-signal model is outlined as (27), where MiUac, KiUac, and KpUac are the state variable of the integral part, the proportional gain, and the integral gain of the outer controller.
{ d Δ M i U g d t = K i U g ( Δ U g r e f Δ U g ) Δ i v q r e f = K p U g ( Δ U g r e f Δ U g ) + Δ M i U g Δ U g = u g d 0 Δ u g d + u g q 0 Δ u g q u g d 0 2 + u g q 0 2
After eliminating the intermediate variables such as Δugd and Δugq in (25)–(27), the small-signal model of MMC subsystem could be derived as (28) by substituting (24)–(27) into (23):
{ d Δ x v d t = A v Δ x v + B r Δ r + B u Δ u C e q   Δ i d c s = C v Δ x v + D r Δ r + D u Δ u C e q
where Av, Br, Bu, Cv, Dr, and Du differ with different outer control schemes; the small deviation of state variables Δxv and the small deviation of outer controller reference value Δr also differ with different outer control schemes. For example, if the MMC controls the DC voltage and the reactive power, Δxv and Δr could be written as (29):
{ Δ x v = [ Δ i v d   Δ i v q   Δ M i d   Δ M i q   Δ M i θ   Δ θ g   Δ M i U d c   Δ M i Q g ] T Δ r = [ Δ u d c r e f   Δ Q g r e f ] T

3.3. Small-Signal Model of DC Network

Generally speaking, there are two types of nodes in the DC network of MMC-HVDC, namely the converter station nodes and the interconnection nodes. The converter station nodes are the nodes where the DC network and the converter stations are connected, and the interconnection nodes are the nodes that do not connect to any converter station. Figure 6 outlines the DC network topology of a four-ternimal MMC-HVDC and its incidence matrix T. The element Tik in T equals 1 (−1) if the current in DC line k flows out of (into) node i; Tik equals 0 if the current in DC line k does not connect to node i.
For an m-terminal MMC-HVDC with b DC lines and n nodes, the state-space model of the DC network could be generalized as (30) after representing the DC line by its π section model:
{ C d u d t = M E i d c s T E i   L d i d t = T E T u R i
where u = [ u d c ( n × 1 ) u C e q ( m × 1 ) ] , i = [ i b r ( b × 1 ) i d c ( m × 1 ) ] , T E = [ T ( n × b ) M ( n × m ) 0 ( m × b ) I ( m × m ) ] , M ( n × m ) = [ I ( m × m ) 0 ( n m ) × m ] , M E = [ 0 ( m × m ) M ( n × m ) ] , C = d i a g [ C b r Σ ( n × 1 ) C e q ( m × 1 ) ] , L = d i a g [ L b r ( b × 1 ) L e q ( m × 1 ) ] , R = d i a g [ R b r ( b × 1 ) R e q ( m × 1 ) ] ; CbrΣ = |T|Cbr, where Cbr = [Cbr1, …, Cbrb]T is the vector of DC line capacitors; ibr = [ibr1, …, ibrb]T is the vector of DC line currents; udc = [udc1, …, udcn]T is the vector of DC node voltages; idc = [idc1, …, idcm]T is the vector of injection currents at converter station nodes; Lbr = [Lbr1, …, Lbrb]T is the vector of DC line inductors; Rbr = [Rbr1, …, Rbrb]T is the vector of DC line resistors; idcs = [idcs1, …, idcsm]T is the vector of controlled current source of MMCs; uCeq = [uCeq1, …, uCeqm]T is the vector of DC node voltages; Ceq = [Ceq1, …, Ceqm]T is the vector of MMC equivalent capacitors; Leq = [2/3Larm1 + Ldc1, …, 2/3Larmm + Ldcm]T is the vector of the MMC DC side equivalent inductors; Req = [2/3Rarm1, …, 2/3Rarmm]T is the vector of the MMC dc side equivalent resistors. I is the identical matrix; 0 is the zero matrix; diag[V] is the diagonal matrix whose i-th non zero element equals to the i-th element of vector V.
The linearized small-signal model of (30) could be derived as (31):
{ d Δ x G d t = A G Δ x G + B G Δ i d c s Δ u C e q = C G Δ x G
where Δ x G = [ Δ u ( n + m ) × 1 Δ i ( b + m ) × 1 ] , A G = [ 0 ( n + m ) × ( n + m ) C 1 T E L 1 T E T L 1 R ] , B G = [ C 1 M E 0 ( b + m ) × m ] , C G = [ 0 ( m × n ) I ( m × m ) 0 m × ( b + m ) ] .

3.4. Small-Signal Model of MMC-HVDC

According to Section 3.1, small-signal model of each MMC subsystem could be described as (28). For an m-terminal MMC-HVDC, all the m MMC subsystems could be modeled as follows:
{ d Δ x M M C d t = A M M C Δ x M M C + B M M C r Δ r r e f + B M M C u Δ u C e q Δ i d c s = C M M C Δ x M M C + D M M C r Δ r r e f + D M M C u Δ u C e q
where Δ x M M C = [ Δ x v 1 Δ x v m ] , Δ r r e f = [ Δ r 1 Δ r m ] , A M M C = d i a g [ A v 1 A v m ] , B M M C r = d i a g [ B r 1 B r m ] , B M M C u = d i a g [ B u 1 B u m ] , C M M C = d i a g [ C v 1 C v m ] , D M M C r = d i a g [ D r 1 D r m ] , D M M C u = d i a g [ D u 1 M D u m ] .
The linearized small-signal model of the whole MMC-HVDC could be derived after merging (31) and (32):
d Δ x s y s d t = A s y s Δ x s y s + B s y s Δ r r e f
where Δ x s y s = [ Δ x M M C Δ x G ] , A s y s = [ A M M C B M M C u C G B G C M M C A G + B G D M M C u C G ] , B s y s = [ B M M C r B G D M M C r ] .
On the basis of the eigenvalues of matrix Asys, the minimum SCR for MMC-HVDC could be determined considering the small-signal stability.

4. Procedure for Determining Minimum Short Circuit Radio (SCR) Based on Small-Signal Stability Analysis

4.1. Determining Steady-State Power Flow of MMC-HVDC

From the process of linearization in Section 3, it is known that matrix Asys is associated with the initial steady-state operation point. During planning stages, the operations of power systems under rated conditions are of prime concern. Therefore, the rated operation point of the MMC-HVDC system with active power and reactive power set as 1.0 pu and 0.0 pu is considered in this paper. According to the aforementioned analysis, the initial value of the state-variables xsys could be calculated directly when the power flow of MMC-HVDC is determined. Therefore, the procedure for determining the power flow of MMC-HVDC is described in this section, which contains four steps:
Step 1. Calculate the steady-state power flow of the MMC subsystem that controls the active power with the Newton-Raphson method. The steady-state power flow of MMC subsystem satisfies (34), where subscript 0 means the steady-state initial values of each variable. For the MMC station that controls the active power, the known variables in (34) are Pg0 (1.0 pu for rectifier and −1.0 pu for inverter), Qg0 (0.0 pu), Ug0 (1.0 pu), and usy0 (0.0 pu). After solving (34), θg0 equals arctan(ugy0/ugx0).
{ P g 0 = u g x 0 i v x 0 + u g y 0 i v y 0 Q g 0 = u g x 0 i v y 0 + u g y 0 i v x 0 P v 0 = u v x 0 i v x 0 + u v y 0 i v y 0 Q v 0 = u v x 0 i v y 0 + u v y 0 i v x 0 u v x 0 = u s x 0 ( R + R s ) i v x 0 + ω g 0 ( L + L s ) i v y 0 u v y 0 = u s y 0 ( R + R s ) i v y 0 ω g 0 ( L + L s ) i v x 0 u g x 0 = u s x 0 R s i v x 0 + ω g 0 L s i v y 0 u g y 0 = u s y 0 R s i v y 0 ω g 0 L s i v x 0 U g 0 = u g x 0 2 + u g y 0 2
Step 2: Calculating the steady-state power flow of the DC net subsystem by setting the DC voltage as 1.0 pu for the MMC that controls the DC voltage and the DC power, supplied by current source idcs as seen in Figure 3, as Pv0 for the MMC that controls the active power.
Step 3: Calculate the steady-state power flow of the MMC subsystem that controls the DC voltage described by (34) with the Newton–Raphson method. For the MMC station that controls the DC voltage, the known variables in (34) are Pv0 (already calculated in Step 2), Qg0 (0.0 pu), Ug0 (1.0 pu) and usy0 (0.0 pu). After solving (34), θg0 equals arctan(ugy0/ugx0).
Step 4: Transform the calculated results from the common network frame to the dq-frame with θg0 for concerned MMC subsystems.
In most studies that use small-signal analysis, the magnitude of us were supposed as a constant (usually around 1.0 pu) to determine the initial values of the state variables. However, for AC systems with small SCR, there would be a great deviation between the calculated voltage and the rated voltage at the point of common coupling (PCC) with the above assumption, and it would eventually affect the rationality of the small-signal analysis results. In accordance with LCC-HVDC, the PCC voltage is set as its rated value [25].

4.2. Procedure for Determining Minimum SCR

Procedures to determine the minimum SCR requirement of MMC-HVDC and a possible framework are described as follows:
Step 1. To calculate matrix Asys, the reference value rref, the parameters of PI controllers, and the SCR should first be specified. After selecting an initial SCR, repeat Steps 2–4.
Step 2. Calculate the MMC AC side power flow with the Newton–Raphson method. Then, calculate the initial values of the state-variables xsys based on the calculated power flow results. Derive the linearized small-signal model of the whole MMC-HVDC as described in Section 3, and determine the matrix Asys.
Step 3. Calculate the eigenvalues of matrix Asys; the small-signal stability constraint is satisfied at the specified SCR if the real part of all the eigenvalues is negative. If the small-signal stability constraint is not satisfied, stop calculation and output the smallest SCR that satisfied the small-signal stability constraint.
Step 4. If small-signal stability constraint in Step 3 is satisfied, check whether the Thevenin equivalent voltage of the AC system us is within the safety limit. In this paper, us satisfies the voltage safety limit constraint, if the magnitude of us is between 0.9 pu and 1.2 pu If us satisfies the voltage safety limit constraint, decrease the SCR by increasing the AC system impedance and go back to Step 2. Otherwise, stop calculation and output the smallest SCR that satisfied the safety limit constraint.
The respectively flowchart of the proposed procedure is outlined in Figure 7.

5. Case Study

5.1. System Parameters

The case studies are carried out based on a two-terminal MMC-HVDC, as plotted in Figure 8. To give general conclusions, the actual value and the nominalized value of the main parameters in the test system are listed in Table 1. The parameters in Table 1 approximate the two-terminal test system in [26]. For the voltages at the secondary side of the converter transformer, the base value is chosen as the rated voltage of the transformer secondary side; at the transformer primary side, the voltage base value is selected as the rated voltage at this side. The base value of DC side voltage is the rated DC voltage. The base power is supposed as the rated capacity of the MMC.
The parameters of PI controllers are listed in Table 2. The initial SCR of the sending system and the receiving system are both set as 3.0. The AC system impedance angle was supposed to be 80°, 82°, 86°, and 90°. The subscript 1 represents the variables in the rectifier MMC, and the subscript 2 represents the variables in the inverter MMC. The following four control schemes are listed in Table 3, where the reference value of DC voltage, active power, reactive power and AC voltage are set as 1.0 pu, 1.0 pu, 0.0 pu, and 1.0 pu, respectively. The reference direction of active power is from the rectifier to the inverter.

5.2. Validation Results

5.2.1. Small-Signal Stability Analysis

The validation is performed based on Control Scheme 1, the minimum SCR was studied on the assumption that the AC system impedance angle was 80°. Suppose the SCR decreases from 3.0 to 1.0 with a step of 0.01, the root locus was plotted in Figure 9 based on the procedure in Section 4.
When SCR decreases to 1.95, the calculated eigenvalues of matrix Asys are listed in Table 4. It could be concluded that the small-signal stability is satisfied. However, the equivalent voltage source of the sending system is 1.2006 pu, which exceeds the voltage safety limit. Therefore, the active power of the rectifier could not reach 1.0 pu if SCR of sending system is lower than 1.95. The equivalent voltage source of receiving system is 1.036 pu, which is within the voltage safety limit.
Then, decrease the SCR of the receiving system while maintaining the SCR of the sending system as 1.95; the system will be unstable when the SCR of the receiving system decreases to 1.36 or less. The calculated eigenvalues of matrix Asys, the state variable with the participation factor of the largest absolute value (denoted as ‘SVLPF’) and the respective participation factor (denoted as ‘LPF’) are listed in Table 5.
According to Table 5, when SCR decreases, the first eigenvalue whose real part become larger than 0 is the 23-th eigenvalue, and state variable with the participation factor of the largest absolute value is MiQg2. Therefore, the 23-th eigenvalue as well as the minimum SCR is mainly influenced by MiQg2. Because MiQg2 is in direct proportion to KiQg2, it could be concluded that the 23-th eigenvalue is mainly influenced by KiQg2. Theoretically, the minimum SCR is most sensitive to parameter KiQg2.
Next, the robustness analysis on the procedure is conducted by changing KiQg2 from half its original value to two times its original value (0.053–0.212). The calculated minimum SCR requirement of the receiving end, together with the 23-th eigenvalue, is plotted in Figure 10. The results show that the calculated minimum SCR remains unchanged with the decrease step of 0.01, although the 23-th eigenvalue changes a little with the variation of KiQg2. The robustness of the procedure is proved.

5.2.2. Time-Domain Validation

The time-domain validation was performed on PSCAD/EMTDC. The simulation results of the minimum sending end SCR and the minimum receiving end SCR are plotted in Figure 11 and Figure 12.
As seen in Figure 11 and Figure 12, Ucrj_av is average SM capacitor voltage, where j (j = a, b, c) denotes phase and r (r = p, n) denotes the upper or lower arm.
As seen in Figure 11, the rectifier MMC could not transmit 1.0 pu active power if the SCR decrease from 1.95 to 1.91. When SCR is less than 1.95, the AC system equivalent voltage source is limited to the voltage safety limit (1.2 pu), and the decrease would cause the voltage drop at PCC. In consideration of the current constraint [13], the active power of rectifier would inevitably decrease. The relevant MMC-HVDC could operate stably under this circumstance. The simulation results are consistent with the analytical results, and prove that the rectifier could not transmit 1.0 pu active power with an SCR lower than 1.95 when considering the voltage safety limit constraint.
As seen in Figure 12, the MMC-HVDC could not operate stably if the SCR of the receiving system decreases from 1.37 to 1.32. The simulation results are consistent with the analytical results by small-signal analysis and demonstrate that the MMC-HVDC could not operate stably with an SCR lower than 1.36 when transmitting 1.0 pu active power.
Although certain errors exist between the simulation results and the analytical results, the error is relatively small enough and is acceptable. Therefore, the validity of the proposed procedure to determine the minimum SCR is proved.

5.3. Minimum SCR Requirement of Four Control Schemes

5.3.1. Control Scheme 1

According to the aforementioned method, the minimum SCR requirement of Control Scheme 1 is calculated and listed in Table 6. The restraint factors for transmitting 1.0 pu active power includes the voltage safety limit constraint (denoted as ‘VSLC’) and the state-variables with the largest participate factor for the unstable mode.
According to Table 6, it can be concluded that:
(1)
The calculated minimum SCR is concerned with MMC operation mode and the AC system impedance angle. For the rectifier MMC, the minimum SCR varies 1.51–1.95, and the increase of the AC system impedance angle would make the minimum SCR decrease. For the inverter MMC, the minimum SCR varies 1.36–1.46, and the increase of the AC system impedance angle would make the minimum SCR increase.
(2)
The minimum SCR requirement for the rectifier is larger than for the inverter, which means that the SCR requirement for the connected AC system is stricter for the rectifier MMC.
(3)
For transmitting 1.0 pu active power, the restraint factor for rectifier is the voltage safety limit constraint while the restraint factor for the inverter is mainly the outer reactive power controller.

5.3.2. Control Scheme 2

The minimum SCR requirement of Control scheme 2 is calculated and listed in Table 7, and it can be concluded that:
(1)
The calculated minimum SCR is concerned with MMC operation mode and the AC system impedance angle. For the rectifier MMC, the minimum SCR varies 1.51–1.95, and the increase of AC system impedance angle would make the minimum SCR decrease. For the inverter MMC, the minimum SCR varies 1.51–1.40, and the increase of AC system impedance angle would make the minimum SCR increase.
(2)
The minimum SCR requirement for the rectifier is larger than that for the inverter, indicating that the SCR requirement for the connected AC system is stricter for the rectifier MMC.
(3)
For transmitting 1.0 pu active power, the restraint factor for rectifier is the voltage safety limit constraint; in contrast, the restraint factor for the inverter is mainly the outer reactive power controller.

5.3.3. Control Scheme 3

The minimum SCR requirement of Control Scheme 3 is calculated and listed in Table 8, and it can be concluded that:
(1)
The calculated minimum SCR is concerned with MMC operation mode and the AC system impedance angle. For the rectifier MMC, the minimum SCR varies 1.51–1.95, and the increase of AC system impedance angle would make the minimum SCR decrease. For the inverter MMC, the minimum SCR varies 1.46–1.34, and the increase of the AC system impedance angle would make the minimum SCR increase.
(2)
The minimum SCR requirement for the rectifier is larger than that for the inverter, indicating that the SCR requirement for the connected AC system is stricter for the rectifier MMC.
(3)
For transmitting 1.0 pu active power, the restraint factor for rectifier is the voltage safety limit constraint; however, the restraint factor for the inverter is mainly the PLL.

5.3.4. Control Scheme 4

The minimum SCR requirement of Control scheme 4 is calculated and listed in Table 9, and it can be concluded that:
(1)
The calculated minimum SCR is concerned with MMC operation mode and the AC system impedance angle. For the rectifier MMC, the minimum SCR varies 1.51–1.95, and the increase of AC system impedance angle would make the minimum SCR decrease. For the inverter MMC, the minimum SCR varies 1.51–1.39, and the increase of AC system impedance angle would make the minimum SCR increase.
(2)
The minimum SCR requirement for the rectifier is larger than that for the inverter, indicating that the SCR requirement for the connected AC system is stricter for the rectifier MMC.
(3)
For transmitting 1.0 pu active power, the restraint factors for the rectifier are the voltage safety limit constraint; however, the restraint factor for the inverter is mainly the PLL.

5.3.5. Comparison of Different Minimum SCR Requirements

On the basis of the calculation results listed in Table 6, Table 7, Table 8 and Table 9, it can be concluded that:
(1)
For transmitting 1.0 pu active power, the minimum SCR requirement for rectifier varies 1.51–1.95, and the increase of AC system impedance angle would make the minimum SCR decrease. The minimum SCR requirement of rectifier has nothing to do with the control scheme of rectifier MMC.
(2)
For transmitting 1.0 pu active power, the minimum SCR requirement for inverter varies 1.34–1.51, and the increase of AC system impedance angle would make the minimum SCR increase. The minimum SCR requirement is the largest when the inverter MMC controls the active power and the reactive power. The minimum SCR requirement is the lowest when the inverter MMC controls the DC and the AC voltage.
(3)
The minimum SCR requirement is higher for the rectifier MMC than for the inverter MMC. The restraint factor for the rectifier MMC is voltage safety limit constraint while the restraint factors for inverter are mainly the PLL or the outer reactive power controller.
(4)
The MMC-HVDC could keep operating stably if the SCR of the sending system is slightly lower than the minimum SCR requirement. The MMC-HVDC could not operate stably if the SCR of receiving system is slightly lower than the minimum SCR requirement.

6. Conclusions

On the basis of a small-signal stability analysis, the minimum SCR requirement for MMC-HVDC system is studied in this paper. The results show that the restraint factors for the rectifier MMC is mostly the voltage safety limit constraint, and the minimum SCR requirement of the sending system has nothing to do with the control scheme of rectifier MMC. The restraint factors for inverter MMC is mainly the PLL or the outer reactive power controller; the minimum SCR requirement is the lowest when the inverter MMC controls the DC and AC voltage. The minimum SCR requirement for the connected AC system is stricter for the rectifier; the minimum SCR requirements for the sending and the receiving systems are suggested to be 2.0 and 1.5 in the planning stage. Note that the concerned MMC-HVDC consists of half bridge SMs and adopts vector current control scheme. Future research on this topic could focus on the minimum SCR requirement for MMC-HVDC with full bridge SMs and minimum SCR requirement for MMC-HVDC with other control schemes such as the virtual synchronous generator control scheme or the power synchronization control scheme.

Author Contributions

Conceptualization, Z.X.; Methodology, Z.X. and Z.Z.; Validation, Z.Z. and G.W.; Formal Analysis, Z.Z.; Investigation, L.X., J.Y. and Z.Z.; Writing-Review & Editing, Z.Z., L.X., G.W. and J.Y.; Supervision, Z.X.

Funding

This research received no external funding.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

The detailed mathematical expression of the matrix A v , B r , C v , D r and D u are as follows:
A v = [ R + K p d L ω n 0 ω n L 0 0 0 0 R + K p q L ω n 0 ω n L 0 0 K i d 0 0 0 0 0 0 K i q 0 0 0 0 K i θ ω g 0 L s F K i θ F F 1 0 K i θ L s F L K i θ L s i v d 0 F K i θ F U q 0 K p θ ω g 0 L s F K p θ F F 1 0 K p θ L s F L F K p θ F U q 0 ]
B r = [ K p d L ω n 0 K i d 0 0 0 0 K p q L ω n 0 K i q K i θ K p q L s F L K p θ K p q L s F L ] T
{ F = 1 1 + K p θ L s i v d 0 F 1 = K p q L s + R L s L R s L F 2 = K p d L s + R L s L R s L
C v = [ C 1 u C e q 0 C 2 u C e q 0 i v d 0 ( 1 + L s / L ) u C e q 0 i v q 0 ( 1 + L s / L ) u C e q 0 0 U d 0 i v d 0 + U q 0 i v q 0 u C e q 0 ]
D r = [ K p d i v d 0 ( 1 + L s / L ) u C e q 0 K p q i v q 0 ( 1 + L s / L ) u C e q 0 ]
D u = i v d 0 u v d 0 + i v q 0 u v q 0 u C e q 0 2

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Figure 1. Basic structure of modular multilevel converter (MMC).
Figure 1. Basic structure of modular multilevel converter (MMC).
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Figure 2. AC and DC side equivalent circuit of the modular multilevel converter (MMC).
Figure 2. AC and DC side equivalent circuit of the modular multilevel converter (MMC).
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Figure 3. Basic Structure of a small-signal model.
Figure 3. Basic Structure of a small-signal model.
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Figure 4. Basic structure of MMC AC side and the inner controller.
Figure 4. Basic structure of MMC AC side and the inner controller.
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Figure 5. Basic structure of phase-locked loop (PLL).
Figure 5. Basic structure of phase-locked loop (PLL).
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Figure 6. Topology and incidence matrix of DC network.
Figure 6. Topology and incidence matrix of DC network.
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Figure 7. Flowchart for determining the minimum SCR requirement of MMC-HVDC.
Figure 7. Flowchart for determining the minimum SCR requirement of MMC-HVDC.
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Figure 8. Single-line diagram of the test system.
Figure 8. Single-line diagram of the test system.
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Figure 9. Root locus of test system with Control Scheme 1.
Figure 9. Root locus of test system with Control Scheme 1.
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Figure 10. Minimum SCR and 23-th eigenvalue of test system with different KiQg2.
Figure 10. Minimum SCR and 23-th eigenvalue of test system with different KiQg2.
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Figure 11. Simulation results of minimum sending end SCR.
Figure 11. Simulation results of minimum sending end SCR.
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Figure 12. Simulation results of minimum receiving end SCR.
Figure 12. Simulation results of minimum receiving end SCR.
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Table 1. Main Circuit Parameters of Test System.
Table 1. Main Circuit Parameters of Test System.
ItemActual ValuesNominalized Values
AC system rated voltage220 kV1.0 pu
Transformer ratio220 kV/210 kV/
Transformer rated capacity480 MVA1.2 pu
Transformer leakage inductance32.1 mH0.0833 pu
Transformer resistor0.605 Ω0.005 pu
Rated dc voltage400 kV1.0 pu
MMC rated capacity400 MVA1.0 pu
MMC arm reactor76 mH0.197 pu
MMC arm resistor0.48 Ω0.004 pu
Number of SMs per arm200/
MMC SM capacitor6667 μF25.13 pu
Smoothing reactor100 mH0.0785 pu
DC line resistor1.3 Ω0.00325 pu
DC line reactor82.7 mH0.0649 pu
DC line capacitor0.7 μF0.0879 pu
Table 2. Parameters of Proportional-Integral (PI) Controllers in Test System.
Table 2. Parameters of Proportional-Integral (PI) Controllers in Test System.
Parameters of PI ControllerProportional Gain/PuIntegral Gain/Pu
D-axis of inner controller0.00320.048
Q-axis of inner controller0.00320.048
PLL1.4141.000
DC voltage controller2.5130.126
Active power controller0.0500.160
Reactive power controller0.0500.106
AC voltage controller0.0500.160
Table 3. Studied Control Schemes for MMC-HVDC.
Table 3. Studied Control Schemes for MMC-HVDC.
Control SchemeRectifier MMCInverter MMC
1active power + reactive powerdc voltage + reactive power
2dc voltage + reactive poweractive power + reactive power
3active power + ac voltagedc voltage + ac voltage
4dc voltage + ac voltageactive power + ac voltage
Table 4. Calculated Eigenvalues of MMC-HVDC with Sending End of SCR = 1.95.
Table 4. Calculated Eigenvalues of MMC-HVDC with Sending End of SCR = 1.95.
No.EigenvalueNo.Eigenvalue
1, 2−0.0183 ± j25.22312, 13−2.502 ± j1.210
3, 4−0.0101 ± j16.93214, 15−0.194 ± j0.764
5−15.14016, 17−0.615 ± j0.509
6−15.14018, 19−0.644 ± j0.118
7−15.14020−0.036
8−15.14021−0.112
9−4.11522−0.099
10−3.97023−0.101
11−4.029
Table 5. Calculated Eigenvalues of MMC-HVDC with Receiving End of SCR = 1.36.
Table 5. Calculated Eigenvalues of MMC-HVDC with Receiving End of SCR = 1.36.
No.EigenvalueSVLPFLPFNo.EigenvalueSVLPFLPF
1−59.133θg22.55013−3.622Miq20.760
2, 3−0.0183 ± j25.223ibr10.275 ± j0.00114, 15−0.103 ± j0.873uCeq20.504 ± j0.023
4, 5−0.0101 ± j16.932idc1, idc20.25016, 17−0.615 ± j0.510θg10.507 ± j0.321
6−15.140ivd11.37818−0.581uCeq2−2.693
7−15.140ivq11.38219−0.365uCeq22.703
8−15.140ivd21.13420−0.113MiPg10.635
9−15.140ivq21.40421−0.099MiQg10.566
10−5.287Mid20.79422−0.038MiUdc21.214
11−4.115Miq11.222230.007MiQg21.029
12−4.029Mid11.212
Table 6. Minimum SCR Requirement of Control Scheme 1.
Table 6. Minimum SCR Requirement of Control Scheme 1.
Impedance Angle/°RectifierInverter
Minimum SCRRestraint FactorMinimum SCRRestraint Factor
801.95VSLC1.36MiQg2
821.85VSLC1.37MiQg2
861.67VSLC1.38MiQg2
901.51VSLC1.46VSLC
Table 7. Minimum SCR Requirement of Control Scheme 2.
Table 7. Minimum SCR Requirement of Control Scheme 2.
Impedance Angle/°RectifierInverter
Minimum SCRRestraint FactorMinimum SCRRestraint Factor
801.95VSLC1.40MiQg2
821.85VSLC1.41MiQg2
861.67VSLC1.42MiQg2
901.51VSLC1.51VSLC
Table 8. Minimum SCR Requirement of Control Scheme 3.
Table 8. Minimum SCR Requirement of Control Scheme 3.
Impedance Angle/°RectifierInverter
Minimum SCRRestraint FactorMinimum SCRRestraint Factor
801.95VSLC1.34Miθ2, θg2
821.85VSLC1.35Miθ2, θg2
861.67VSLC1.36Miθ2, θg2
901.51VSLC1.46VSLC
Table 9. Minimum SCR Requirement of Control Scheme 4.
Table 9. Minimum SCR Requirement of Control Scheme 4.
Impedance Angle/°RectifierInverter
Minimum SCRRestraint FactorMinimum SCRRestraint Factor
801.95VSLC1.39MiQg2
821.85VSLC1.40MiQg2
861.67VSLC1.41MiQg2
901.51VSLC1.51VSLC

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Zhang, Z.; Xiao, L.; Wang, G.; Yang, J.; Xu, Z. Minimum Short Circuit Ratio Requirement for MMC-HVDC Systems Based on Small-Signal Stability Analysis. Energies 2019, 12, 3283. https://doi.org/10.3390/en12173283

AMA Style

Zhang Z, Xiao L, Wang G, Yang J, Xu Z. Minimum Short Circuit Ratio Requirement for MMC-HVDC Systems Based on Small-Signal Stability Analysis. Energies. 2019; 12(17):3283. https://doi.org/10.3390/en12173283

Chicago/Turabian Style

Zhang, Zheren, Liang Xiao, Guoteng Wang, Jian Yang, and Zheng Xu. 2019. "Minimum Short Circuit Ratio Requirement for MMC-HVDC Systems Based on Small-Signal Stability Analysis" Energies 12, no. 17: 3283. https://doi.org/10.3390/en12173283

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