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Sensors 2011, 11(3), 2282-2303;

Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing

Electronics Department, University of Alcala, Alcala de Henares, Madrid 28871, Spain
Author to whom correspondence should be addressed.
Received: 10 December 2010 / Revised: 2 February 2011 / Accepted: 12 February 2011 / Published: 24 February 2011
(This article belongs to the Section Physical Sensors)
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This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely. View Full-Text
Keywords: FPGA; CMOS sensor; Ethernet; intelligent camera FPGA; CMOS sensor; Ethernet; intelligent camera

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This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

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Bravo, I.; Baliñas, J.; Gardel, A.; Lázaro, J.L.; Espinosa, F.; García, J. Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing. Sensors 2011, 11, 2282-2303.

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