Sign in to use this feature.

Years

Between: -

Subjects

remove_circle_outline
remove_circle_outline
remove_circle_outline
remove_circle_outline

Journals

Article Types

Countries / Regions

Search Results (9)

Search Parameters:
Keywords = erasure error correction

Order results
Result details
Results per page
Select all
Export citation of selected articles as:
16 pages, 4458 KB  
Article
High-Performance Garbage Collection Scheme with Low Data Transfer Overhead for NoC-Based SSDC
by Seyeon Ahn, Donghyuk Im, Donggon You and Youpyo Hong
Electronics 2024, 13(23), 4838; https://doi.org/10.3390/electronics13234838 - 7 Dec 2024
Cited by 2 | Viewed by 1775
Abstract
Solid-state drives (SSDs) have become the preferred storage solution for performance-critical applications due to their high speed, durability, and energy efficiency. However, the inherent characteristics of NAND flash memory, such as block-level erasure and data fragmentation, necessitate frequent garbage collection (GC) operations to [...] Read more.
Solid-state drives (SSDs) have become the preferred storage solution for performance-critical applications due to their high speed, durability, and energy efficiency. However, the inherent characteristics of NAND flash memory, such as block-level erasure and data fragmentation, necessitate frequent garbage collection (GC) operations to reclaim storage space. These operations, while essential, introduce significant performance overhead, particularly in modern SSD controllers (SSDCs) that utilize network-on-chip (NoC) architectures. In such architectures, GC requires substantial data transfer over interconnects for error correction, leading to increased latency and reduced throughput. This paper presents a novel GC scheme designed to minimize latency in NoC-based SSDCs. Unlike conventional methods that unconditionally transfer data for error correction, the proposed approach selectively determines the data transfer path based on the presence of errors. By leveraging the low error probability of NAND flash memory, this scheme avoids unnecessary data traversal across the interconnect, significantly reducing GC overhead. A hardware implementation using task queues ensures efficient parallelism without disrupting other operations. The experimental results demonstrate that the proposed scheme improves SSD performance across various real-world workloads, achieving up to a 26.9% reduction in average latency and a 50.0% reduction in peak latency compared to traditional GC methods. These findings highlight the potential of optimizing data traversal paths in NoC architectures, providing a scalable solution for enhancing SSD performance for diverse applications. Full article
Show Figures

Figure 1

14 pages, 1877 KB  
Article
Robust Soliton Distribution-Based Zero-Watermarking for Semi-Structured Power Data
by Lei Zhao, Yunfeng Zou, Chao Xu, Yulong Ma, Wen Shen, Qiuhong Shan, Shuai Jiang, Yue Yu, Yihan Cai, Yubo Song and Yu Jiang
Electronics 2024, 13(3), 655; https://doi.org/10.3390/electronics13030655 - 4 Feb 2024
Cited by 6 | Viewed by 2081
Abstract
To ensure the security of online-shared power data, this paper adopts a robust soliton distribution-based zero-watermarking approach for tracing semi-structured power data. The method involves extracting partial key-value pairs to generate a feature sequence, processing the watermark into an equivalent number of blocks. [...] Read more.
To ensure the security of online-shared power data, this paper adopts a robust soliton distribution-based zero-watermarking approach for tracing semi-structured power data. The method involves extracting partial key-value pairs to generate a feature sequence, processing the watermark into an equivalent number of blocks. Robust soliton distribution from erasure codes and redundant error correction codes is utilized to generate an intermediate sequence. Subsequently, the error-corrected watermark information is embedded into the feature sequence, creating a zero-watermark for semi-structured power data. In the tracking process, the extraction and analysis of the robust zero-watermark associated with the tracked data facilitate the effective identification and localization of data anomalies. Experimental and simulation validation demonstrates that this method, while ensuring data security, achieves a zero-watermark extraction success rate exceeding 98%. The proposed approach holds significant application value for data monitoring and anomaly tracking in power systems. Full article
(This article belongs to the Special Issue Knowledge Information Extraction Research)
Show Figures

Figure 1

14 pages, 361 KB  
Communication
Multiscale Entanglement Renormalization Ansatz: Causality and Error Correction
by Domenico Pomarico
Dynamics 2023, 3(3), 622-635; https://doi.org/10.3390/dynamics3030033 - 18 Sep 2023
Cited by 4 | Viewed by 3906
Abstract
Computational complexity reduction is at the basis of a new formulation of many-body quantum states according to tensor network ansatz, originally framed in one-dimensional lattices. In order to include long-range entanglement characterizing phase transitions, the multiscale entanglement renormalization ansatz (MERA) defines a sequence [...] Read more.
Computational complexity reduction is at the basis of a new formulation of many-body quantum states according to tensor network ansatz, originally framed in one-dimensional lattices. In order to include long-range entanglement characterizing phase transitions, the multiscale entanglement renormalization ansatz (MERA) defines a sequence of coarse-grained lattices, obtained by targeting the map of a scale-invariant system into an identical coarse-grained one. The quantum circuit associated with this hierarchical structure includes the definition of causal relations and unitary extensions, leading to the definition of ground subspaces as stabilizer codes. The emerging error correcting codes are referred to logical indices located at the highest hierarchical level and to physical indices yielded by redundancy, framed in the AdS-CFT correspondence as holographic quantum codes with bulk and boundary indices, respectively. In a use-case scenario based on errors consisting of spin erasure, the correction is implemented as the reconstruction of a bulk local operator. Full article
Show Figures

Figure 1

15 pages, 389 KB  
Article
Power Control of Reed–Solomon-Coded OFDM Systems in Rayleigh Fading Channels
by Younggil Kim
Information 2023, 14(4), 247; https://doi.org/10.3390/info14040247 - 20 Apr 2023
Cited by 1 | Viewed by 1672
Abstract
Power control in an RS-coded orthogonal frequency division multiplex (OFDM) system with error-and-erasure correction decoding in Rayleigh fading channels was investigated. The power of each symbol within a codeword was controlled to reduce the codeword error rate (WER). Several RS-coded OFDM systems with [...] Read more.
Power control in an RS-coded orthogonal frequency division multiplex (OFDM) system with error-and-erasure correction decoding in Rayleigh fading channels was investigated. The power of each symbol within a codeword was controlled to reduce the codeword error rate (WER). Several RS-coded OFDM systems with power control are proposed. The WERs of the proposed systems as a function of the signal-to-noise ratio per bit were derived. We found that channel inversion at the transmitter in combination with the erasure generation by ordering fading amplitudes at the receiver provided the lowest WER among the considered systems. Furthermore, the erasure generation by ordering fading amplitudes was found to be better than the erasure generation by comparing fading amplitudes with a threshold. Full article
(This article belongs to the Section Wireless Technologies)
Show Figures

Figure 1

21 pages, 3542 KB  
Article
Security Enhanced Symmetric Key Encryption Employing an Integer Code for the Erasure Channel
by Miodrag J. Mihaljević, Aleksandar Radonjić, Lianhai Wang and Shujiang Xu
Symmetry 2022, 14(8), 1709; https://doi.org/10.3390/sym14081709 - 17 Aug 2022
Cited by 2 | Viewed by 2467
Abstract
An instance of the framework for cryptographic security enhancement of symmetric-key encryption employing a dedicated error correction encoding is addressed. The main components of the proposal are: (i) a dedicated error correction coding and (ii) the use of a dedicated simulator of the [...] Read more.
An instance of the framework for cryptographic security enhancement of symmetric-key encryption employing a dedicated error correction encoding is addressed. The main components of the proposal are: (i) a dedicated error correction coding and (ii) the use of a dedicated simulator of the noisy channel. The proposed error correction coding is designed for the binary erasure channel where at most one bit is erased in each codeword byte. The proposed encryption has been evaluated in the traditional scenario where we consider the advantage of an attacker to correctly decide to which of two known messages the given ciphertext corresponds. The evaluation shows that the proposed encryption provides a reduction of the considered attacker’s advantage in comparison with the initial encryption setting. The implementation complexity of the proposed encryption is considered, and it implies a suitable trade-off between increased security and increased implementation complexity. Full article
(This article belongs to the Special Issue The Advances in Algebraic Coding Theory)
Show Figures

Figure 1

10 pages, 1932 KB  
Article
An Approach for Security Enhancement of Certain Encryption Schemes Employing Error Correction Coding and Simulated Synchronization Errors
by Miodrag J. Mihaljević, Lianhai Wang and Shujiang Xu
Entropy 2022, 24(3), 406; https://doi.org/10.3390/e24030406 - 14 Mar 2022
Cited by 5 | Viewed by 2736
Abstract
An approach for the cryptographic security enhancement of encryption is proposed and analyzed. The enhancement is based on the employment of a coding scheme and degradation of the ciphertext. From the perspective of the legitimate parties that share a secret key, the degradation [...] Read more.
An approach for the cryptographic security enhancement of encryption is proposed and analyzed. The enhancement is based on the employment of a coding scheme and degradation of the ciphertext. From the perspective of the legitimate parties that share a secret key, the degradation appears as a transmission of the ciphertext through a binary erasure channel. On the other hand, from the perspective of an attacker the degradation appears as a transmission of the ciphertext over a binary deletion channel. Cryptographic security enhancement is analyzed based on the capacity of the related binary deletion channel. An illustrative implemementation framework is pointed out. Full article
(This article belongs to the Special Issue Information Theoretical Security and Privacy)
Show Figures

Figure 1

15 pages, 1736 KB  
Article
Differentiated Protection and Hot/Cold-Aware Data Placement Policies through k-Means Clustering Analysis for 3D-NAND SSDs
by Seungwoo Son and Jaeho Kim
Electronics 2022, 11(3), 398; https://doi.org/10.3390/electronics11030398 - 28 Jan 2022
Cited by 3 | Viewed by 4159
Abstract
3D-NAND flash memory provides high capacity per unit area by stacking 2D-NAND cells having a planar structure. However, because of the nature of the lamination process, the frequency of error occurrence varies depending on each layer or physical cell location. This phenomenon becomes [...] Read more.
3D-NAND flash memory provides high capacity per unit area by stacking 2D-NAND cells having a planar structure. However, because of the nature of the lamination process, the frequency of error occurrence varies depending on each layer or physical cell location. This phenomenon becomes more pronounced as the number of flash memory write/erase (Program/Erasure) operations increases. Error correction code (ECC) is used for error correction in the majority of flash-based storage devices, such as SSDs (Solid State Drive). As this method provides a constant level of data protection for all-flash memory pages, there is a limitation in 3D-NAND flash memory, where the error rate varies depending on physical location. Consequently, in this paper, pages and layers with varying error rates are classified into clusters using the k-means machine-learning algorithm, and each cluster is assigned a different level of data protection strength. We classify pages and layers based on the number of error occurrences measured at the end of the endurance test, and for areas vulnerable to errors, it is shown as an example of providing differentiated data protection strength by adding parity data to the stripe. Furthermore, areas vulnerable to retention errors are identified based on retention error rates, and bit error rates are significantly reduced through our hot/cold-aware data placement policy. We show that the proposed differential data protection and hot/cold-aware data placement policies improve the reliability and lifespan of 3D-NAND flash memory compared with the existing ECC- or RAID-type data protection scheme. Full article
(This article belongs to the Special Issue Emerging Memory Technologies for Next-Generation Applications)
Show Figures

Figure 1

22 pages, 4160 KB  
Article
LoRa Channel Characterization for Flexible and High Reliability Adaptive Data Rate in Multiple Gateways Networks
by Ulysse Coutaud, Martin Heusse and Bernard Tourancheau
Computers 2021, 10(4), 44; https://doi.org/10.3390/computers10040044 - 2 Apr 2021
Cited by 12 | Viewed by 7122
Abstract
We characterize the LoRa channel in terms of multi-path fading, loss burstiness, and assess the benefits of Forward Error Correction as well as the influence of frame length. We make these observations by synthesizing extensive experimental measurements realized with The Things Network in [...] Read more.
We characterize the LoRa channel in terms of multi-path fading, loss burstiness, and assess the benefits of Forward Error Correction as well as the influence of frame length. We make these observations by synthesizing extensive experimental measurements realized with The Things Network in a medium size city. We then propose to optimize the LoRaWAN Adaptive Data Rate algorithm based on this refined LoRa channel characterization and taking into account the LoRaWAN inherent macro-diversity from multi-gateway reception. Firstly, we propose ADRopt, which adjusts Spreading Factor and frame repetition number to maintain the communication below a target Packet Error Rate ceiling with optimized Time-On-Air. Secondly, we propose ADRIFECC, an extension of ADRopt in case an Inter-Frame Erasure Correction Code is available. The resulting protocol provides very high reliability even over low quality channels, with comparable Time on Air and similar downlink usage as the currently deployed mechanism. Simulations corroborate the analysis, both over a synthetic random wireless link and over replayed real-world packet transmission traces. Full article
Show Figures

Figure 1

11 pages, 615 KB  
Article
A Security Enhanced Encryption Scheme and Evaluation of Its Cryptographic Security
by Miodrag J. Mihaljević
Entropy 2019, 21(7), 701; https://doi.org/10.3390/e21070701 - 17 Jul 2019
Cited by 8 | Viewed by 4001
Abstract
An approach for security enhancement of a class of encryption schemes is pointed out and its security is analyzed. The approach is based on certain results of coding and information theory regarding communication channels with erasures and deletion errors. In the security enhanced [...] Read more.
An approach for security enhancement of a class of encryption schemes is pointed out and its security is analyzed. The approach is based on certain results of coding and information theory regarding communication channels with erasures and deletion errors. In the security enhanced encryption scheme, the wiretapper faces a problem of cryptanalysis after a communication channel with bits deletion and a legitimate party faces a problem of decryption after a channel with bit erasures. This paper proposes the encryption-decryption paradigm for the security enhancement of lightweight block ciphers based on dedicated error-correction coding and a simulator of the deletion channel controlled by the secret key. The security enhancement is analyzed in terms of the related probabilities, equivocation, mutual information and channel capacity. The cryptographic evaluation of the enhanced encryption includes employment of certain recent results regarding the upper-bounds on the capacity of channels with deletion errors. It is shown that the probability of correct classification which determines the cryptographic security depends on the deletion channel capacity, i.e., the equivocation after this channel, and number of codewords in employed error-correction coding scheme. Consequently, assuming that the basic encryption scheme has certain security level, it is shown that the security enhancement factor is a function of the deletion rate and dimension of the vectors subject to error-correction encoding, i.e., dimension of the encryption block. Full article
(This article belongs to the Special Issue Information-Theoretic Security II)
Show Figures

Figure 1

Back to TopTop