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Keywords = I/O (Input/Output) board

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29 pages, 22193 KiB  
Article
Rectenna System Development Using Harmonic Balance and S-Parameters for an RF Energy Harvester
by Muhamad Nurarif Bin Md Jamil, Madiah Omar, Rosdiazli Ibrahim, Kishore Bingi and Mochammad Faqih
Sensors 2024, 24(9), 2843; https://doi.org/10.3390/s24092843 - 29 Apr 2024
Viewed by 2315
Abstract
With the escalating demand for Radio Frequency Identification (RFID) technology and the Internet of Things (IoT), there is a growing need for sustainable and autonomous power solutions to energize low-powered devices. Consequently, there is a critical imperative to mitigate dependency on batteries during [...] Read more.
With the escalating demand for Radio Frequency Identification (RFID) technology and the Internet of Things (IoT), there is a growing need for sustainable and autonomous power solutions to energize low-powered devices. Consequently, there is a critical imperative to mitigate dependency on batteries during passive operation. This paper proposes the conceptual framework of rectenna architecture-based radio frequency energy harvesters’ performance, specifically optimized for low-power device applications. The proposed prototype utilizes the surroundings’ Wi-Fi signals within the 2.4 GHz frequency band. The design integrates a seven-stage Cockroft-Walton rectifier featuring a Schottky diode HSMS286C and MA4E2054B1-1146T, a low-pass filter, and a fractal antenna. Preliminary simulations conducted using Advanced Design System (ADS) reveal that a voltage of 3.53 V can be harvested by employing a 1.57 mm thickness Rogers 5880 printed circuit board (PCB) substrate with an MA4E2054B1-1146T rectifier prototype, given a minimum power input of −10 dBm (0.1 mW). Integrating the fabricated rectifier and fractal antenna successfully yields a 1.5 V DC output from Wi-Fi signals, demonstrable by illuminating a red LED. These findings underscore the viability of deploying a fractal antenna-based radio frequency (RF) harvester for empowering small electronic devices. Full article
(This article belongs to the Special Issue Hardware Enablement of Integrated Sensing and Communication Systems)
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17 pages, 10859 KiB  
Article
A Reconfigurable Local Oscillator Harmonic Mixer with Simultaneous Phase Shifting and Image Rejection
by Bin Wu, Chaoyue Zheng, Hao Zhang and Qingchun Zhao
Electronics 2024, 13(5), 971; https://doi.org/10.3390/electronics13050971 - 3 Mar 2024
Viewed by 1553
Abstract
The multibeam high-throughput satellites (HTS) are regarded as a crucial component in the forthcoming space-based Internet of Things (S-IoT) network. The multi-band frequency conversion capability of HTS is essential for achieving high-capacity information interconnection in the S-IoT network. To enhance the frequency conversion [...] Read more.
The multibeam high-throughput satellites (HTS) are regarded as a crucial component in the forthcoming space-based Internet of Things (S-IoT) network. The multi-band frequency conversion capability of HTS is essential for achieving high-capacity information interconnection in the S-IoT network. To enhance the frequency conversion capability of the on-board payload, a reconfigurable local oscillator (LO) harmonic mixer with simultaneous phase shifting and image-rejection is proposed and demonstrated based on a polarization division multiplexing dual-parallel Mach–Zehnder modulator (PDM-DPMZM). By adjusting the input radio frequency (RF) signal and direct current (DC) bias voltage of the modulator, four different LO frequency-multiplication mixing functions can be achieved. The phase of the generated signal can be flexibly tuned over a full 360° range by controlling the angle α between the polarization direction of the polarizer and one axis of the modulator, and it has a flat amplitude response. When combined with an optical frequency comb, the scheme can be extended to a multi-channel multi-band frequency conversion system with an independent phase tuning capability. Additionally, by adjusting the phase difference between dual channel output signals, it can be reconfigured to implement in-phase/quadrature (I/Q) mixing, double-balanced mixing and image-reject mixing. Full article
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13 pages, 7797 KiB  
Article
Reliability Evaluation of Board-Level Flip-Chip Package under Coupled Mechanical Compression and Thermal Cycling Test Conditions
by Meng-Kai Shih, Yu-Hao Liu, Calvin Lee and C. P. Hung
Materials 2023, 16(12), 4291; https://doi.org/10.3390/ma16124291 - 9 Jun 2023
Cited by 5 | Viewed by 4371
Abstract
Flip Chip Ball Grid Array (FCBGA) packages, together with many other heterogeneous integration packages, are widely used in high I/O (Input/Output) density and high-performance computing applications. The thermal dissipation efficiency of such packages is often improved through the use of an external heat [...] Read more.
Flip Chip Ball Grid Array (FCBGA) packages, together with many other heterogeneous integration packages, are widely used in high I/O (Input/Output) density and high-performance computing applications. The thermal dissipation efficiency of such packages is often improved through the use of an external heat sink. However, the heat sink increases the solder joint inelastic strain energy density, and thus reduces the board-level thermal cycling test reliability. The present study constructs a three-dimensional (3D) numerical model to investigate the solder joint reliability of a lidless on-board FCBGA package with heat sink effects under thermal cycling testing, in accordance with JEDEC standard test condition G (a thermal range of −40 to 125 °C and a dwell/ramp time of 15/15 min). The validity of the numerical model is confirmed by comparing the predicted warpage of the FCBGA package with the experimental measurements obtained using a shadow moiré system. The effects of the heat sink and loading distance on the solder joint reliability performance are then examined. It is shown that the addition of the heat sink and a longer loading distance increase the solder ball creep strain energy density (CSED) and degrade the package reliability performance accordingly. Full article
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6 pages, 1229 KiB  
Proceeding Paper
Visualisation and Analysis of Digital and Analog Temperature Sensors in PV Generator through IoT Software
by Isaías González, Francisco Javier Folgado and Antonio José Calderón
Eng. Proc. 2022, 27(1), 59; https://doi.org/10.3390/ecsa-9-13283 - 1 Nov 2022
Cited by 3 | Viewed by 1265
Abstract
Temperature is a critical factor for the performance and operation of photovoltaic (PV) generators, whose efficiency and electrical generation decreases as the temperature rises. For this reason, it is essential to sensor PV modules in order to continuously measure and track their operating [...] Read more.
Temperature is a critical factor for the performance and operation of photovoltaic (PV) generators, whose efficiency and electrical generation decreases as the temperature rises. For this reason, it is essential to sensor PV modules in order to continuously measure and track their operating temperature. This paper presents a network of digital temperature sensors (DS18B20) and a set of analogue sensors (PT-100) for a 1.1 kW polycrystalline PV array. The physical layout of the sensors on the modules is different depending on the nature of sensor for comparison purposes. These sensors are described in terms of their implementation and configuration, as well as the advantages and disadvantages of each installation. In addition, a model that estimates cell temperature from ambient temperature and incident solar irradiance is incorporated. Regarding data acquisition, an industrial controller and a remote input/output unit gather analogue measurements, whereas a low-cost Arduino board retrieves data from the digital sensors network. Both sensor signals are stored in a database, so experimental measurements and estimated data are visualised simultaneously using a web-based IoT software (Grafana) in real time. Finally, results under real operating conditions are reported and the data are analysed, proving the suitability between each sensor type and the model. Full article
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20 pages, 3876 KiB  
Article
Expandable On-Board Real-Time Edge Computing Architecture for Luojia3 Intelligent Remote Sensing Satellite
by Zhiqi Zhang, Zhuo Qu, Siyuan Liu, Dehua Li, Jinshan Cao and Guangqi Xie
Remote Sens. 2022, 14(15), 3596; https://doi.org/10.3390/rs14153596 - 27 Jul 2022
Cited by 28 | Viewed by 3783
Abstract
Since the data generation rate of high-resolution satellites is increasing rapidly, to relieve the stress of data downloading and processing systems while enhancing the time efficiency of information acquisition, it is important to deploy on-board edge computing on satellites. However, the volume, weight, [...] Read more.
Since the data generation rate of high-resolution satellites is increasing rapidly, to relieve the stress of data downloading and processing systems while enhancing the time efficiency of information acquisition, it is important to deploy on-board edge computing on satellites. However, the volume, weight, and computability of on-board systems are strictly limited by the harsh space environment. Therefore, it is very difficult to match the computability and the requirements of diversified intelligent applications. Currently, this problem has become the first challenge of the practical deployment of on-board edge computing. To match the actual requirements of the Luojia3 satellite of Wuhan University, this manuscript proposes a three-level edge computing architecture based on a System-on-Chip (SoC) for low power consumption and expandable on-board processing. First, a transfer level is designed to focus on hardware communications and Input/Output (I/O) works while maintaining a buffer to store image data for upper levels temporarily. Second, a processing framework that contains a series of libraries and Application Programming Interfaces (APIs) is designed for the algorithms to easily build parallel processing applications. Finally, an expandable level contains multiple intelligent remote sensing applications that perform data processing efficiently using base functions, such as instant geographic locating and data picking, stream computing balance model, and heterogeneous parallel processing strategy that are provided by the architecture. It is validated by the performance improvement experiment that following this architecture, using these base functions can help the Region of Interest (ROI) system geometric correction fusion algorithm to be 257.6 times faster than the traditional method that processes scene by scene. In the stream computing balance experiment, relying on this architecture, the time-consuming algorithm ROI stabilization production can maintain stream computing balance under the condition of insufficient computability. We predict that based on this architecture, with the continuous development of device computability, the future requirements of on-board computing could be better matched. Full article
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15 pages, 5152 KiB  
Article
FASSVid: Fast and Accurate Semantic Segmentation for Video Sequences
by Jose Portillo-Portillo, Gabriel Sanchez-Perez, Linda K. Toscano-Medina, Aldo Hernandez-Suarez, Jesus Olivares-Mercado, Hector Perez-Meana, Pablo Velarde-Alvarado, Ana Lucila Sandoval Orozco and Luis Javier García Villalba
Entropy 2022, 24(7), 942; https://doi.org/10.3390/e24070942 - 7 Jul 2022
Cited by 2 | Viewed by 3272
Abstract
Most of the methods for real-time semantic segmentation do not take into account temporal information when working with video sequences. This is counter-intuitive in real-world scenarios where the main application of such methods is, precisely, being able to process frame sequences as quickly [...] Read more.
Most of the methods for real-time semantic segmentation do not take into account temporal information when working with video sequences. This is counter-intuitive in real-world scenarios where the main application of such methods is, precisely, being able to process frame sequences as quickly and accurately as possible. In this paper, we address this problem by exploiting the temporal information provided by previous frames of the video stream. Our method leverages a previous input frame as well as the previous output of the network to enhance the prediction accuracy of the current input frame. We develop a module that obtains feature maps rich in change information. Additionally, we incorporate the previous output of the network into all the decoder stages as a way of increasing the attention given to relevant features. Finally, to properly train and evaluate our methods, we introduce CityscapesVid, a dataset specifically designed to benchmark semantic video segmentation networks. Our proposed network, entitled FASSVid improves the mIoU accuracy performance over a standard non-sequential baseline model. Moreover, FASSVid obtains state-of-the-art inference speed and competitive mIoU results compared to other state-of-the-art lightweight networks, with significantly lower number of computations. Specifically, we obtain 71% of mIoU in our CityscapesVid dataset, running at 114.9 FPS on a single NVIDIA GTX 1080Ti and 31 FPS on the NVIDIA Jetson Nano embedded board with images of size 1024×2048 and 512×1024, respectively. Full article
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9 pages, 5927 KiB  
Article
Embedded GPU Implementation for High-Performance Ultrasound Imaging
by Stefano Rossi and Enrico Boni
Electronics 2021, 10(8), 884; https://doi.org/10.3390/electronics10080884 - 8 Apr 2021
Cited by 2 | Viewed by 3960
Abstract
Methods of increasing complexity are currently being proposed for ultrasound (US) echographic signal processing. Graphics Processing Unit (GPU) resources allowing massive exploitation of parallel computing are ideal candidates for these tasks. Many high-performance US instruments, including open scanners like ULA-OP 256, have an [...] Read more.
Methods of increasing complexity are currently being proposed for ultrasound (US) echographic signal processing. Graphics Processing Unit (GPU) resources allowing massive exploitation of parallel computing are ideal candidates for these tasks. Many high-performance US instruments, including open scanners like ULA-OP 256, have an architecture based only on Field-Programmable Gate Arrays (FPGAs) and/or Digital Signal Processors (DSPs). This paper proposes the implementation of the embedded NVIDIA Jetson Xavier AGX module on board ULA-OP 256. The system architecture was revised to allow the introduction of a new Peripheral Component Interconnect Express (PCIe) communication channel, while maintaining backward compatibility with all other embedded computing resources already on board. Moreover, the Input/Output (I/O) peripherals of the module make the ultrasound system independent, freeing the user from the need to use an external controlling PC. Full article
(This article belongs to the Special Issue Advanced Embedded HW/SW Development)
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15 pages, 9290 KiB  
Article
Monitoring and Analyzing of Circadian and Ultradian Locomotor Activity Based on Raspberry-Pi
by Vittorio Pasquali, Riccardo Gualtieri, Giuseppe D’Alessandro, Maria Granberg, David Hazlerigg, Marco Cagnetti and Fabio Leccese
Electronics 2016, 5(3), 58; https://doi.org/10.3390/electronics5030058 - 15 Sep 2016
Cited by 20 | Viewed by 6804
Abstract
A new device based on the Raspberry-Pi to monitor the locomotion of Arctic marine invertebrates and to analyze chronobiologic data has been made, tested and deployed. The device uses infrared sensors to monitor and record the locomotor activity of the animals, which is [...] Read more.
A new device based on the Raspberry-Pi to monitor the locomotion of Arctic marine invertebrates and to analyze chronobiologic data has been made, tested and deployed. The device uses infrared sensors to monitor and record the locomotor activity of the animals, which is later analyzed. The software package consists of two separate scripts: the first designed to manage the acquisition and the evolution of the experiment, the second designed to generate actograms and perform various analyses to detect periodicity in the data (e.g., Fourier power spectra, chi-squared periodograms, and Lomb–Scargle periodograms). The data acquisition hardware and the software has been previously tested during an Arctic mission with an arctic marine invertebrate. Full article
(This article belongs to the Special Issue Raspberry Pi Technology)
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18 pages, 519 KiB  
Article
Development of a Real Time Sparse Non-Negative Matrix Factorization Module for Cochlear Implants by Using xPC Target
by Hongmei Hu, Agamemnon Krasoulis, Mark Lutman and Stefan Bleeck
Sensors 2013, 13(10), 13861-13878; https://doi.org/10.3390/s131013861 - 14 Oct 2013
Cited by 6 | Viewed by 7793
Abstract
Cochlear implants (CIs) require efficient speech processing to maximize information transmission to the brain, especially in noise. A novel CI processing strategy was proposed in our previous studies, in which sparsity-constrained non-negative matrix factorization (NMF) was applied to the envelope matrix in order [...] Read more.
Cochlear implants (CIs) require efficient speech processing to maximize information transmission to the brain, especially in noise. A novel CI processing strategy was proposed in our previous studies, in which sparsity-constrained non-negative matrix factorization (NMF) was applied to the envelope matrix in order to improve the CI performance in noisy environments. It showed that the algorithm needs to be adaptive, rather than fixed, in order to adjust to acoustical conditions and individual characteristics. Here, we explore the benefit of a system that allows the user to adjust the signal processing in real time according to their individual listening needs and their individual hearing capabilities. In this system, which is based on MATLABR , SIMULINKR and the xPC TargetTM environment, the input/outupt (I/O) boards are interfaced between the SIMULINK blocks and the CI stimulation system, such that the output can be controlled successfully in the manner of a hardware-in-the-loop (HIL) simulation, hence offering a convenient way to implement a real time signal processing module that does not require any low level language. The sparsity constrained parameter of the algorithm was adapted online subjectively during an experiment with normal-hearing subjects and noise vocoded speech simulation. Results show that subjects chose different parameter values according to their own intelligibility preferences, indicating that adaptive real time algorithms are beneficial to fully explore subjective preferences. We conclude that the adaptive real time systems are beneficial for the experimental design, and such systems allow one to conduct psychophysical experiments with high ecological validity. Full article
(This article belongs to the Special Issue State-of-the-Art Sensors Technology in the UK 2013)
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