Next Article in Journal
A 0.5-V Four-Stage Amplifier Using Cross-Feedforward Positive Feedback Frequency Compensation
Previous Article in Journal
A Survey of Automotive Radar and Lidar Signal Processing and Architectures
Previous Article in Special Issue
Hybrid Inverter-Based Fully Differential Operational Transconductance Amplifiers
 
 
Review
Peer-Review Record

Winner-Take-All and Loser-Take-All Circuits: Architectures, Applications and Analytical Comparison

Chips 2023, 2(4), 262-278; https://doi.org/10.3390/chips2040016
by Ehsan Rahiminejad 1,* and Hamed Aminzadeh 2,*
Reviewer 1:
Reviewer 3: Anonymous
Chips 2023, 2(4), 262-278; https://doi.org/10.3390/chips2040016
Submission received: 29 July 2023 / Revised: 29 September 2023 / Accepted: 30 October 2023 / Published: 8 November 2023
(This article belongs to the Special Issue State-of-the-Art in Integrated Circuit Design)

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

The paper explores different winner-take-all (WTA) and loser-take-all (LTA) circuits in the literature. 

The paper is limited to the analysis of existing circuits so, from the novelty point of view, it remains poor. Moreover, the comparison is made for very different technology nodes (2.4um down to 40nm) and, it is hard to have a fair comparison (for example, an older style topology might be comparable to a newer topology if both are built in the same nanometer process).

The comparison section is really confusing. No clear recommendations are provided to the designer for choosing the best topology for a typical application or specification. Likewise, no design procedures/strategies or suggestions are given that would have added strength to the document.

Other points

- In the description of the WTA circuit from line 107 to 132 I suggest to refer to a figure, because the operating principle is hard to follow.

- Fig. 3 is different from the topology introduced in [24] and is wrong. You have the series of two diode connected transistors from VDD to GND!

- In line 351 you claim "From the accuracy point of view, BT topologies have a significant preference". Subsequently, you wrote (lines 367-368) "Unfortunately, little data is available concerning the accuracy of BT circuits, which should be because accuracy not being a challenge for BT configurations" which means that you do not have an adequate number of data to say that BT topologies are better from the accuracy point of view.

 

Comments on the Quality of English Language

- English must be carefully checked.

- The text presents several typographic errors.

- Numbers following words must be separated by a space.

Author Response

The authors wish to thank the Reviewers for the effort in reviewing the manuscript and for their positive comments. The replies to all the concerns and suggestions are reported in the revised manuscript and the changes are also highlighted.

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

The Authors present a review of Winner Take All and Loser Take All circuits and architecture approaches. They propose a classification based on the type of operation (parallel vs binary tree) and consider separately time-domain approaches. Recent results for all three categories are reported and discussed, and compared to assess relative pros and cons.

Some comments:
- even if all circuits are referenced, it could be useful to add more schematics in the paper (e.g. [10, 25, 35]. However check page limits)
- it could be interesting to add considerations on how resoòution and accuracy are affected by the different approaches
- in the comparison, circuits referring to quite different technological nodes are reported. The Authors could add considerations on the technology to the comparison

Author Response

The authors wish to thank the Reviewers for the effort in reviewing the manuscript and for their positive comments. The replies to all the concerns and suggestions are reported in the revised manuscript and the changes are also highlighted.

Author Response File: Author Response.pdf

Reviewer 3 Report

Comments and Suggestions for Authors

Following your review in WTA/LTA, the overall quality is readable. It seems beneficial to the readers, especially in Figs. 16 and 17. However, lots of grammars must be improved.

For examples:

1.      In Lines 90, 91 and 93, “Mi2, Mi1, Mi2increases, Mi2” should be “Mi2, Mi1, Mi2 increases, Mi2”.

2.      In Lines 135 and 136, “Vx” should be “Vx”, compared with Fig. 3

3.      In Line 162, “Figure5is” should be “Figure 5 is “.

4.      In Lines 163 and 165, the format of “U” with Figure 5 is not consistent.

5.      In Line 175, “TransistorM8 and M9constitute” should be “Transistor M8 and M9 constitute”.

Please watch all of article again.

Comments on the Quality of English Language

The English quality should be amended more.

Author Response

The authors wish to thank the Reviewers for the effort in reviewing the manuscript and for their positive comments. The replies to all the concerns and suggestions are reported in the revised manuscript and the changes are also highlighted.

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

The authors addressed all my comments satisfactorily

Back to TopTop