# A Unified Power Converter for Solar PV and Energy Storage in dc Microgrids

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Unified Power Converter Operating Principle

#### 2.1. Solar PV Panels to Batteries (PV2B)

#### 2.2. Solar PV Panels to dc Grid (PV2G)

#### 2.3. Batteries to dc Grid (B2G)

#### 2.4. Dc Grid to Batteries (G2B)

## 3. Hardware Architecture and Control Algorithms

_{bat}represents the current that flows through the battery and Q is the battery equivalent charge.

_{bat}) is lower than on the secondary dc-link (v

_{dc}

_{2}), the latter must be elevated using this back-end converter.

_{1}/N

_{2}), adjust the voltage on the primary (v

_{1}) and secondary (v

_{2}) sides to the desired values. Compared to the most distinct isolated topologies, a DAB converter has greater advantages concerning flexibility and efficiency under nominal conditions. For instance, a dual half-bridge topology, despite presenting lower switching losses and costs, has, on the other hand, fewer degrees of freedom, thus decreasing its efficiency.

_{1}and v

_{2}. However, the phenomenon that allows energy bidirectionality is the phase lag (φ) between v

_{1}and v

_{2}, which, when phase-shifted, generates a voltage (v

_{Llk}) in the transformer’s leakage inductance (L

_{lk}) and, consequently, a certain current (i

_{Llk}) will flow through it. Depending on whether φ is considered positive or negative, the direction of i

_{Llk}will be changed, and the power will flow accordingly. That is, if v

_{1}is in advance of v

_{2}, as Figure 5a shows, power will flow from the primary side to the secondary one. If the opposite happens, i.e., if v

_{2}is in advance of v

_{1}, as Figure 5b shows, the power flow direction changes. The presented results were obtained using PSIM simulation software. By observing Figure 5, it is possible to conclude that the maximum values of v

_{1}and v

_{2}are, respectively, 400 V and 200 V. These values, considering the voltage ratio of the transformer (2:1) and the adopted modulation technique, are also representative of the nominal voltages on the primary (v

_{dc}

_{1}) and secondary (v

_{dc}

_{2}) dc-links.

_{0}, outer-phase-shift angle), the DPS algorithm considers a new phase shift angle, existent between the legs of each full-bridge (D

_{1}, inner-phase-shift angle). In this regard, it is possible to obtain a three-level square waveform in the windings of the high-frequency transformer, thus providing higher efficiency. Nonetheless, both D

_{0}and D

_{1}must have limit values, calculated so that the reactive power and the circulating current in the converter are reduced. Moreover, this control technique is usually applied in situations in which the ratio between the voltage values on each side of the DAB converter is very far apart from N.

_{o}): the higher its value, the greater the power transferred. For this reason, and to regulate the nominal value of v

_{dc}

_{2}(or v

_{dc}

_{1}), it is essential that the values assigned to D

_{0}and D

_{1}are calculated dynamically. In this sense, the value of P

_{o}is expressed in (2), result of the multiplication of the constant P

_{b}, presented in (3), by the expressions dependent on the values assigned to D

_{0}and D

_{1}.

_{0}, a PI controller is applied to operate according to the measured value of v

_{dc}

_{2}, whereas, to calculate D

_{1}, a proper calculation has to be implemented. D

_{1}will vary according to the existing relation between v

_{1}and v

_{2}, with D

_{1}being higher the lower the value of the v

_{1}/v

_{2}ratio. Therefore, an exponential equation, capable of calculating the value of D

_{1}, was developed. Knowing that the absolute error is considered the difference between N and the ratio v

_{1}/v

_{2}, as represented in (4), the value of D

_{1}is given by (5). In this way, the values of D

_{1}and D

_{0}vary dynamically and under the system’s operating conditions, allowing the regulation of φ (positive or negative) and of the consequent power flow to and from each side of the high-frequency transformer.

_{tot}) must be as low as possible, using suitable control algorithms, topologies, and components, as well as a heatsink with reduced thermal resistance. In addition, the design of L

_{lk}is also a process that directly influences the energy efficiency of the DAB converter. For the same operating frequency, the greater the value of L

_{lk}, the greater P

_{tot}. As (6) confirms, P

_{tot}is considered the result of the sum of the semiconductor conduction (P

_{cond}) and switching (P

_{sw}) losses, losses in the high-frequency transformer (P

_{tr}) and losses in the leakage inductance (P

_{Llk}).

_{e}, l

_{m}, and W

_{A}.

_{cu}, given by (7)), as well as to the core material of this element (core losses, P

_{core}, represented in (8)). The sum of P

_{cu}and P

_{core}, as (9) suggests, is representative of P

_{tr}.

_{cu}and the lesser P

_{core}(there is higher winding resistance and a reduced variation in magnetic flux, ∆B). Logically, if the number of windings drops, the opposite will happen. In this respect, to ensure the lowest possible value to P

_{tr}, it is essential to find an optimal value for ∆B, thus reaching a balance between the two types of losses. The optimal value of ∆B is given by (10).

_{1}and I

_{tot}are given, correspondingly, in (11) and (12), it is possible to calculate a value of 0.0906 T for ∆B, of 3.957 W for P

_{core}and of 5.144 W for P

_{cu}, thus making a value of 9.101 W for P

_{tr}.

_{s}, an AWG 25 conductor was chosen. With a cross-section of 0.159 mm

^{2}, this conductor, ideally, does not allow the manifestation of skin effect and supports a maximum current of 2.7 A, which justifies the paralleling of a considerable number of conductors. Given that the number of turns for the primary side is provided by (13), the values of 30 and 15 turns were obtained for the primary and secondary side, respectively.

## 4. Experimental Validation

_{s}to the power semiconductors, which has a direct consequence on the reduction of the volume and weight of the magnetic elements, as is the case of the DAB high-frequency transformer and the inductors of the back-end dc–dc converters.

#### 4.1. Solar PV Panels to Batteries (PV2B)

_{dc}

_{2}and the current that flows through the resistive load (i

_{bat}), the outputs being applicable, correspondingly, to the back-end boost- and buck–boost-type dc–dc power converters. Thus, a 2 A reference for i

_{bat}and a 60 V reference for v

_{dc}

_{2}were defined. As Figure 7a shows, the measured values (CH4 and CH2, respectively) converge to the established references. It should also be noted that the voltage on the dc source that simulates the PV panels (v

_{PV}, CH1) is 20 V and the voltage on the resistive load (v

_{bat}, CH3) is 27.4 V, very close to the theoretical value.

_{gs_BB}

_{1}and v

_{gs_BB}

_{2}), validating the applied active rectification technique.

#### 4.2. Solar PV Panels to dc Grid (PV2G)

_{PV}). To regulate the value of v

_{dc}

_{2}, as in the case of the PV2B operation mode, another PI algorithm was implemented. However, in this case, its output is considered the value of φ between the waveforms of v

_{1}and v

_{2}.

_{PV}and a 30 V reference for v

_{dc}

_{2}were defined. As Figure 8a shows, the obtained values are in line with those previously stipulated (CH4 and CH2, respectively), occurring when v

_{dc}

_{1}(CH1) is 60.7 V and the voltage on the dc source (v

_{PV}, CH3) is 19.6 V. To validate the DPS modulation, it is vital to assess the waveforms of v

_{1}and v

_{2}. As expected, after holding computational simulations and by contemplating Figure 8b, it is verified that v

_{1}is delayed concerning v

_{2}, thus proving the direction of the power flow. The negative value of φ is observed in detail in Figure 8c.

#### 4.3. Batteries to dc Grid (B2G)

_{bat}) and, as in all operation modes, the value of v

_{dc}

_{2}is regulated in accordance with its reference value. For both cases, a PI control technique was used, in which the output of each one was applied, correspondingly, to the generation of PWM signals for the buck–boost dc–dc converter and in the implementation of the DPS algorithm (providing φ). In this sense, Figure 9 shows the obtained experimental results for this operation mode.

_{bat}is 25 V (discharge power of 25 W). By observing Figure 9, it is verified that v

_{bat}and i

_{bat}(CH3 and CH4, correspondingly) converge to their references. Furthermore, v

_{dc}

_{2}(CH2) is referenced to 40 V and presents a mean value of 41.6 V, which, considering the N of the high-frequency transformer, is reflected in the existence of a voltage of 79.3 V on the dc grid (v

_{dc}

_{1}, CH1).

#### 4.4. Dc Grid to Batteries (G2B)

_{dc}

_{2}and the current at the resistive load (i

_{bat}), both of which must present constant values and follow the references defined in the PI algorithms. As shown in Figure 10a, the reference value for v

_{dc}

_{2}(CH2) is 40 V, which, respecting the N of the high-frequency transformer, increases v

_{dc}

_{1}(CH1) to 80 V. Based on the operating conditions, v

_{dc}

_{2}assumes the value of 38.9 V and i

_{bat}(CH4) of 1.01 A, very close to its reference of 1 A. Moreover, the voltage on the BESS (v

_{bat}, CH3) has a value of 14 V.

_{1}and v

_{2}is automatically adjusted by the above-mentioned PI algorithm, which, consequently, allows the regulation of v

_{dc}

_{2}. Analyzing Figure 10b, it is possible to prove that the power flows from the dc grid to the BESS, since φ is positive, i.e., the gate source voltage waveform of the semiconductor S

_{1}(v

_{gs_S}

_{1}, CH1) is in advance to the signal measured in the same terminals of the semiconductor S

_{5}(v

_{gs_S}

_{5}, CH2).

_{1}/v

_{2}is different from N, even though v

_{dc}

_{2}converges to its reference. In this extreme case, in which φ is maximum and assumes the value of 30⁰, the robustness of the DPS algorithm in the face of variations in the nominal operating conditions is proven. This effect can also be seen in Figure 11a, wherein the waveforms of v

_{1}and v

_{2}(CH1 and CH2, respectively) are presented in the same unbalanced situation. Nevertheless, in Figure 11b, the same waveforms are presented in a situation of equilibrium about the ratio v

_{1}/v

_{2}, and as can be seen, the value of φ is almost zero. It should also be noted that the results obtained Figure 11a,b are related to an experimental test carried out when the reference for v

_{dc}

_{2}was 30 V.

## 5. Conclusions

_{s}, 100 kHz) in the developed unified power converter allowed a reduction in the size of the passive elements, as is the case for the inductors, capacitors, and high-frequency transformer. The development of the high-frequency transformer was detailed throughout the paper, giving special emphasis to the calculation of total losses (P

_{tot}). To this end, the number of windings was obtained as a function of the core physical features, the variation of the optimum magnetic flux (∆B), and the magnitude of power for which the DAB will operate.

## Author Contributions

## Funding

## Data Availability Statement

## Acknowledgments

## Conflicts of Interest

## References

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**Figure 2.**Operation modes for the proposed unified power converter topology: (

**a**) solar PV panels to batteries (PV2B); (

**b**) solar PV panels to dc grid (PV2G); (

**c**) batteries to dc grid (B2G); (

**d**) dc grid to batteries (G2B).

**Figure 3.**Electrical schematic of the non-isolated dc–dc back-end power converters: (

**a**) Unidirectional boost, interfacing the solar PV panels; (

**b**) bidirectional buck–boost, interfacing the BESS.

**Figure 4.**Electrical schematic of the isolated bidirectional DAB converter, interfacing the dc grid.

**Figure 5.**Voltage waveforms in the windings of the high-frequency transformer of the DAB power converter with power flow from the: (

**a**) primary to the secondary side (φ > 0); (

**b**) secondary to the primary side (φ < 0).

**Figure 7.**PV2B operation mode: (

**a**) voltage on the solar PV panels (CH1: 5 V/div), secondary dc-link (CH2: 20 V/div) and BESS (CH3: 10 V/div) and current at the BESS (CH4: 1 A/div); (

**b**) gate-source voltage in each of the semiconductors that make up the back-end bidirectional dc–dc buck–boost converter (CH1: 5 V/div), (CH2: 5 V/div).

**Figure 8.**PV2G operation mode with a DPS control algorithm: (

**a**) voltage on the primary (CH1: 20 V/div) and secondary dc-link (CH2: 20 V/div), voltage on the solar PV panels (CH3: 10 V/div), current at the solar PV panels (CH4: 1 A/div); (

**b**) voltage on the high-frequency transformer primary (CH1: 20 V/div) and secondary side (CH2: 20 V/div) in a steady-state; (

**c**) voltage on the high-frequency transformer primary (CH1: 20 V/div) and secondary side (CH2: 20 V/div), detailing the negative phase lag (−φ).

**Figure 9.**B2G operation mode: voltage on the primary dc-link (CH1: 20 V/div), voltage on the secondary dc-link (CH2: 10 V/div), voltage on the batteries (CH3: 10 V/div), current at the BESS (CH4: 500 mA/div).

**Figure 10.**G2B operation mode: (

**a**) voltage on the primary dc-link (CH1: 20 V/div), voltage on the secondary dc-link (CH2: 10 V/div), voltage on the BESS (CH3: 10 V/div), current at the BESS (CH4: 500 mA/div); (

**b**) gate-source voltage waveform of the semiconductors S

_{1}(CH1: 5 V/div) and S

_{5}(CH2: 5 V/div) in an unbalanced situation.

**Figure 11.**G2B operation mode, comparing the phase shift angle (φ) between v

_{1}and v

_{2}during unbalanced and balanced conditions applying a DPS modulation: (

**a**) during a half-cycle on an unbalanced situation—voltage on the primary (CH1: 20 V/div) and secondary (CH2: 20 V/div) side of the high-frequency transformer and on the secondary dc-link (CH3: 10 V/div); (

**b**) on a balanced situation—voltage on the primary (CH1: 20 V/div) and secondary (CH2: 20 V/div) side of the high-frequency transformer.

Operating Point | Unit | Minimum | Nominal | Maximum |
---|---|---|---|---|

dc grid | Voltage (V) | 300 | 400 | 500 |

Current (A) | - | 9 | 12 | |

Secondary dc-link (C_{2}) | Voltage (V) | - | 200 | - |

BESS | Voltage (V) | 117.5 | 150.4 | 173.9 |

Current (A) | - | 16 | 20 | |

Solar PV panels | Voltage (V) | 126 | 157.8 | 197.4 |

Current (A) | - | - | 7.61 |

Variable | Designation | Value |
---|---|---|

MLT | Mean length turn | 12.9 cm |

A_{e} | Core cross-sectional area | 3.68 cm^{2} |

l_{m} | Core mean magnetic path length | 13.9 cm |

W_{A} | Core window area | 5.186 cm^{2} |

ρ | Wire effective resistivity (copper) | 1.724 × 10^{−8} Ωm |

I_{tot} | Total current (referring to the primary) | 20 A |

I_{1} | Primary current | 10 A |

I_{2} | Secondary current | 20 A |

λ_{1} | Applied primary volt seconds | 0.002 Vs |

K_{u} | Winding fill factor | 0.3 |

∆B | Magnetic flux variation | 0.0906 Τ |

K_{fe} | Core loss coefficient | 39.81 W/cm^{3}Τ^{β} |

β | Core loss exponent | 2.6 |

D | Semiconductors’ duty-cycle | 50% |

Τ_{s} | Switching period | 10 µs |

V_{1} | Primary voltage amplitude | 400 V |

N | Transformation ratio | 2 |

N_{1} | Number of primary windings | 30 |

N_{2} | Number of secondary windings | 15 |

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## Share and Cite

**MDPI and ACS Style**

Coelho, S.; Monteiro, V.; Sousa, T.J.C.; Barros, L.A.M.; Pedrosa, D.; Couto, C.; Afonso, J.L.
A Unified Power Converter for Solar PV and Energy Storage in dc Microgrids. *Batteries* **2022**, *8*, 143.
https://doi.org/10.3390/batteries8100143

**AMA Style**

Coelho S, Monteiro V, Sousa TJC, Barros LAM, Pedrosa D, Couto C, Afonso JL.
A Unified Power Converter for Solar PV and Energy Storage in dc Microgrids. *Batteries*. 2022; 8(10):143.
https://doi.org/10.3390/batteries8100143

**Chicago/Turabian Style**

Coelho, Sergio, Vitor Monteiro, Tiago J. C. Sousa, Luis A. M. Barros, Delfim Pedrosa, Carlos Couto, and Joao L. Afonso.
2022. "A Unified Power Converter for Solar PV and Energy Storage in dc Microgrids" *Batteries* 8, no. 10: 143.
https://doi.org/10.3390/batteries8100143