Integrating Local and Global Features for Wafer Defect Pattern Classification via Sequential Hybrid Architecture

Abstract

Wafer map defect pattern classification supports quality monitoring in semiconductor manufacturing, but public benchmark datasets such as WM-811K exhibit extreme class imbalance, where majority classes can dominate standard metrics. This study aims to improve minority class performance while maintaining inference efficiency. Building on an iFormer-based hybrid backbone, we propose the Pattern-Selective Sequential Hybrid Network (PSS-HNet), which redesigns attention blocks to sequentially integrate local interaction (Modulated Convolution) and global interaction (Modulated Axial Attention) and applies sigmoid-based gating to control contextual information injection. Experiments on WM-811K (9 classes) compare iFormer (baseline), Axial-only, Axial+Modulation, and PSS-HNet using macro-averaged metrics as primary indicators, along with class-wise analysis and efficiency evaluation. PSS-HNet improves Macro-Recall by 1.02 percentage points (from 0.8852 to 0.8954) and Macro-F1 by 0.54 percentage points (from 0.9044 to 0.9098) over the baseline while maintaining similar accuracy. It also reduces computational cost and inference latency to 0.754 G FLOPs, 4.381 M parameters, and 7.682 ms, compared with 1.103 G FLOPs, 6.245 M parameters, and 8.666 ms for the baseline. Overall, selective sequential local–global integration provides a favorable balance between minority class performance and efficiency.

1. Introduction

As semiconductor manufacturing processes become increasingly advanced, the ability to diagnose defects rapidly and consistently becomes crucial for maintaining stable yield and product quality [1]. A wafer map is a spatial summary of defect distributions on a wafer, and it has been used to intuitively assess process conditions and detect anomalies via recurring defect patterns [2,3]. In manufacturing environments, defect characteristics are affected by process conditions, equipment states, and process steps. Accordingly, even defects belonging to the same class may show substantial variation in morphology and severity. As a result, manual interpretation and rule-based screening depend heavily on operator expertise and experience. They also impose substantial time and cost burdens and make it difficult to maintain consistent decision criteria. Moreover, as production scales up, fully manual inspection has inherent limitations. This highlights the need for automated wafer defect pattern classification methods that can be reliably deployed in practice [4].

This study addresses the wafer defect pattern classification problem using WM-811K, a public wafer map dataset. Public benchmark datasets provide an important starting point by improving reproducibility and comparability across studies; however, wafer map classification entails multiple challenges that closely reflect real-world settings. For example, class distributions are often imbalanced: while some patterns provide sufficient learning signals, minority patterns may be underrepresented during training [5,6]. In addition, defect patterns can be distinguished not only by local morphological characteristics but also by their spatial arrangement across the wafer and global structures [7], and noisy artifacts introduced during measurement can confound pattern recognition [8]. Therefore, wafer map classification models are required to simultaneously achieve the ability to precisely discriminate local patterns and the ability to capture global structures; moreover, when considering practical deployment, computational efficiency and robustness should be considered alongside predictive performance.

In prior studies on wafer map classification, Convolutional Neural Network (CNN)-based approaches have been widely adopted [9,10,11]. CNNs can effectively extract local morphological features, yielding strong baseline performance and providing representation learning that is well suited to the visual patterns in wafer maps. However, CNN-based models may have limited mechanisms for learning global structural relationships, and their representational capacity can be constrained when defect patterns are differentiated by wafer-wide spatial configurations or long-range dependencies. In contrast, Transformer-based models are strong at modeling global interactions and can directly capture correlations across the entire wafer region [12,13,14]. Nevertheless, they generally incur high computational cost, and additional considerations are required for training efficiency and generalization in settings with limited data or imbalanced class distributions. Accordingly, recent work has highlighted hybrid designs that combine local representations (convolution-based) and global interactions (global-attention-based) to achieve both performance and efficiency [15,16,17]. Even so, naive integration can lead to excessive information mixing or unnecessary computation; without clear design principles regarding what information to transmit, at which stage, and to what extent, it is difficult to achieve a balanced trade-off between predictive performance and computational efficiency.

Building on the hybrid design of iFormer [18], this study proposes the Pattern-Selective Sequential Hybrid Network (PSS-HNet), which improves the integration strategy to better suit wafer map classification. The key idea of PSS-HNet is an integration strategy that, rather than unconditionally merging local and global information, constructs representations sequentially and selectively transfers only the necessary information. Specifically, it first forms a base representation by reliably extracting local morphological cues and boundary characteristics of defects and then reinforces structural relationships from a wafer-wide perspective via global-level interactions. Finally, instead of assuming that globally enhanced information is always beneficial, PSS-HNet forwards only meaningful information to the next stage through a selective transfer mechanism, thereby mitigating interference that may arise from excessive mixing. This perspective can be particularly effective for wafer map classification, where (1) classes that rely primarily on local cues and (2) classes that depend on global structures coexist, and it aims not only to improve performance but also to reduce unnecessary computation to secure efficiency.

The contributions of this paper are as follows. First, we present PSS-HNet, a deployment-oriented design for wafer defect pattern classification that sequentially integrates local information and global interactions and incorporates selective transfer to account for efficiency. Second, we experimentally substantiate the validity of the proposed integration strategy by systematically evaluating its effectiveness on WM-811K using diverse baselines and ablation variants. Third, beyond classification metrics, we provide a comparative analysis from the perspective of model efficiency to discuss practical deployability and associated trade-offs. The remainder of this paper is organized as follows. Section 2 reviews related work, Section 3 describes the proposed method, and Section 4 presents the experimental setup. Section 5 discusses the experimental results and analyses and Section 6 concludes the paper and outlines directions for future work.

2. Related Works

2.1. Wafer Map Defect Pattern Classification and Benchmark Datasets

Wafer map-based wafer defect pattern classification can be defined as the task of automatically identifying defect types (patterns) from inputs that represent the spatial distribution of defects on a wafer in an image-like form [19].

In wafer defect pattern classification research, public benchmarks play a relatively important role due to limited access to in-fab process data, enabling model-to-model comparisons and reproducible experiments. This study conducts wafer defect pattern classification using the public WM-811K dataset. WM-811K is a widely used benchmark dataset for wafer map-based wafer defect pattern classification, and it is useful for comparing models’ pattern recognition capability because it includes a variety of defect pattern classes [20].

However, because wafer map classification has domain characteristics that differ from general natural-image classification, stable performance may not be achieved simply by increasing a model’s representational capacity. First, class distributions are often non-uniform, and training that is biased toward majority classes can degrade recognition performance for minority patterns [21]. Second, defect patterns may be distinguished not only by local morphological cues but also by wafer-wide spatial configurations, requiring representation learning that can jointly capture local and global information [22]. Third, noisy artifacts introduced during measurement and variations in defect severity can induce pattern variations even within the same class, which adds further difficulty for model generalization [23]. Therefore, metrics that account for imbalance and class-wise analyses are necessary.

2.2. CNN-Based and Lightweight Models for Wafer Map Classification

The mainstream approach to wafer defect pattern classification has formalized the task as an image classification problem and evolved toward learning morphological features using CNN-based models. CNNs, leveraging local receptive fields, are effective at hierarchically extracting morphological cues such as linear, ring-shaped, and clustered structures, and have therefore served as strong baselines for wafer map classification. Prior studies have demonstrated the effectiveness of deep learning-based classification on WM-811K by comparing a range of CNN architectures [24].

For deployment in manufacturing settings, efficiency that enables operation under constrained computational resources and response-time requirements is important in addition to accuracy. Reflecting this need, studies on wafer map classification have compared lightweight CNN models not only in terms of performance but also with respect to resource consumption and processing time [25,26]. For example, by evaluating lightweight models (e.g., EfficientNetV2, ShuffleNetV2, and MobileNetV2/V3) from both performance and efficiency perspectives, prior work reported that some lightweight architectures can achieve performance comparable to larger backbones while operating at a lower computational cost [27].

However, convolution-based models are inherently based on local receptive fields; therefore, when defect patterns are distinguished by wafer-wide spatial configurations or long-range correlations, global context may not be sufficiently captured. Moreover, naively increasing model capacity to enhance global context can raise computational cost and inference latency, thereby exacerbating deployment constraints in practice. Accordingly, wafer map classification requires modeling strategies that preserve the advantages of local representations while efficiently integrating global context [28].

2.3. Vision Transformers for Global Context Modeling

On wafer maps, defect patterns are not limited to locally clustered shapes such as Center and Donut; in some cases, continuity and directionality between spatially distant locations—such as in wafer-spanning linear patterns (Scratch)—serve as key cues for classification [12]. Because of these characteristics, CNN-based approaches that excel at local receptive-field modeling are efficient; however, it has been repeatedly noted that adequately capturing long-range dependency often requires excessively deep networks or the introduction of additional global interaction modules [29].

A representative line of research that directly targets global-context learning is the Vision Transformer (ViT). The ViT partitions an image into patch tokens and learns global interactions via self-attention, offering the advantage of directly modeling relationships between patterns that are spatially far apart. However, standard self-attention incurs rapidly increasing computational and memory costs with the number of tokens (quadratic complexity), making it difficult to apply directly in settings with high-resolution inputs or strict inference-latency constraints [30].

To alleviate these cost issues, approaches have been proposed that restrict the attention scope or construct hierarchical representations. For example, the Swin Transformer introduces a window-based attention mechanism that reduces computational burden while building hierarchical features [31]. Nevertheless, additional costs and design trade-offs have also been discussed, arising from window partitioning and reconstruction, inter-window information exchange, and memory access patterns [14].

Another direction is Axial Attention, which factorizes two-dimensional global interactions along axes [32]. By applying attention along each axis independently, Axial Attention can preserve a global receptive field while simplifying the computational structure and has been discussed as an alternative for reducing the cost burden of standard self-attention. In particular, in domains such as wafer maps where the background occupies a large portion and defect signals are sparse, uniformly diffusing global context across all locations may dilute defect cues; moreover, for structures with directionality and continuity, such as linear patterns, axis-based interactions may provide a useful inductive bias [33].

2.4. Hybrid Architectures Combining Convolution and Global Interaction

In wafer map classification, both local morphological cues (local patterns) and wafer-wide spatial configurations (global context) are often important simultaneously. CNNs are strong at representing local patterns but may be limited in directly handling global interactions; conversely, Transformer-based models excel at global context modeling but can face practical constraints due to computational cost and memory overhead [34]. To mitigate this trade-off, hybrid architectures that combine convolution-based local representations with global interactions have been widely explored [35].

Hybrid architectures focus not on simply combining local representations and global context in parallel but on achieving both efficiency and representational power through stage-wise functional division. Typically, convolution-based processing is used in early stages to reliably extract local features, and global interactions are then applied in later stages to reinforce long-range relationships. In addition, strategies for controlling the integration strength have been discussed to avoid excessive diffusion of global information [36].

The iFormer has been discussed as a representative approach that systematizes such hybrid architectures for mobile and lightweight deployment settings [18]. iFormer presents a design that performs local processing efficiently on high-resolution inputs and introduces global interactions in later stages to enhance representational capacity, emphasizing a design philosophy that balances local processing and global interactions under inference-latency and resource constraints.

In the wafer defect classification domain specifically, recent work has explored hybrid designs that reflect similar principles. DefectTrackNet proposes a lightweight CNN–Transformer architecture for semiconductor defect analysis, combining parallel local and global feature extraction to achieve efficient defect retrieval under practical manufacturing constraints [15]. More broadly, hybrid Transformer designs have demonstrated that jointly leveraging local convolutional representations and global attention can reduce model parameters and computation while maintaining strong task performance [17]. These efforts collectively highlight that the key challenge lies not in combining local and global modules per se but in controlling how and to what extent global context is integrated, a design consideration that directly motivates the proposed PSS-HNet.

However, because wafer maps often contain a large background region and sparse defect signals, defect cues may be either amplified or, conversely, diluted depending on how the global context is integrated. Therefore, when applying hybrid architectures, it is necessary to jointly consider the integration scheme of global interactions and the strength of information transfer [2].

2.5. Efficient Global Interaction Mechanisms for Lightweight Vision Models

Transformer-based models that directly model global context are strong at capturing long-range dependencies; however, standard self-attention incurs substantially increased computational and memory costs as the number of input tokens grows. Accordingly, in lightweight vision models, introducing global interactions while controlling their cost has been repeatedly identified as a key design challenge [37].

In particular, in domains with a large background region and sparse defect signals, excessive diffusion of global information can dilute discriminative cues; therefore, an integration strategy that selectively controls “how much” global context to incorporate can become important. Accordingly, selective transfer mechanisms such as sigmoid-based gating and weighted integration have been discussed not only from an efficiency perspective but also in terms of stabilizing performance.

3. Proposed Method

This section describes the overall design overview and key components of PSS-HNet proposed for wafer defect pattern classification. In addition, we present how the proposed model redesigns blocks within an iFormer-based backbone to integrate local and global interactions.

3.1. Overview of PSS-HNet

This study builds on an iFormer-based hybrid backbone and proposes PSS-HNet, which redesigns attention blocks to better fit the wafer map domain. The core idea of PSS-HNet is to replace a subset of the original attention blocks with redesigned attention blocks and sequentially integrate local and global interactions within each block. Specifically, the local interaction uses Modulated Convolution to strengthen morphology-driven local cues, while the global interaction uses Modulated Axial to capture long-range relationships and wafer-wide spatial configurations. To avoid assuming that global context is always beneficial, we introduce a sigmoid-based gating branch at each interaction stage to adaptively modulate the strength of information transfer conditioned on the input. With this design, PSS-HNet aims to achieve both stable local representations and the complementary benefits of global context, while alleviating unnecessary mixing and computational overhead.

In addition, with practical deployment in manufacturing settings in mind, this study aims to consider not only classification performance but also inference efficiency.

Figure 1 summarizes the overall backbone architecture of PSS-HNet and the locations where the redesigned attention blocks are applied. Figure 2 illustrates the internal flow of the redesigned attention block and Figure 3 and Figure 4 present the structures of the local interaction (Modulated Convolution) and global interaction (Modulated Axial) units, respectively.

3.2. Overall Architecture and Block Organization

PSS-HNet is built upon an iFormer-based hybrid backbone, while replacing the original attention blocks with redesigned attention blocks to better suit wafer defect pattern classification. The overall backbone follows a hierarchical flow in which input features are stably processed, with a local emphasis on early stages, and long-range relationships are reinforced via global interactions in later stages. This configuration avoids the indiscriminate application of costly global operations across all stages by introducing them only at selected stages where needed.

Figure 1 summarizes the overall flow of PSS-HNet and the locations where the redesigned attention blocks are applied. By replacing the original attention blocks with redesigned attention blocks in selected segments of the backbone, PSS-HNet performs local interaction and global interaction sequentially within a single integrated unit. Figure 2 illustrates the internal flow of the redesigned attention block. Within the block, local interaction (Modulated Convolution) is first applied to strengthen local morphological features, and global interaction (Modulated Axial) is subsequently used to incorporate long-range relationships and wafer-wide spatial configuration information. After each interaction stage, a feed-forward-style module that performs channel-wise transformations is inserted to enhance representational capacity, and each module is equipped with residual connections to enable stable learning.

The key design principle of the redesigned attention block is to control information transfer strength rather than simply adding global context. PSS-HNet introduces a sigmoid-based gating branch to generate gating signals and uses these gates to adaptively control the extent to which context features extracted from local or global interactions are injected into the next-stage representation. Figure 3 details the local interaction unit (Modulated Convolution) and Figure 4 details the global interaction unit (Modulated Axial).

3.3. Modulated Convolution and Modulated Axial Units

This subsection explains the operating principles of the two interaction units that constitute the redesigned attention block, namely, local interaction (Modulated Convolution) and global interaction (Modulated Axial). Both units share a common structure comprising a context branch that generates context features and a gating branch that produces gating signals to modulate the extent to which the context features are incorporated. The input features are transformed via a projection, passed through a sigmoid function, and then split along the channel dimension into a context part and a gating part. The final output is obtained by applying the gate to the context features in an element-wise manner.

The modulation operation shared by the two units can be expressed as Equation (1).

$$x_0=\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)\odot g\left(x\right)$$

(1)

Here, ${\mathrm{x}}_0$ denotes the output feature, $\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)$ is the context feature produced by the context branch, $g\left(x\right)$ is the gating signal generated by the gating branch, and $\odot$ denotes element-wise multiplication. The gating signal is defined using a sigmoid function as in Equation (2).

$$g\left(x\right)=\sigma \left(\phi \left(x\right)\right)$$

(2)

Here, $\phi (·)$ denotes a projection (linear transformation) and $\sigma (·)$ denotes a sigmoid activation function. In the implementation, $\sigma (·)$ is applied to the output of $\phi (·)$, after which $\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)$ and $g\left(x\right)$ are formed by splitting along the channel dimension; Equations (1) and (2) summarize this modulation process in a functional form.

The context-branch operation $\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)$ is defined by different operators for local interaction and global interaction. The Modulated Convolution unit is responsible for local interaction and integrates local morphological cues with the surrounding local context through convolution-based operations. Because wafer map defect patterns often include features that are distinguishable in local regions—such as locally clustered shapes, boundary variations, and thin, elongated substructures—operations that effectively capture local context play an important role in classification performance. In this setting, local context features can be constructed using efficient convolutional operations such as depthwise separable convolution, and the resulting output corresponds to $\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)$ in Equation (1). Figure 3 presents the overall flow of the Modulated Convolution unit.

The Modulated Axial unit is responsible for global interaction and incorporates long-range relationships and wafer-wide spatial configuration information through axis-based global interactions. In wafer maps, certain defect patterns can be distinguished by wafer-wide directionality, continuity, or inter-region relationships, making global context an important cue. In this study, the global context feature is represented as $\mathrm{A}\mathrm{x}\mathrm{i}\mathrm{a}\mathrm{l} \mathrm{A}\mathrm{t}\mathrm{t}\mathrm{e}\mathrm{n}\mathrm{t}\mathrm{i}\mathrm{o}\mathrm{n}(·)$ and used as $\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)$ in Equation (1). Accordingly, the global context can be defined as in Equation (3).

$$\mathrm{c}\mathrm{t}\mathrm{x}\left(x\right)=\mathrm{A}\mathrm{x}\mathrm{i}\mathrm{a}\mathrm{l} \mathrm{A}\mathrm{t}\mathrm{t}\mathrm{e}\mathrm{n}\mathrm{t}\mathrm{i}\mathrm{o}\mathrm{n}\left(x\right)$$

(3)

Here, $\mathrm{A}\mathrm{x}\mathrm{i}\mathrm{a}\mathrm{l} \mathrm{A}\mathrm{t}\mathrm{t}\mathrm{e}\mathrm{n}\mathrm{t}\mathrm{i}\mathrm{o}\mathrm{n}(·)$ denotes a global interaction operator that applies single-head attention along the height and width axes independently, aggregating the results via summation to capture global spatial dependencies across both dimensions. Figure 4 presents the overall flow of the Modulated Axial unit.

In summary, the redesigned attention block in PSS-HNet sequentially combines local interaction (Modulated Convolution) and global interaction (Modulated Axial) and controls the context injection strength at both stages via sigmoid-based gating. Moreover, the context branch is designed to reflect both the local morphological cues and wafer-wide spatial configurations required for wafer map classification, using efficient convolutional operations for local modeling and Axial Attention for global modeling.

3.4. Design Rationale

Wafer defect pattern classification is a task in which both local morphological cues and wafer-wide spatial configurations contribute to classification [38], and defect signals are often sparse in inputs with dominant background regions [39]. Therefore, a model should reliably preserve local cues while being able to reinforce long-range relationships and structural cues through global context when needed. Moreover, if the global context is incorporated unconditionally, non-discriminative background information may diffuse as well, which can dilute defect cues and increase unnecessary information mixing; thus, the context integration scheme should be designed with care.

Reflecting these data characteristics, PSS-HNet sequentially combines local and global interaction. It first forms stable morphological defect cues through local interaction and then strengthens structural cues—such as directionality, continuity, and inter-region relationships—via global interaction, thereby integrating information across different scales in a stage-wise manner. Rather than injecting context features at a fixed strength, the sigmoid-based gating mechanism continuously adjusts the contribution of contextual information according to the input and intermediate representations, suppressing unnecessary information mixing and achieving a balance between preserving local cues and enhancing global context.

4. Experiments

4.1. Dataset (WM-811K)

This study evaluated wafer defect pattern classification performance using the public wafer map dataset WM-811K. WM-811K consists of nine classes: Center, Donut, Local, Edge-Local, Edge-Ring, Scratch, Random, Near-Full, and None. Figure 5 shows randomly sampled wafer map examples from each class [20].

WM-811K contains a total of 811,457 samples; to use only labeled data, we excluded 638,507 unlabeled samples. As a result, experiments were conducted using the remaining 172,950 samples.

After removing unlabeled samples, the dataset exhibits extreme class imbalance, with the None class accounting for the majority of samples. This distribution is presented in Figure 6.

4.2. Preprocessing and Data Split

We split the data into 80% for training and 20% for testing and performed a stratified split to preserve class proportions. No data resampling techniques, such as oversampling to mitigate class imbalance, were used. This choice was intentional: incorporating imbalance mitigation strategies such as focal loss or class weighting would introduce confounding factors, making it difficult to attribute performance differences specifically to the proposed architectural design. The goal of this study is to evaluate the architectural contribution of PSS-HNet in isolation under a controlled and consistent training protocol across all model variants.

Data preprocessing used the same basic transformations for both training and testing, while data augmentation was applied probabilistically only during training. During testing, no random augmentation was applied; instead, inputs were normalized using a fixed preprocessing pipeline to evaluate performance.

Training-time augmentation combined techniques such as rotation, flipping, blurring, random cropping, and random erasing to reflect realistic variations in wafer map patterns, including changes in position, orientation, and partial occlusion. These augmentations aim to improve generalization by increasing input diversity while preserving the morphological characteristics of defect patterns.

4.3. Model Variants and Training Configuration

Based on an iFormer backbone, this study compared four model variants to examine the impact of global interaction and modulation (gating) configurations and assess the effectiveness of PSS-HNet. The compared models are: (1) the iFormer baseline; (2) Axial-only, which replaces the original attention-based global interaction with axis-based global interaction; (3) Axial+Modulation, which adds a modulation (gating) mechanism to Axial-only; and (4) PSS-HNet, which applies the redesigned attention block that sequentially integrates local (Modulated Convolution) and global (Modulated Axial) interactions.

Training followed the same protocol for all variants to ensure a fair comparison. Cross-entropy was used as the classification loss, and optimization was performed using AdamW. A cosine learning-rate schedule was adopted, including a warm-up stage.

The detailed training settings are as follows. The batch size was set to 512, and training was conducted for 100 epochs. The initial learning rate was 0.001, and the weight decay was 0.05. All models were trained on an NVIDIA H100 GPU. To improve robustness, each model was trained three times with different random seeds, and the mean ± standard deviation of the classification metrics is reported in Section 5.1. Inference latency and efficiency metrics were measured separately on an NVIDIA GeForce RTX 3060 Ti to reflect a realistic lightweight deployment scenario.

The comparisons in this study are not intended as a broad backbone competition such as “CNN vs. Transformer”; rather, they aim to isolate how local interaction (convolution), global/axis-based interaction, and modulation integration within an iFormer-based architecture affect performance and efficiency. Accordingly, direct comparisons against standalone CNN backbones were excluded from the experimental scope. While comparisons with a wider range of state-of-the-art models would further contextualize the reported improvements, such comparisons would conflate the effects of different backbone designs with those of the specific architectural modifications under investigation. The controlled variant-based evaluation adopted here is better suited to the study’s primary objective: providing a rigorous ablation of the proposed design choices within a consistent architectural framework.

4.4. Evaluation Metrics and Protocol

Considering the extreme class imbalance of WM-811K, this study evaluated both overall performance and class-wise performance rather than relying on a single metric. Evaluation was conducted on the test set, and for each model, we reported Accuracy along with Precision, Recall, and F1-score. In addition to overall averaged metrics, we also present class-wise metrics (Precision/Recall/F1-score) to explicitly examine performance degradation in minority classes and confusion patterns between specific classes.

Given that majority classes can dominate overall performance in imbalanced datasets, this study uses macro-averaged metrics as the primary performance indicators. Macro averaging computes the mean of per-class metrics with equal weight, aiming to reflect minority class performance in a balanced manner. We additionally report weighted-average metrics; weighted averaging uses the per-class sample count (support) as weights to reflect the overall data distribution. These metrics are summarized in Section 5.1 (overall performance comparison) and Section 5.2 (class-wise performance comparison).

We also analyzed misclassification patterns across classes using a confusion matrix. A confusion matrix indicates which other classes a given class is confused with and is useful for interpreting the reasons for changes in macro-averaged metrics. In this study, we additionally present normalized confusion matrices to enable comparable analysis of class-wise classification tendencies.

Finally, to discuss practical deployment, we compared efficiency metrics in addition to classification performance metrics. In this paper, we report Params, floating-point operations (FLOPs), inference latency, and Macro-F1 together to assess the balance between performance and efficiency. The classification metrics in Section 5.1 and the Macro-F1 values in Section 5.3 are reported as mean ± standard deviation over three independent runs. In addition, to qualitatively examine which regions of defect patterns the model relies on for its predictions, we performed Gradient-weighted Class Activation Mapping (Grad-CAM) visualizations, and representative cases are presented in the results analysis [40].

5. Experimental Results and Analysis

5.1. Experimental Setup Recap

This subsection compares and analyzes the wafer defect pattern classification performance of the proposed model (PSS-HNet) on the WM-811K dataset (9 classes). WM-811K is a highly imbalanced dataset in which the normal (None) class accounts for a very large proportion, exceeding 85% of the test set. In this setting, Accuracy and Weighted-F1 can be largely dominated by majority class performance; therefore, we use Macro-Recall and Macro-F1 as the key comparison metrics to evaluate overall sensitivity across minority defect classes (reduced false negatives).

Table 1. Overall performance comparison on WM-811K test set (9 classes).

Model	Accuracy	Macro-Precision	Macro-Recall	Macro-F1	Weighted-F1
iFormer (baseline)	0.9782 ± 0.0006	0.9264 ± 0.0041	0.8852 ± 0.0022	0.9044 ± 0.0010	0.9775 ± 0.0006
Axial-only	0.9666 ± 0.0005	0.8744 ± 0.0405	0.8258 ± 0.0105	0.8462 ± 0.0106	0.9652 ± 0.0010
Axial+Modulation	0.9780 ± 0.0003	0.9249 ± 0.0030	0.8901 ± 0.0018	0.9063 ± 0.0025	0.9773 ± 0.0004
PSS-HNet (proposed)	0.9780 ± 0.0002	0.9260 ± 0.0020	0.8954 ± 0.0034	0.9098 ± 0.0008	0.9774 ± 0.0003

summarizes the overall metrics for the four models (iFormer, Axial-only, Axial+Modulation, and PSS-HNet).

5.2. Overall Performance Comparison

As shown in Table 1, all four models achieve generally high Accuracy values in the range of 0.9666–0.9782, and iFormer (0.9782 ± 0.0006) and PSS-HNet (0.9780 ± 0.0002) are nearly identical in terms of Accuracy. However, the differences become more pronounced in macro-averaged metrics. Axial-only exhibits substantial decreases in Macro-Recall (0.8258 ± 0.0105) and Macro-F1 (0.8462 ± 0.0106), suggesting that using axis-based global interaction alone may reduce the reliability of minority-class predictions. In contrast, Axial+Modulation recovers Macro-F1 to 0.9063 ± 0.0025, indicating that modulation contributes to stabilizing the performance of axis-based global interaction. Ultimately, PSS-HNet achieves the highest macro metrics among the four models, with Macro-Recall of 0.8954 ± 0.0034 and Macro-F1 of 0.9098 ± 0.0008, demonstrating overall improvements in minority-class performance under class imbalance.

Table 2. Class-wise precision, recall, and F1-score on the WM-811K test set (9 classes).

Model	Metrics	Center	Donut	Edge-Loc	Edge-Ring	Loc	Near-Full	Random	Scratch	None
iFormer (baseline)	Precision	0.96	0.90	0.87	0.98	0.86	0.94	0.95	0.88	0.99
	Recall	0.95	0.86	0.72	0.97	0.78	1.00	0.91	0.79	1.00
	F1	0.96	0.88	0.79	0.97	0.82	0.97	0.93	0.84	0.99
Axial-only	Precision	0.90	0.68	0.77	0.98	0.79	0.93	0.96	0.84	0.98
	Recall	0.94	0.86	0.64	0.94	0.68	0.83	0.73	0.70	0.99
	F1	0.92	0.76	0.70	0.96	0.73	0.88	0.83	0.77	0.99
Axial+Modulation	Precision	0.96	0.91	0.86	0.98	0.86	0.97	0.93	0.88	0.99
	Recall	0.95	0.86	0.72	0.97	0.77	1.00	0.90	0.83	1.00
	F1	0.95	0.89	0.79	0.98	0.81	0.98	0.91	0.85	0.99
PSS-HNet (proposed)	Precision	0.96	0.93	0.85	0.98	0.86	0.97	0.94	0.86	0.99
	Recall	0.96	0.89	0.72	0.97	0.77	1.00	0.92	0.84	0.99
	F1	0.96	0.91	0.78	0.97	0.81	0.98	0.93	0.85	0.99

presents the class-wise metrics.

5.3. Efficiency and Confusion Matrix Analysis

From the perspective of deployment in manufacturing settings, not only classification performance but also compute requirements and inference latency should be considered.

Table 3. Efficiency comparison (Params/FLOPs/Latency/Macro-F1).

Model	Params	FLOPs	Latency	Macro-F1
iFormer (baseline)	6.245 M	1.103 G	8.666 ms	0.9044 ± 0.0010
Axial-only	7.833 M	1.223 G	10.718 ms	0.8462 ± 0.0106
Axial+Modulation	8.435 M	1.281 G	11.431 ms	0.9063 ± 0.0025
PSS-HNet (proposed)	4.381 M	0.754 G	7.682 ms	0.9098 ± 0.0008

compares the four models in terms of the number of parameters (Params), computational complexity (FLOPs), and per-sample inference latency. FLOPs were computed using fvcore (FlopCountAnalysis) with an input size of 224 × 224. PSS-HNet achieves 4.381 M Params, 0.754 G FLOPs, and 7.682 ms, yielding the smallest model size and the lowest computational cost among the four models, and it also attains the shortest inference latency. In contrast, the iFormer baseline records 6.245 M Params, 1.103 G FLOPs, and 8.666 ms, whereas Axial-only and Axial+Modulation tend to increase compute and inference latency due to the modified global interaction. When Macro-F1 is considered alongside efficiency metrics, PSS-HNet aligns with the design intent of maintaining classification performance comparable to, or better than, competing models under a smaller computational budget. In particular, because WM-811K is highly imbalanced with a very large proportion of the None class, Accuracy alone is insufficient to fully characterize a model’s practical defect classification capability. In this setting, PSS-HNet offers a balanced trade-off that jointly satisfies overall performance (Macro-F1) and efficiency (Params/FLOPs/inference latency). A confusion matrix provides an intuitive view of which class pairs are frequently confused and whether errors are concentrated in specific minority classes. Figure 7 presents the confusion matrices of the four models, and Figure 8 shows the same results in a normalized form (per-class proportions) to enable direct comparison.

5.4. Qualitative Analysis with Grad-CAM

Along with quantitative metrics, this study performed Grad-CAM-based visualizations to qualitatively examine the spatial regions the models rely on for their predictions. Figure 9 presents representative cases across three defect classes—Scratch, Loc, and Edge-Loc—comparing the Grad-CAM activations of the iFormer baseline and PSS-HNet. Grad-CAM highlights input regions that contribute to a classification outcome and is used to interpret which parts of a defect pattern the model focuses on [40]. In the Scratch case (top row), iFormer distributes activation broadly across the wafer, including regions distant from the defect, whereas PSS-HNet produces a more localized response concentrated on the linear defect region. In the Loc case (middle row), iFormer exhibits diffuse activation extending beyond the defect area, while PSS-HNet focuses more sharply on the defect cluster near the wafer edge. In the Edge-Loc case (bottom row), iFormer shows broad activation that includes background noise regions, whereas PSS-HNet concentrates activation more selectively on the localized defect area despite the noisy input background. Across all three cases, PSS-HNet tends to produce more concentrated responses on regions where defect patterns are present, compared to the broader activation patterns of the iFormer baseline. However, this analysis is a qualitative observation based on representative examples, and the overall performance comparison is discussed primarily using the quantitative metrics in Table 1, Table 2 and Table 3.

6. Conclusions

In the WM-811K wafer map setting (9 classes) with extreme class imbalance, this study aimed to design an efficient classification backbone for mobile and lightweight deployment while reflecting minority defect class performance in a balanced manner. Because wafer map defects can be characterized not only by local patterns but also by long-range spatial context, it is necessary to introduce global context while controlling computational cost and mitigating unnecessary diffusion of global information.

Experiments were conducted on the WM-811K test set by comparing four models: iFormer (baseline), Axial-only, Axial+Modulation, and PSS-HNet. Because WM-811K is an imbalanced dataset in which the None class dominates the test set, we reported Macro-Recall and Macro-F1 as the key metrics, given the limitations of using Accuracy alone.

Quantitatively, compared with the iFormer baseline, PSS-HNet improved Macro-Recall by 1.02 percentage points (from 0.8852 to 0.8954) and Macro-F1 by 0.54 percentage points (from 0.9044 to 0.9098) while maintaining a similar Accuracy level, as shown in Table 1. In addition, the Axial-only configuration exhibits substantial drops in Macro-Recall and Macro-F1, indicating that applying axis-based global interaction alone may not ensure reliable predictions for minority classes. In contrast, Axial+Modulation recovers Macro-F1 to 0.9063, suggesting that incorporating selective transfer (gating/modulation) may help stabilize the performance of models based on global interaction. In terms of efficiency, PSS-HNet reduces both the number of parameters and the level of computation relative to the baseline and shortens per-sample inference latency by 0.984 ms (from 8.666 ms to 7.682 ms). Additionally, we qualitatively examined the basis of model predictions using Grad-CAM visualizations.

From a practical deployment perspective, these efficiency advantages carry direct implications for semiconductor manufacturing environments. Inspection systems in fab settings typically operate under strict throughput and response-time constraints, where inference latency and model size are as critical as classification accuracy. The efficiency gains of PSS-HNet therefore suggest suitability for integration into real-time wafer inspection pipelines on resource-constrained shop-floor hardware. Notably, the experimental setup adopted in this study reflects a realistic deployment scenario, in which models are trained in a high-performance compute environment and evaluated for inference efficiency on a more modest platform—consistent with the common industrial practice of training offline and deploying on edge or line-side systems.

The limitations of this study are as follows. First, the evaluation is based on a single dataset (WM-811K), and the sample sizes of some minority classes are limited. Although WM-811K is the most widely used public benchmark for wafer defect pattern classification and provides a standardized basis for comparison, generalization to other wafer datasets or different process conditions remains to be validated. Second, the efficiency metrics are measured under a specific hardware configuration and on a per-sample basis; thus, further validation is needed in realistic batch and device settings, including throughput and inference-latency variability.

Future work will pursue several directions. First, we will evaluate PSS-HNet on additional wafer map datasets collected under different process conditions and equipment configurations to assess cross-dataset generalization. Second, we will investigate the integration of imbalance-aware training strategies—such as focal loss, class-weighted loss, and mixup-based augmentation—to further stabilize minority class performance independently of architectural design choices. Third, we plan to conduct throughput and latency evaluations under realistic batch inference settings and on edge-deployable hardware beyond the RTX 3060 Ti to more comprehensively characterize practical deployability.