Impedance Reshaping and Robustness Enhancement of Grid-Following Inverters Considering Phase-Locked Loop Frequency Coupling Effects
Abstract
1. Introduction
- (1)
- Signal perturbation analysis is employed to clarify that background grid harmonics can propagate to the inverter output current through PLL-induced frequency coupling, which plays a critical role in the amplification of current distortion under distorted grid conditions.
- (2)
- By embedding PLL frequency coupling characteristics into the modeling framework, a refined impedance model is developed to capture the interaction among inverter output impedance, grid impedance, and PLL dynamics, leading to a more accurate assessment of system stability.
- (3)
- An enhanced SOGI-PLL with phase-lead compensation is proposed to offset the inherent phase lag of the filter. This design enlarges the effective PLL bandwidth while preserving harmonic attenuation capability.
2. Impact of PLL-Induced FCE on the Operational Characteristics of GFLIs
2.1. Impact of FCEs on the Output Power Quality of GFLIs
2.2. Stability Analysis Considering Impact of FCEs
3. Mitigation Strategies for PLL-Induced FCE
3.1. Modified PLL and GFLI Impedance Reshape
3.2. Performance Evaluation of the ESOGI-PLL
4. Results
4.1. Performance Evaluation of the Proposed ESOGI-PLL
4.2. Robustness Verification
5. Conclusions and Discussion
6. Limitations and Future Work
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
Abbreviations
| PLL | Phase-Locked Loop |
| FCE | Frequency Coupling Effect |
| GFLI | Grid-following inverter |
| SISO | Single Input Single Output |
| MIMO | multi-input multi-output |
| BPF | band-pass filter |
| PCC | Point of Common Coupling |
| SRF | Synchronous Reference Frame |
| PWM | Pulse Width Modulation |
| OSG | Orthogonal Signal Generator |
| SOGI-PLL | Second-Order Generalized Integrator-based Phase-Locked Loop |
| ESOGI-PLL | Enhanced Second-Order Generalized Integrator-based Phase-Locked Loop |
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| Parameter | Symbol | Value/Unit |
|---|---|---|
| Capacity | S | 1.65 kVA |
| DC source | Udc | 200 V |
| Grid voltage | upcc | 55 V |
| Inverter-side inductor | L1 | 2.5 mH |
| Grid-side inductor | L2 | 1.5 mH |
| Filter capacitor | C | 5 μF |
| Sampling frequency | fs | 15 kHz |
| Switching frequency | fPWM | 15 kHz |
| Current controller | kp | 0.1 |
| ki | 20 | |
| PLL controller | kp,pll | 34 |
| ki,pll | 260 | |
| LPF cutoff frequency | fc | 70 Hz |
| BPF center frequency | f0 | 50 Hz |
| PCC voltage | Lg | 2.0 mH (SCR ≈ 9) |
| 6.0 mH (SCR ≈ 4.8) | ||
| 10.0 mH (SCR ≈ 1.8) |
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Zhang, Y.; Pen, H.; Zhang, X.; Dai, L.; Yang, K. Impedance Reshaping and Robustness Enhancement of Grid-Following Inverters Considering Phase-Locked Loop Frequency Coupling Effects. Processes 2026, 14, 2546. https://doi.org/10.3390/pr14162546
Zhang Y, Pen H, Zhang X, Dai L, Yang K. Impedance Reshaping and Robustness Enhancement of Grid-Following Inverters Considering Phase-Locked Loop Frequency Coupling Effects. Processes. 2026; 14(16):2546. https://doi.org/10.3390/pr14162546
Chicago/Turabian StyleZhang, Ye, Haibo Pen, Xiaoyu Zhang, Lili Dai, and Kai Yang. 2026. "Impedance Reshaping and Robustness Enhancement of Grid-Following Inverters Considering Phase-Locked Loop Frequency Coupling Effects" Processes 14, no. 16: 2546. https://doi.org/10.3390/pr14162546
APA StyleZhang, Y., Pen, H., Zhang, X., Dai, L., & Yang, K. (2026). Impedance Reshaping and Robustness Enhancement of Grid-Following Inverters Considering Phase-Locked Loop Frequency Coupling Effects. Processes, 14(16), 2546. https://doi.org/10.3390/pr14162546

