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Article

Design and Research of an Improved Phase-Locked Loop Based on Levy-AsyLnCPSO Optimization and EA-SOGI Structure

by
Xiaoguang Kong
*,
Xiaotian Xu
and
Guannan Ge
School of Information Engineering, Shenyang University of Chemical Technology, Shenyang 110142, China
*
Author to whom correspondence should be addressed.
Processes 2025, 13(10), 3036; https://doi.org/10.3390/pr13103036
Submission received: 4 July 2025 / Revised: 11 September 2025 / Accepted: 21 September 2025 / Published: 23 September 2025
(This article belongs to the Section Energy Systems)

Abstract

To address the challenges posed by harmonic distortion and DC offset in the power grid, this paper proposes a novel Phase-Locked Loop (PLL) architecture tailored for single-phase grid-connected systems. The design integrates an Enhanced Adaptive Second-Order Generalized Integrator (EA-SOGI) with a Quasi-Proportional Resonant (QPR) controller. The proposed EA-SOGI extends the conventional SOGI by incorporating an all-pass filter and an additional integrator, which enhance the symmetry of the orthogonal signals and effectively suppress the estimation errors caused by DC offset. In addition, the conventional PI controller is replaced by a QPR controller, whose parameters are tuned using a hybrid Levy-AsyLnCPSO optimization algorithm to improve frequency locking performance and enhance system robustness under steady-state conditions. Simulation and experimental results demonstrate that the proposed PLL achieves a Total Harmonic Distortion (THD) as low as 2.8653% based on Fast Fourier Transform (FFT) analysis, indicating superior adaptability compared to conventional PLL structures and validating its effectiveness in DC offset suppression and harmonic mitigation.

1. Introduction

With the significant depletion of traditional energy sources and worsening environmental pollution, renewable energy generation technologies (RES) have rapidly advanced [1,2]. Power electronic devices, represented by single-phase grid-connected inverters, frequency converters, and single-phase energy storage converters, are now widely applied. However, the massive integration of these devices has led to a deterioration of grid power quality, adversely affecting the stability of distributed generation systems. Phase-Locked Loop (PLL) technology, which can accurately and instantaneously detect grid fundamental voltage phase and amplitude, plays a critical role in achieving safe and stable grid integration. In recent years, numerous phase synchronization methods have been proposed, including zero-crossing detection [3], Kalman filters [4], weighted least squares estimation [5], and recursive discrete Fourier transform methods [6]. Among these methods, the Phase-Locked Loop (PLL), composed of a phase detector, loop filter, and voltage-controlled oscillator, stands out due to its simple structure and ease of implementation, achieving extensive applications in power systems [7].
In ideal three-phase grid-connected systems, the most commonly used synchronization technique is the synchronous reference frame-based PLL (SRF-PLL) [8], characterized by its rapid dynamic response and simple software implementation via coordinate transformation. However, in single-phase systems, direct coordinate transformation is impossible due to the existence of only a single voltage phase. To address this, a quadrature signal generator (QSG) is typically employed to produce an orthogonal signal with identical amplitude to the input voltage, enabling the coordinate transformation. The first proposed QSG utilized a transport-delay module [9], which performs well under stable grid voltage but suffers from steady-state errors when frequency deviations occur [10]. The second-order generalized integrator PLL (SOGI-PLL), recognized for its simple structure, low computational burden, frequency adaptability, and robust filtering performance, has gained significant attention as an ideal solution for single-phase PLL applications [11,12,13]. Despite these advantages, SOGI-PLL is sensitive to DC offsets in grid voltage and suffers accuracy degradation under severe grid-side distortion. To resolve these issues, researchers worldwide have introduced several improved SOGI structures. Reference [14] proposed a single-phase PLL based on a new second-order generalized integrator, incorporating phase error compensation for accurate phase locking under grid frequency fluctuations. Reference [3] introduced an additional control loop to form a frequency-locked structure, indirectly achieving phase detection unaffected by frequency variations. However, the method’s global stability is challenging to prove, limiting its effectiveness during significant frequency disturbances. References [15,16] proposed cascading two SOGI modules to enhance harmonic suppression and DC offset rejection, further employing zero-crossing detection for real-time frequency adjustment of the resonant frequency. Although effective, these methods increase computational complexity and structural complexity. References [17,18] discusses the Type-3 SOGI, in which a notch filter and frequency-adaptive mechanism are introduced to enhance the suppression of DC components and phase errors. However, the additional notch stage reduces the bandwidth and introduces delay, thereby limiting the dynamic response performance. Reference [19] reports that a cascaded SOGI combined with an adaptive comb filter structure can significantly improve harmonic and DC rejection capability under abnormal grid conditions. In addition to the quadrature signal generation (QSG) stage, the loop filter is another critical component of a PLL. Traditionally, Proportional–Integral (PI) controllers have been widely used due to their simple structure and ease of implementation. However, in the stationary αβ frame, PI controllers cannot eliminate steady-state error when tracking sinusoidal signals, which limits the accuracy of phase detection under distorted grid conditions. To overcome this drawback, Proportional–Resonant (PR) controllers were introduced, offering infinite gain at the fundamental frequency and thereby achieving zero steady-state error in AC signal tracking. Nevertheless, PR controllers are sensitive to frequency deviation and require careful parameter tuning. Adaptive PR controllers can address this issue by adjusting their resonant frequency online, but such schemes significantly increase implementation complexity and computational effort [20]. Robust PI and H-infinity (H∞) controllers provide strong robustness against disturbances and parameter uncertainties, yet their higher-order nature and tuning difficulty make them less attractive for real-time DSP-based implementation [21].
To address the above issues, this paper proposes an improved EA-SOGI structure, which integrates an all-pass filter with an additional integrator to enhance the suppression of DC offset and harmonics, while avoiding the drawbacks of narrow bandwidth and response delay. To further enhance steady-state accuracy and dynamic performance, the traditional PI controller is replaced by a quasi-proportional resonant (QPR) controller, optimized through the Levy-AsyLnCPSO hybrid algorithm to achieve a balanced improvement in phase error, settling time, and robustness. Finally, simulation and experimental results conducted in MATLAB/Simulink R2020b validate the proposed PLL structure and control strategy, confirming significant performance advantages for grid-connected inverters under complex grid conditions and offering a robust new solution for enhancing grid reliability and stability.
To achieve precise control of the grid-connected current and ensure synchronization with the grid voltage, the system adopts a synchronous rotating reference frame (dq frame) control strategy. The phase angle of the grid is extracted by the phase-locked loop (PLL), and the voltage signal is transformed from the stationary reference frame into the rotating frame using the Park transformation, thereby realizing phase synchronization of the reference current. The reference current is generated by the voltage regulator and, under the action of the current controller, accurate tracking of the actual grid-connected current is achieved. Figure 1 illustrates an LCL-type grid-connected inverter, in which inductors L1, L2 and capacitor C constitute the LCL filter. V i n denotes the inverter output voltage, switches S1 to S4 are the switching elements, and V p c c represents the voltage at the point of common coupling (PCC). H is the inverter-side DC voltage control factor, G f f denotes the feedforward control of PCC voltage, G i ( s ) represents the current regulator, I r e f is the reference current, and I denotes the actual input current.

2. System Model and Control

2.1. The Working Principle of SOGI

The structural block diagram of the conventional second-order generalized integrator (SOGI) is shown in Figure 2.
The orthogonal signal generated from the grid voltage input leads to the derivation of the closed-loop transfer function of the SOGI as follows:
G a ( s ) = v a ( s ) v g ( s ) = k w 0 s s 2 + k w 0 s + w 0 2
G b ( s ) = v b ( s ) v g ( s ) = k w 0 2 s 2 + k w 0 s + w 0 2
Here, w 0 is the resonant frequency of the SOGI, v g represents the input grid voltage, and k denotes the damping coefficient. When the resonant frequency w 0 matches the frequency of the input voltage, the component v a aligns with the fundamental component of v g in both phase and amplitude, while v b exhibits a 90° phase shift, thereby yielding two orthogonal signals v a and v b .
As shown in Figure 3, the damping coefficient (e.g., 0.5, 1.414, and 2) determines the bandwidth of the transfer function. From Figure 3a, it can be observed that G a ( s ) behaves as a band-pass filter. A smaller k results in a narrower bandwidth, leading to greater attenuation of DC components and improved filtering performance. However, this also slows the system response and increases its sensitivity to the resonant frequency w 0 . Figure 3b shows that G b ( s ) acts as a low-pass filter, offering minimal attenuation for signals below the fundamental frequency. Therefore, a proper value of k must be selected to balance these trade-offs. It is noteworthy that component G a ( s ) can extract the fundamental component containing DC offset and harmonics from the grid voltage, while component G b ( s ) effectively extracts the fundamental component from harmonics and noise. However, near 0 Hz, the magnitude response of the system exhibits a non-zero gain (close to the constant k), indicating that this structure cannot effectively suppress DC offset present in the input voltage. As a result, the output signal suffers from offset errors, which further affect phase accuracy [22].

2.2. The Working Principle of the EA-SOGI

To suppress oscillations caused by DC bias in the input voltage and address the DC offset issue in single-phase PLLs, an innovative approach is proposed that integrates a DC offset estimation module with an all-pass filter (APF) into the conventional SOGI structure. The incorporation of the DC offset estimation module significantly enhances the accuracy and capability of estimating and suppressing the DC component in the input signal. The combination of SOGI and APF enables 90-degree phase delay correction without introducing any amplitude distortion. This leads to the construction of a novel pre-filtering structure, as illustrated in Figure 4.
The transfer function of the EA-SOGI can be expressed as:
D ( s ) = u a ( s ) u g ( s ) = k 2 w 0 s 2 s 3 + ( k 1 + k 2 ) w 0 s 2 + w 0 2 s + k 1 w 0 3
Q ( s ) = u b ( s ) u g ( s ) = k 2 w 0 s 3 + k 2 w 0 2 s 2 s 4 + ( k 1 + k 2 + 1 ) w 0 s 3 + ( k 1 + k 2 + 1 ) w 0 2 s 2 + ( k 1 + 1 ) w 0 3 s + k 1 w 4
The Bode plot of EA-SOGI, derived from Equations (3) and (4), is illustrated in Figure 5. A comparison between G a ( s ) (Figure 3a) and D ( s ) (Figure 5a) reveals that D ( s ) exhibits a wider passband and a smoother phase curve. While preserving the fundamental filtering capabilities, it significantly enhances the steady-state accuracy and dynamic stability of the system. A comparison between Q ( s ) and G b ( s ) indicates that the system order has increased by two, effectively forming a fourth-order pre-filter. By examining the transfer function of Q ( s ) , it can be observed that Q ( s ) becomes zero when s = 0 . This implies that Q ( s ) is capable of completely rejecting DC components. Hence, the ability to suppress DC offset has fundamentally improved—from being absent to fully implemented.

2.3. Analysis of DC Offset Rejection in EA-SOGI

Suppose the input grid voltage u g ( t ) is a biased sinusoidal signal containing a DC offset, which can be expressed as:
u g ( t ) = U d c + U m sin ( w g t + φ g )
U d c represents the DC offset in the input voltage, and the initial phase angle is denoted as φ g . In the Laplace domain, u g ( s ) can be expressed by the following equation:
u g ( s ) = U d c s + U m ( w g cos φ g + s sin φ g ) s 2 + w g 2
By substituting Equation (6) into Equations (3) and (4), the following expressions are obtained:
u a ( s ) = k 2 w 0 s 2 s 3 + ( k 1 + k 2 ) w 0 s 2 + w 0 2 s + k 1 w 0 3 ( U d c s + U m ( w g cos φ g + s sin φ g ) s 2 + w g 2 )
u b ( s ) = k 2 w 0 s 3 + k 2 w 0 2 s 2 s 4 + ( k 1 + k 2 + 1 ) w 0 s 3 + ( k 1 + k 2 + 1 ) w 0 2 s 2 + ( k 1 + 1 ) w 0 3 s + k 1 w 4 ( U d c s + U m ( w g cos φ g + s sin φ g ) s 2 + w g 2 )
Observing Equations (7) and (8), it can be seen that both numerators contain the Laplace variable s with an order higher than one, indicating high-pass characteristics for the DC component U d c . As a result, the steady-state output u i ( t ) contains no DC offset, and it is only necessary to evaluate the complex gain for the fundamental component e j w g t .
Evaluate the denominator of u a at s = j w g :
D ( j w g ) = s 3 + ( k 1 + k 2 ) w 0 s 2 + w 0 2 s + k 1 w 0 3 | s = j w g = A + j B
where
A = k 1 w 0 3 ( k 1 + k 2 ) w 0 w g 2 , B = ( w 0 2 w g 2 ) w g
| D ( j w g ) | = A 2 + B 2 = [ k 1 w 0 3 ( k 1 + k 2 ) w 0 w g 2 ] 2 + [ ( w 0 2 w g 2 ) w g ] 2
The fourth-order denominator of u b is calculated as follows:
D 4 ( j w g ) = ( j w g + w 0 ) D ( j w g ) | D 4 ( j w g ) | = | D ( j w g ) | w g 2 + w 0 2
Frequency-domain characteristics of the numerator transfer function N i ( j w g ) in each path:
u a :
N 1 ( j w g ) = k 2 w 0 ( j w g ) 2 = k 2 w 0 w g 2 | N 1 ( j w g ) | = k 2 w 0 w g 2 , N 1 = π
u b :
N 2 ( j w g ) = k 2 w 0 ( j w g ) 2 · ( j w g + w 0 ) = k 2 w 0 w g 2 ( w 0 + j w g ) | N 2 ( j w g ) | = k 2 w 0 w g 2 w 0 2 + w g 2 , N 2 = π arctan ( w g w 0 )
Based on this, two sets of magnitude and phase characteristics are obtained.
m 1 = k 2 w 0 w g 2 | D ( j w g ) | , φ 1 = π + arctan B A
m 2 = k 2 w 0 w g 2 w 0 2 + w g 2 | D 4 ( j w g ) | = k 2 w 0 w g 2 w 0 2 + w g 2 | D ( j w g ) | w g 2 + w 0 2 = k 2 w 0 w g 2 | D ( j w g ) | φ 2 = ( π arctan w g w 0 ) + arctan B A
It can be observed that the magnitude attenuation satisfies m 2 = m 1 . Likewise, the phase response satisfies φ 2 = φ 1 arctan w g w 0 , when w g = w 0 , the phase lags by approximately 90 degrees.
By applying Laplace transform techniques to Equations (7) and (8), the steady-state output of u i ( t ) can be expressed as:
lim t u i ( t ) = m i U m sin ( w g t + φ g + φ i ) , i = 1 , 2
The magnitude mmm is given by Equations (15) and (16), with the DC component completely eliminated. The phase shift φ i consists of the initial phase angle arctan B A , plus the inherent phase angle of each numerator, where A = B :
A = 0 , B = 0 | D | = k 1 w 0 3 , m 1 = m 2 = k 2 k 1 , φ 1 = π , φ 2 = π 2
Equation (18) confirms that orthogonal α-axis and β-axis components are precisely formed within the PLL.
In conclusion, by incorporating an additional integrator, the system introduces a high-pass characteristic that completely rejects DC components, ensuring that no steady-state bias propagates into the phase detection. Meanwhile, the all-pass filter preserves the signal amplitude while correcting phase delay, thereby maintaining accurate 90° orthogonality between the α and β signals. When considering the parameters k 1 and k 2 in the transfer function of the EA-SOGI, it can be seen from Equation (17) that they have no impact on the steady-state behavior. However, the values of k 1 and k 2 do influence the transient response and the harmonic attenuation capability of the EA-SOGI filtering block. Therefore, proper tuning of k 1 and k 2 is essential to ensure satisfactory performance, which will be discussed in detail in the following section.

2.4. Quasi-Proportional Resonant (QPR) Control

In order to improve the control performance of the PI controller within the PLL, the controller can be optimized accordingly. As mentioned in [23], the Proportional-Resonant (PR) controller provides infinite gain at the fundamental frequency and enables zero steady-state error tracking for sinusoidal AC signals. The transfer function of the PR controller is given as follows:
G p r ( s ) = K p + 2 K r s s 2 + w 0 2
where K p is the proportional gain, K r is the resonant gain, and w 0 denotes the nominal (fundamental) angular frequency.
The proportional-resonant (PR) controller exhibits extremely high gain at the nominal frequency, enabling zero steady-state error tracking for sinusoidal AC signals. However, when the grid voltage frequency suddenly changes, the controller’s gain decreases rapidly, leading to degraded current tracking performance in grid-connected applications. To overcome this issue, a cutoff frequency w c is introduced to widen the PR controller’s bandwidth. This results in the design of a quasi-proportional-resonant (QPR) controller, whose transfer function is defined as follows:
G Q P R ( s ) = K p + 2 K r w c s s 2 + 2 w c s + w 0 2
where K p is the proportional gain, K r is the resonant gain, w 0 is the fundamental frequency, and w c denotes the cutoff frequency.
Figure 6 presents the Bode plot of the QPR controller with selected parameters: fundamental frequency w 0 = 100 π r a d / s , K p = 1 , K r = 50 , and cutoff frequency w c = π r a d / s . It is evident that the gain of the QPR controller decreases significantly in the high-frequency region, indicating its effectiveness in suppressing noise components beyond the nominal frequency while maintaining system stability. Compared with PI and conventional PR controllers, the QPR controller provides improved accuracy in handling frequency and phase deviations, thereby reducing phase lag without compromising the system’s overall stability.

3. Parameter Optimization

To enhance the dynamic response and frequency tracking capability in single-phase phase-locked loop (PLL) systems, this study employs a quasi-proportional-resonant (QPR) controller structure. The key parameters in the design of this controller include the proportional gain K p , the resonant gain K r , and the cutoff frequency w c . Additionally, two tuning parameters k 1 and k 2 are embedded in the enhanced all-pass structure second-order generalized integrator (EA-SOGI) module. These parameters significantly affect the system’s dynamic performance, steady-state error, and adaptability to frequency deviations. Therefore, an optimization algorithm is required to automatically identify the optimal combination of these parameters.

3.1. Principle of the Asynchronous Linearly Changing Learning Factor Particle Swarm Optimization Algorithm (AsyLnCPSO)

Particle Swarm Optimization (PSO) is a swarm intelligence optimization algorithm inspired by the foraging behavior of bird flocks. In the standard PSO, each particle updates its position based on its own best-known position (Pbest) and the global best-known position (Gbest) among all particles. The search behavior is governed by the following equations:
v i t + 1 = w v i t + c 1 r 1 ( p i x i t ) + c 2 r 2 ( g x i t )
x i t + 1 = x i t + v i t + 1
Here, w denotes the inertia weight, c 1 and c 2 are learning factors, r 1 and r 2 are uniformly distributed random numbers in the range [0, 1]. Although this method has a simple structure, the fixed learning factors may cause the search behavior to be overly aggressive in the early stages and lack local search capability in later stages. This makes the algorithm prone to premature convergence, especially in non-convex or high-dimensional search spaces. To address these issues, the Asynchronous Linear Changing Cognitive and Social Learning Factors PSO (AsyLnCPSO) algorithm is proposed to dynamically adjust c 1 and c 2 :
c 1 ( t ) = c 1 max ( c 1 max c 1 min ) · t T c 2 ( t ) = c 2 max + ( c 2 max c 2 min ) · t T
The cognitive component decreases over time, encouraging individual exploration in the early stages, while the social component increases, promoting collective convergence in the later stages. This asynchronous mechanism enhances the algorithm’s adaptability across different phases, enabling stronger global exploration in the initial stage and improved convergence performance in the later stage.

3.2. Levy Flight Mechanism

Levy flight is a random step-length model characterized by a heavy-tailed distribution, commonly used to model sudden, long-distance jumps. It is distinguished by the presence of predominantly short steps punctuated by occasional long jumps, conforming to a Levy distribution:
L evy ~ u = t λ , ( 1 < λ 3 )
Compared to the conventional Gaussian distribution, the Levy distribution is more suitable for modeling non-local search processes. It is commonly approximated using the Mantegna algorithm:
L e v y ( λ ) = μ | v | 1 / λ
Variables μ and v follow Gaussian distributions N ( 0 , σ 2 ) , respectively. The introduction of the Levy flight mechanism can effectively help particles escape from local optima and enhance the global search capability of the algorithm.

3.3. Levy–AsyLnCPSO Hybrid Strategy

To fully leverage the strengths of AsyLnCPSO and the Lévy flight mechanism, this paper integrates both into a novel optimization algorithm named Levy–AsyLnCPSO. Based on the original AsyLnCPSO framework, a Lévy perturbation term is introduced after the velocity update. During each iteration, particles perform a Lévy jump to expand the search space and avoid entrapment in local optima. The position update equation is expressed as follows:
v i t + 1 = w v i t + c 1 ( t ) r 1 ( p i x i t ) + c 2 ( t ) r 2 ( g x i t ) + L e v y ( )
Here, p i denotes the personal best position of the particle, g represents the global best position, and L e v y ( ) signifies the Levy perturbation term.
To further clarify the operational steps of the proposed Levy–AsyLnCPSO algorithm, Figure 7 illustrates its overall flow. The algorithm begins by initializing the decision vector x = [ K p , K r , w c , k 1 , k 2 ] within feasible bounds. In each iteration, asynchronous learning schedules are adopted to dynamically adjust the cognitive and social learning factors, which ensures stronger exploration in the early stage and improved convergence in the later stage. Based on this schedule, particles update their velocities and positions according to the standard AsyLnCPSO rules. To avoid premature convergence, a Levy perturbation is injected with a certain probability after the position update, thereby introducing occasional long jumps and enlarging the search space. After boundary handling, the updated particles are evaluated through the PLL simulation model to obtain their fitness values. The algorithm then updates the personal and global best solutions. This process repeats until the maximum number of iterations or a convergence criterion is satisfied, after which the optimal parameter set [ K p , K r , w c , k 1 , k 2 ] is obtained.

3.4. Algorithm Evaluation

To verify the effectiveness of the improved algorithm, PSO, AsyLnCPSO, and Levy-AsyLnCPSO were used to perform comparative tests on four internationally recognized benchmark functions. In the experiments, all algorithms were initialized with a population size of 30 and a maximum number of 1000 iterations. The theoretical optimal value for all functions is 0. Details of the benchmark functions are listed in Table 1.
As observed from Figure 8, the conventional PSO demonstrates the slowest convergence and poorest accuracy, often stagnating at suboptimal values. AsyLnCPSO improves convergence speed and accuracy by dynamically adjusting the cognitive and social learning factors, but it can still become trapped in local optima, especially for multimodal functions. In contrast, Levy–AsyLnCPSO consistently achieves both faster convergence and better accuracy across all benchmark functions.
This advantage arises from the Levy flight mechanism, which introduces occasional long jumps into the particle trajectories. For unimodal functions such as Sphere and Schwefel, these jumps enlarge the search radius during early iterations, enabling quicker global convergence. For multimodal functions such as Step and Rastrigin, the long jumps help particles escape local minima, thereby preventing premature convergence and achieving solutions closer to the global optimum.
Table 2 further confirms these observations: the Levy–AsyLnCPSO achieves errors very close to zero in all cases, while PSO and AsyLnCPSO show larger deviations.
Overall, the integration of Levy flights with AsyLnCPSO significantly enhances robustness and global exploration ability, making the hybrid algorithm well suited for optimizing PLL controller parameters, where the search space is nonlinear and multimodal.

3.5. Performance Comparison and Analysis of Algorithms

To quantitatively evaluate the effectiveness of the proposed algorithm in optimizing parameters within the SOGI system, this paper conducts comparative experiments using the final parameter sets obtained from three different particle swarm optimization (PSO) strategies. The comparison is conducted across the following three key performance metrics:
1.
Fundamental Amplitude Error;
This metric characterizes the amplitude discrepancy between the alpha-axis and beta-axis components extracted by the SOGI. It is calculated as the sum of squared differences between the magnitudes of the fundamental frequency components in both channels:
A E = ( | U 1 | A ) 2 + ( | U 2 | A ) 2
where U 1 and U 2 are the complex coefficients of the fundamental frequency components of u a ( t ) and u b ( t ) , respectively, and A is the reference amplitude (normalized to 1).
2.
Orthogonal Phase Error;
This metric reflects the phase deviation between signals u a ( t ) and u b ( t ) . Ideally, the phase difference should be ±90°. In this paper, the phase deviation is calculated based on the phase difference in the dominant frequency components in the frequency domain:
P E = ( U 1 U 2 ± 90 ) 2
3.
Phase-Locking Time.
This metric represents the shortest time required for the phase angle error θ e r r in the PLL system to converge within ±0.5° and remain stable for at least 10 ms. It serves as an indicator of the system’s dynamic response speed.
As summarized in Table 3, the improvements brought by the Levy–AsyLnCPSO optimization are not only numerical but also practically meaningful for real-time PLL applications.
First, the amplitude error is reduced from 0.0592 (PSO) to 2.4 × 10−4, indicating that the orthogonal α and β components remain highly symmetrical, which is crucial for accurate coordinate transformation. Second, the orthogonal phase error decreases from 1.7 × 10−3 to the order of 10−12, demonstrating nearly ideal 90° orthogonality and ensuring precise phase estimation even under distorted grid conditions. Finally, the phase-locking time is shortened from 64.5 ms (PSO) to about 30 ms, which satisfies the common requirement of grid-connected inverters that synchronization should be achieved within 50 ms.
These results confirm that the Levy–AsyLnCPSO-based parameter tuning significantly enhances both accuracy and dynamic response, making the proposed PLL suitable for practical implementation.
The final optimized parameters obtained via the Levy-AsyLnCPSO algorithm are K p = 4.0921 , K r = 1 , w c = 345.0833 , k 1 = 0.353 , k 2 = 0.8775 .

4. Simulation and Experimental Analysis

To validate the effectiveness of the proposed improved PLL control structure, a comprehensive single-phase grid-connected simulation model was established in MATLAB/Simulink, employing a single-loop feedback control based on the inverter-side current.

4.1. Simulation Analysis

We analyze the performance of the conventional SOGI, Type-3 SOGI [24], APF-SOGI, and the proposed EA-SOGI in terms of output frequency and current waveforms during grid synchronization, as illustrated in Figure 9.
From Figure 9, it can be observed that the conventional SOGI exhibits large frequency oscillations in the initial stage, indicating poor stability and a long recovery time. Both the Type-3 SOGI and the APF-SOGI show certain overshoot at the beginning, whereas the EA-SOGI demonstrates no noticeable overshoot, maintains a smooth response, and locks the frequency at 50 Hz within a much shorter time.
To evaluate the harmonic suppression capability of different PLL structures in grid-connected current control, time-domain and frequency-domain analyses were performed on the current signals under NO-PLL, SOGI, Type-3 SOGI, APF-SOGI, and EA-SOGI configurations. Quantitative comparisons were conducted focusing on DC offset (0 Hz), third harmonic (150 Hz), and total harmonic distortion (THD), as illustrated in Figure 10.
Figure 10 illustrates the differences in output current waveforms and harmonic content among various structures.
Without a PLL, the inverter current directly follows the distorted grid voltage, resulting in a significantly high total harmonic distortion (THD = 16.37%), a DC component of 0.4425% at 0 Hz, and a third-order harmonic of 2.73% at 150 Hz.
By introducing a PLL, the system can generate orthogonal components and more accurately extract the fundamental signal, thereby inherently suppressing DC offsets and harmonics.
Among the different methods, the conventional SOGI reduces part of the distortion through resonant filtering but remains sensitive to DC bias, leaving relatively high residual harmonics. The Type-3 SOGI and APF-SOGI, by employing additional phase-compensation branches, further mitigate the DC offset but still exhibit certain overshoot during the transient stage. In contrast, the proposed EA-SOGI, which integrates an all-pass filter and an additional integral path, achieves complete suppression of the DC component and produces smoother orthogonal signals. As a result, it achieves the lowest distortion level, with THD reduced to 2.8653%, DC component to 0.0132%, and third harmonic to 0.1447%.
To evaluate the dynamic performance and stability of the proposed method, several adverse operating conditions—including voltage sag, frequency deviation, phase jump, and DC offset—were simulated on the basis of an ideal grid voltage of 220 V/50 Hz, in order to verify the adaptability of the PLL. The corresponding simulation results are presented in Figure 11.
Figure 11a shows the case where the input voltage drops by 0.5 p.u. at 0.1 s. All PLLs undergo a transient adjustment process, during which the conventional SOGI exhibits strong oscillations and a long recovery time. In contrast, the proposed EA-SOGI achieves a smooth transition with only a small overshoot and recovers within 0.04 s.
Figure 11b illustrates the response to a sudden frequency increase of 2.5 Hz at 0.1 s. The conventional SOGI oscillates severely around the new equilibrium at 52.5 Hz, while the Type-3 SOGI converges more quickly but suffers from noticeable overshoot. The EA-SOGI completes frequency tracking the fastest with the smallest oscillation amplitude, demonstrating that the improved structure effectively mitigates phase errors induced by frequency deviations.
Figure 11c presents the case of a 45° phase jump applied at 0.1 s. The EA-SOGI exhibits superior performance by resynchronizing first, whereas the Type-3 SOGI, due to the introduction of additional compensation branches, shows a longer settling time.
Figure 11d depicts the injection of a DC offset into the single-phase input voltage at 0.1 s. The conventional SOGI fails to reject the DC component and results in sustained oscillations, whereas the EA-SOGI, aided by the additional integrator and compensation path, nearly eliminates the impact of the DC bias and maintains stable frequency estimation.
In summary, the EA-SOGI not only provides high accuracy under steady-state conditions but also demonstrates superior robustness and adaptability under adverse scenarios such as voltage sags, frequency deviations, phase jumps, and DC offsets, validating its reliability in practical grid-connected PLL applications.

4.2. Physical Experiment

To validate the reliability of the experimental results, a custom-designed 1 kW photovoltaic grid-connected inverter platform developed by a domestic company was employed, as illustrated in Figure 12. During testing, the grid frequency was aligned with that of a specific district in Shenyang, Liaoning Province. A rapid control prototyping (RCP) unit (YXSP2000) was used to acquire the current signals, which were then processed on a personal computer for Orthogonal Component Filtering (OCF) and signal detection. The experimental setup employed the TI TMS320F28335 platform with a built-in 12-bit ADC. The quantization error is less than 0.05% of the full-scale input, which is negligible compared to the system operating range. Measurement noise was further mitigated by digital sampling and filtering, while the intrinsic low-pass characteristics of the PLL suppress high-frequency disturbances. The inverter adopts the SPWM modulation strategy with a switching frequency of 20 kHz, and the detailed parameters are listed in Table 4.
As shown in Figure 13, the angular frequency waveforms demonstrate that the EA-SOGI is still capable of effectively locking the phase in hardware implementation. In particular, Figure 13b shows that during the initial grid-connection stage, both SOGI and Type-3 SOGI exhibit significant frequency oscillations, while EA-SOGI displays the smallest oscillation amplitude, indicating its superior response speed and robustness. As illustrated in Figure 13c, the SOGI exhibits large frequency fluctuations during the later stages of operation, which significantly deviates from the simulation results. The primary reason for this discrepancy lies in the difference between the simulation and the actual hardware environment. In the simulations, the grid voltage frequency is fixed at 50 Hz, whereas in the hardware experiments, the real utility grid was used, which fluctuates slightly around 50 ± 0.1 Hz. At this point, due to the insufficient frequency adaptability of SOGI, it fails to effectively track these slight fluctuations, resulting in increased oscillation amplitude. This reveals that SOGI is relatively sensitive to frequency disturbances under actual grid conditions [25]. The improved EA-SOGI, through the combination of an additional integrator and an all-pass filter, is still able to accurately lock the phase in hardware experiments, with only minor deviations from the simulation results.
As shown in Figure 14a, without the Phase-Locked Loop (PLL), the system appears to have a faster response and better steady-state performance. However, in this case, the harmonic components of the grid voltage are directly passed to the reference current, causing distortion in the inverter output current waveform and a phase error of 16.2°, which negatively affects the grid quality. As shown in Figure 14b, after introducing the EA-SOGI PLL, the phase error is reduced to 8°, and the waveform distortion is significantly reduced. This demonstrates that the EA-SOGI can significantly improve current tracking performance under steady-state conditions, enhancing the system’s power factor and grid connection quality.
As shown in Figure 15, the fast Fourier transform (FFT) analysis of the inverter output current under the hardware environment is presented. In the absence of a PLL, the total harmonic distortion (THD) reaches 7.514%, with a DC component proportion of 0.14821% at 0 Hz and a third harmonic component of 7.28879% at 150 Hz (Figure 15a). After introducing SOGI, although some suppression of DC offset and harmonics is achieved, the output current waveform still exhibits significant distortion (Figure 15b). This discrepancy is primarily attributed to differences between the simulation and hardware environments: in simulations, the grid voltage frequency is assumed to be an ideal sinusoidal waveform, whereas in real hardware conditions, the utility grid inevitably includes harmonic distortions and DC offset components. Furthermore, in simulation models, pure inductance is typically connected on the grid side to emulate grid impedance. In contrast, the actual hardware environment involves a variety of components such as cables and transformers, leading to a grid impedance that is generally lower than the value used in simulations. Type-3 SOGI and APF-SOGI possess better adaptability than SOGI, enabling them to maintain a certain level of harmonic suppression under fluctuating grid frequencies. However, due to structural limitations, the proportion of DC offset components remains relatively high (Figure 15c,d). EA-SOGI demonstrates the best performance in suppressing both harmonics and DC offset, achieving a THD of 3.7421%, with the DC component reduced to 0.01979% and the third harmonic component at 150 Hz lowered to 0.31235%, representing the lowest levels among all schemes (Figure 15e). This indicates that EA-SOGI maintains robust performance even under real hardware conditions. These results are largely consistent with simulation outcomes, thus validating the effectiveness of the proposed control strategy.

5. Conclusions

This study focuses on single-phase grid-connected inverters, addressing key issues such as DC offset, harmonic interference, and the impact of phase-locked loops (PLLs) on system stability. The research primarily investigates PLL control strategies and controller parameter optimization. Based on comprehensive theoretical analysis, simulation verification, and hardware experiments, the following conclusions are drawn:
  • To address the limitations of conventional SOGI-based PLLs in terms of DC offset suppression, harmonic rejection, and adaptive performance, this work proposes a structurally enhanced SOGI module. By incorporating a full-pass phase compensation channel and a DC offset rejection mechanism, the proposed EA-SOGI structure significantly improves the extraction accuracy of the fundamental signal. Additionally, the conventional PI controller in the PLL is replaced with a quasi-proportional-resonant (QPR) controller, which enhances the system’s dynamic response at resonant frequencies while maintaining zero steady-state error. Simulation and hardware experiment results confirm that the EA-SOGI structure exhibits superior performance in suppressing DC offset and reducing total harmonic distortion (THD), lowering THD to 2.8653%, thus validating its effectiveness in improving grid power quality.
  • In terms of parameter tuning, this study adopts the Levy-AsyLnCPSO intelligent optimization algorithm to conduct multi-objective cooperative searching of the QPR controller’s resonance frequency, proportional gain, and resonant gain. This strategy achieves an optimal trade-off among system stability, dynamic response, and harmonic suppression. Simulation results demonstrate that the parameters optimized by Levy-AsyLnCPSO significantly enhance the synchronization accuracy and dynamic robustness of the single-phase grid-connected system, thereby ensuring its reliable operation.
Although the proposed EA-SOGI combined with the Levy–AsyLnCPSO optimization algorithm has demonstrated excellent performance in suppressing DC offset, improving frequency adaptability, and enhancing robustness under distorted grid conditions, there are still several promising directions for future research. First, the extension of the proposed method to three-phase systems and multi-converter scenarios will be investigated to evaluate its scalability in complex grid environments. Second, incorporating higher-order harmonic compensation and adaptive notch filters could further enhance the rejection of severe harmonic distortions. Finally, integrating the proposed PLL structure with advanced grid-forming and grid-following control strategies may provide additional insights into improving the stability of future renewable-rich power systems.

Author Contributions

Conceptualization, X.K.; writing—original draft preparation, X.X.; writing—review and editing, X.X. and G.G.; software, X.X.; funding acquisition, X.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Liaoning Provincial Department of Education Basic Scientific Research Project, grant number LJKMZ20220778; and the National Foreign Expert Project of China, grant number DL2021006001L.

Data Availability Statement

The authors will provide the raw data supporting the conclusions of this article upon request.

Conflicts of Interest

The authors declare no conflicts of interest.

Abbreviations

The following abbreviations are used in this manuscript:
PLLPhase-Locked Loop
SOGISecond-Order Generalized Integrator
EA-SOGIExtended-State All-Pass Generalized Integrator
PIProportional-Integral
PRProportional Resonant
QPRQuasi-Proportional Resonant
AsyLnCPSOAsynchronous Linearly Varying Learning Factor Particle Swarm Optimization
FFTFast Fourier Transform
THDTotal Harmonic Distortion
SRF-PLLSynchronous reference frame-based PLL
QSGQuadrature signal generator
APF-SOGIAll-Pass Filter Based Second-Order Generalized Integrator

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Figure 1. Single-Phase Grid-Connected Inverter with LCL Filter.
Figure 1. Single-Phase Grid-Connected Inverter with LCL Filter.
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Figure 2. Block Diagram of SOGI.
Figure 2. Block Diagram of SOGI.
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Figure 3. Frequency response (Bode plots) of the transfer functions G a ( s ) and G b ( s ) under varying damping coefficients k = 0.5, 1.414, 2. (a) Magnitude and phase of G a ( s ) ; (b) Magnitude and phase of G b ( s ) .
Figure 3. Frequency response (Bode plots) of the transfer functions G a ( s ) and G b ( s ) under varying damping coefficients k = 0.5, 1.414, 2. (a) Magnitude and phase of G a ( s ) ; (b) Magnitude and phase of G b ( s ) .
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Figure 4. Block Diagram of EA-SOGI.
Figure 4. Block Diagram of EA-SOGI.
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Figure 5. Bode diagram of the EA-SOGI with parameters k 1 = 0.15 and k 2 = 1. (a) Magnitude and phase of D ( s ) ; (b) Magnitude and phase of Q ( s ) .
Figure 5. Bode diagram of the EA-SOGI with parameters k 1 = 0.15 and k 2 = 1. (a) Magnitude and phase of D ( s ) ; (b) Magnitude and phase of Q ( s ) .
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Figure 6. Bode diagram of the QPR controller.
Figure 6. Bode diagram of the QPR controller.
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Figure 7. Flowchart of the Levy–AsyLnCPSO Algorithm.
Figure 7. Flowchart of the Levy–AsyLnCPSO Algorithm.
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Figure 8. Benchmark Function Comparison Charts.
Figure 8. Benchmark Function Comparison Charts.
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Figure 9. Angular Frequency Waveforms of Different QSGs: (a) Angular Frequency; (b) Enlarged View of the Initial Response.
Figure 9. Angular Frequency Waveforms of Different QSGs: (a) Angular Frequency; (b) Enlarged View of the Initial Response.
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Figure 10. Grid-Connected Inverter Current Waveforms and FFT Analysis: (a) NO-PLL; (b) SOGI; (c) Type-3 SOGI; (d) APF-SOGI; (e) EA-SOGI.
Figure 10. Grid-Connected Inverter Current Waveforms and FFT Analysis: (a) NO-PLL; (b) SOGI; (c) Type-3 SOGI; (d) APF-SOGI; (e) EA-SOGI.
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Figure 11. QSG responses under different conditions: (a) voltage sag of 0.5 p.u., (b) frequency increase of 2.5 Hz, (c) phase jump of 45°, (d) DC offset injection.
Figure 11. QSG responses under different conditions: (a) voltage sag of 0.5 p.u., (b) frequency increase of 2.5 Hz, (c) phase jump of 45°, (d) DC offset injection.
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Figure 12. Experimental Platform.
Figure 12. Experimental Platform.
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Figure 13. Angular Frequency Waveform (a) Angular Frequency (b) Early-Stage Zoom-In View (c) Late-Stage Zoom-In View.
Figure 13. Angular Frequency Waveform (a) Angular Frequency (b) Early-Stage Zoom-In View (c) Late-Stage Zoom-In View.
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Figure 14. Grid voltage and grid-connected current waveforms: (a) Without the PLL (b) With the EA-SOGI PLL introduced.
Figure 14. Grid voltage and grid-connected current waveforms: (a) Without the PLL (b) With the EA-SOGI PLL introduced.
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Figure 15. Experimental Grid-Connected Current Waveforms and FFT Analysis (a) NO-PLL (b) SOGI (c) Type-3 SOGI (d) APF-SOGI (e) EA-SOGI.
Figure 15. Experimental Grid-Connected Current Waveforms and FFT Analysis (a) NO-PLL (b) SOGI (c) Type-3 SOGI (d) APF-SOGI (e) EA-SOGI.
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Table 1. Benchmark Function Information.
Table 1. Benchmark Function Information.
NameFunction Expression
Sphere f 1 ( x ) = i = 1 D i m x i 2
Schwefel 2.22 f 2 x = i = 1 D i m x i + i = 1 D i m x i
Step f 3 x = i = 1 D i m ( x i + 0.5 ) 2
Rastrigin f 4 x = i = 1 D i m [ x i 2 10 cos ( 2 π x i ) + 10 ]
Table 2. Algorithm Performance Comparison.
Table 2. Algorithm Performance Comparison.
NameSearch RangeAlgorithmOptimal Value
Sphere[−100, 100]PSO19.497
AsyLnCPSO3.03276
Levy-AsyLnCPSO0.07165
Schwefel
2.22
[−10, 10]PSO2.46177
AsyLnCPSO2.113
Levy-AsyLnCPSO0.38191
Step[−100, 100]PSO14.5782
AsyLnCPSO6.05298
Levy-AsyLnCPSO0.28721
Rastrigin[−5.12, 5.12]PSO149.901
AsyLnCPSO96.1297
Levy-AsyLnCPSO2.82833
Table 3. Comparison of Algorithm Performance.
Table 3. Comparison of Algorithm Performance.
AlgorithmAmplitude ErrorPhase ErrorPhase-Locking Time
PSO0.05920.001764.524
AsyLnCPSO2.4 × 10−42.72 × 10−1234.726
Levy-AsyLnCPSO2.4 × 10−41.43 × 10−1230.051
Table 4. System Physical Parameters.
Table 4. System Physical Parameters.
ParameterSymbolValueParameterSymbolValue
Dc-link voltage V i n 210 VSampling coefficient H 1
Grid voltage V m 160 VInverter-side
Inductor
L 1 2 mH ± 20%
Direct Current I i n 5 AGrid-impedance L g 0~5 mH
Output Power P 0 1 kwFilter capacitor C 5 uF
Fundamental frequency f 0 50 HzGrid-side inductor L 2 0.2 mH ± 20%
Sampling frequency f s 20 kHzCurrent regulator k i p 0.5
Switching frequency f s w 20 kHz k i i 0
ADC resolution N A D C 1 bitRegulator of PLL K p 4.0921
Sampling delay T d e l a y 2 μs K r 87.2304
Carrier wave
amplitude
V t r i 1 V w c 345.0833
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Kong, X.; Xu, X.; Ge, G. Design and Research of an Improved Phase-Locked Loop Based on Levy-AsyLnCPSO Optimization and EA-SOGI Structure. Processes 2025, 13, 3036. https://doi.org/10.3390/pr13103036

AMA Style

Kong X, Xu X, Ge G. Design and Research of an Improved Phase-Locked Loop Based on Levy-AsyLnCPSO Optimization and EA-SOGI Structure. Processes. 2025; 13(10):3036. https://doi.org/10.3390/pr13103036

Chicago/Turabian Style

Kong, Xiaoguang, Xiaotian Xu, and Guannan Ge. 2025. "Design and Research of an Improved Phase-Locked Loop Based on Levy-AsyLnCPSO Optimization and EA-SOGI Structure" Processes 13, no. 10: 3036. https://doi.org/10.3390/pr13103036

APA Style

Kong, X., Xu, X., & Ge, G. (2025). Design and Research of an Improved Phase-Locked Loop Based on Levy-AsyLnCPSO Optimization and EA-SOGI Structure. Processes, 13(10), 3036. https://doi.org/10.3390/pr13103036

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