#
A Switched Capacitor Memristor Emulator Using Stochastic Computing^{ †}

^{1}

^{2}

^{3}

^{4}

^{*}

^{†}

## Abstract

**:**

## 1. Introduction

## 2. Theoretical Background

#### 2.1. Memristor Mathematical Description

- (1)
- As Leon Chua noted in [33]: “If it’s NOT pinched, it’s NOT a memristor”. The i-v curve obtained when a periodic signal with zero DC component (voltage or current) is applied to the memristor shows a pinched (at the (v = 0,i = 0) point) hysteresis loop;
- (2)

#### 2.2. Stochastic Logic Operations

## 3. Memristor Emulator Design

#### 3.1. Theoretical Design

#### 3.2. Simulation Results

## 4. Experimental Implementation

#### 4.1. Experimental Setup

#### 4.2. Experimental Results

## 5. Discussion

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Conflicts of Interest

## References

- Chua, L. Memristor-the missing circuit element. IEEE Trans. Circuit Theory
**1971**, 18, 507–519. [Google Scholar] [CrossRef] - Strukov, D.B.; Snider, G.S.; Stewart, D.R.; Williams, R.S. The missing memristor found. Nature
**2008**, 453, 80–83. [Google Scholar] [CrossRef] [PubMed] - Stavrinides, S.G.; Picos, R.; Corinto, F.; Al Chawa, M.M.; de Benito, C. Implementing memristor emulators in hardware. In Mem-Elements for Neuromorphic Circuits with Artificial Intelligence Applications; Academic Press: Cambridge, MA, USA, 2021; pp. 17–40. [Google Scholar]
- Ascoli, A.; Corinto, F.; Tetzlaff, R. A class of versatile circuits, made up of standard electrical components, are memristors. Int. J. Circuit Theory Appl.
**2016**, 44, 127–146. [Google Scholar] [CrossRef] - Kalomiros, J.; Stavrinides, S.G.; Corinto, F. A two-transistor non-ideal memristor emulator. In Proceedings of the Modern Circuits and Systems Technologies (MOCAST), 2016 5th International Conference, Thessaloniki, Greece, 12–14 May 2016; pp. 1–4. [Google Scholar]
- Kim, H.; Sah, M.P.; Yang, C.; Cho, S.; Chua, L.O. Memristor emulator for memristor circuit applications. IEEE Trans. Circ. Syst. I Regul. Pap.
**2012**, 59, 2422–2431. [Google Scholar] - Li, Z.; Zeng, Y.; Ma, M. A novel floating memristor emulator with minimal components. Act. Passiv. Electron. Components
**2017**, 2017, 1609787. [Google Scholar] [CrossRef] [Green Version] - Vourkas, I.; Abusleme, A.; Ntinas, V.; Sirakoulis, G.C.; Rubio, A. A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks. In Proceedings of the Verification and Security Workshop (IVSW), Sant Feliu de Guixols, Spain, 4–6 July 2016; pp. 1–4. [Google Scholar]
- Ranjan, R.; Ponce, P.M.; Kankuppe, A.; John, B.; Saleh, L.A.; Schroeder, D.; Krautschneider, W.H. Programmable memristor emulator asic for biologically inspired memristive learning. In Proceedings of the Telecommunications and Signal Processing (TSP), 2016 39th International Conference, Vienna, Austria, 27–29 June 2016; pp. 261–264. [Google Scholar]
- Kolka, Z.; Vavra, J.; Biolkova, V.; Ascoli, A.; Tetzlaff, R.; Biolek, D. Programmable Emulator of Genuinely Floating Memristive Switching Devices. In Proceedings of the 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Genova, Italy, 27–29 November 2019; pp. 217–220. [Google Scholar]
- Romero, F.J.; Ohata, A.; Toral-Lopez, A.; Godoy, A.; Morales, D.P.; Rodriguez, N. Memcapacitor and Meminductor Circuit Emulators: A Review. Electronics
**2021**, 10, 1225. [Google Scholar] [CrossRef] - Von Neumann, J. First draft of a report on the EDVAC. IEEE Ann. Hist. Comput.
**1993**, 15, 27–75. [Google Scholar] [CrossRef] - Von Neumann, J. Probabilistic logics and the synthesis of reliable organisms from unreliable components. Autom. Stud.
**1956**, 34, 43–98. [Google Scholar] - Von Neumann, J.; Pierce, R.S. Lectures on Probabilistic Logics and the Synthesis of Reliable Organisms from Unreliable Components; California Institute of Technology: Pasadena, CA, USA, 1952. [Google Scholar]
- Gaines, B.R. Stochastic computing. In Proceedings of the Spring Joint Computer Conference, New York, NY, USA, 18–20 April 1967; pp. 149–156. [Google Scholar]
- Poppelbaum, W.; Afuso, C.; Esch, J. Stochastic computing elements and systems. In Proceedings of the Fall Joint Computer Conference, Anaheim, CA, USA, 14–16 November 1967; pp. 635–644. [Google Scholar]
- Fick, D.; Kim, G.; Wang, A.; Blaauw, D.; Sylvester, D. Mixed-signal stochastic computation demonstrated in an image sensor with integrated 2D edge detection and noise filtering. In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, San Jose, CA, USA, 15–17 September 2014; pp. 1–4. [Google Scholar]
- Camps, O.; Stavrinides, S.G.; Picos, R. Efficient Implementation of Memristor Cellular Nonlinear Networks using Stochastic Computing. In Proceedings of the 2020 European Conference on Circuit Theory and Design (ECCTD), Sofia, Bulgaria, 7–10 September 2020; pp. 1–4. [Google Scholar]
- Camps, O.; al Chawa, M.M.; Stavrinides, S.G.; Picos, R. Stochastic Computing Emulation of Memristor Cellular Nonlinear Networks. 2021; Preprints. [Google Scholar]
- Wang, R.; Han, J.; Cockburn, B.; Elliott, D. Stochastic circuit design and performance evaluation of vector quantization. In Proceedings of the 2015 IEEE 26th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), Toronto, ON, Canada, 27–29 July 2015; pp. 111–115. [Google Scholar]
- Yuan, B.; Wang, Y.; Wang, Z. Area-efficient scaling-free DFT/FFT design using stochastic computing. IEEE Trans. Circ. Syst. II Express Briefs
**2016**, 63, 1131–1135. [Google Scholar] [CrossRef] - Camps, O.; Stavrinides, S.G.; Picos, R. Stochastic Computing Implementation of Chaotic Systems. Mathematics
**2021**, 9, 375. [Google Scholar] [CrossRef] - Toral, S.; Quero, J.; Franquelo, L.G. Digital stochastic realization of complex analog controllers. IEEE Trans. Ind. Electron.
**2002**, 49, 1101–1109. [Google Scholar] - Toral, S.; Quero, J.; Ortega, J.; Franquelo, L. Stochastic A/D sigma-delta converter on FPGA. In Proceedings of the 42nd Midwest Symposium on Circuits and Systems (Cat. No. 99CH36356), Las Cruces, NM, USA, 8–11 August 1999; Volume 1, pp. 35–38. [Google Scholar]
- Toral, S.; Quero, J.; Franquelo, L. Stochastic pulse coded arithmetic. In Proceedings of the 2000 IEEE International Symposium on Circuits and Systems (ISCAS), Geneva, Switzerland, 28–31 May 2000; Volume 1, pp. 599–602. [Google Scholar]
- Moons, B.; Verhelst, M. Energy-efficiency and accuracy of stochastic computing circuits in emerging technologies. IEEE J. Emerg. Sel. Top. Circ. Syst.
**2014**, 4, 475–486. [Google Scholar] [CrossRef] - De Benito, C.; Camps, O.; Al Chawa, M.; Stavrinides, S.; Picos, R. A Stochastic Switched Capacitor Memristor Emulator. In Proceedings of the 2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST), Thessaloniki, Greece, 5–7 July 2021; pp. 1–4. [Google Scholar]
- Svetoslavov, G.; Camps, O.; Stavrinides, S.G.; Picos, R. A Switched Capacitor Memristive Emulator. IEEE Trans. Circ. Syst. II Express Briefs
**2020**, 68, 1463–1466. [Google Scholar] [CrossRef] - Chua, L.O.; Kang, S.M. Memristive devices and systems. Proc. IEEE
**1976**, 64, 209–223. [Google Scholar] [CrossRef] - Leon, C. Everything you wish to know about memristors but are afraid to ask. Radioengineering
**2015**, 24, 319. [Google Scholar] - Corinto, F.; Civalleri, P.P.; Chua, L.O. A theoretical approach to memristor devices. IEEE J. Emerg. Sel. Top. Circ. Syst.
**2015**, 5, 123–132. [Google Scholar] [CrossRef] [Green Version] - Biolek, D.; Biolek, Z.; Biolková, V.; Kolka, Z. Some fingerprints of ideal memristors. In Proceedings of the Circuits and Systems (ISCAS), 2013 IEEE International Symposium, Beijing, China, 19–23 May 2013; pp. 201–204. [Google Scholar]
- Chua, L. If it’s pinched it’s a memristor. Semicond. Sci. Technol.
**2014**, 29, 104001. [Google Scholar] [CrossRef] - Ielmini, D.; Milo, V. Physics-based modeling approaches of resistive switching devices for memory and in-memory computing applications. J. Comput. Electron.
**2017**, 16, 1121–1143. [Google Scholar] [CrossRef] [Green Version] - Chang, K.C.; Chang, T.C.; Tsai, T.M.; Zhang, R.; Hung, Y.C.; Syu, Y.E.; Chang, Y.F.; Chen, M.C.; Chu, T.J.; Chen, H.L.; et al. Physical and chemical mechanisms in oxide-based resistance random access memory. Nanoscale Res. Lett.
**2015**, 10, 120. [Google Scholar] [CrossRef] [Green Version] - Williams, R.S.; Pickett, M.D.; Strachan, J.P. Physics-based memristor models. In Proceedings of the Circuits and Systems (ISCAS), 2013 IEEE International Symposium, Beijing, China, 19–23 May 2013; pp. 217–220. [Google Scholar]
- Chen, T.H.; Hayes, J.P. Design of Division Circuits for Stochastic Computing. In Proceedings of the 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, USA, 11–13 July 2016; pp. 116–121. [Google Scholar]
- Mitra, S.; Banerjee, D.; Naskar, M.K. A Low Latency Stochastic Square Root Circuit. In Proceedings of the 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID), Virtual Event, 20–24 February 2021; pp. 7–12. [Google Scholar]
- Wu, D.; Miguel, J.S. In-Stream Stochastic Division and Square Root via Correlation. In Proceedings of the 2019 56th ACM/IEEE Design Automation Conference (DAC), Las Vegas, NV, USA, 2–6 June 2019; pp. 1–6. [Google Scholar]
- Qin, Z.; Qiu, Y.; Zheng, M.; Dong, H.; Lu, Z.; Wang, Z.; Pan, H. A universal approximation method and optimized hardware architectures for arithmetic functions based on stochastic computing. IEEE Access
**2020**, 8, 46229–46241. [Google Scholar] [CrossRef] - Gaines, B.R. R68-18 random pulse machines. IEEE Trans. Comput.
**1968**, 100, 410. [Google Scholar] [CrossRef] - Gaines, B.R. Stochastic computing systems. In Advances in Information Systems Science; Springer: Berlin/Heidelberg, Germany, 1969; pp. 37–172. [Google Scholar]
- Kimball, J.W.; Krein, P.T.; Cahill, K.R. Modeling of capacitor impedance in switching converters. IEEE Power Electron. Lett.
**2005**, 3, 136–140. [Google Scholar] [CrossRef] - Forencich, A. Verilog Implementation of Mersenne Twister PRNG. 2018. Available online: https://github.com/alexforencich/verilog-mersenne (accessed on 15 February 2020).

**Figure 1.**Basic implementation scheme of a SC multiplier in the (0..1) range (AND gate,

**left**) and in the (−1..1) range (XNOR gate,

**right**).

**Figure 2.**Basic implementation schemes (

**a**) of a SC adder using a multiplexer and (

**b**) a stochastic number generator (SGN) which converts a binary encoded number (BEN) to a stochastic encoded number (SEN) using a random number generator (RNG).

**Figure 6.**Simulated $i-v$ characteristic curves of the memristor implemented using Figure 4. Three different frequencies are shown in different colors.

**Figure 7.**$Q-\varphi $ characteristics of the memristor implemented using Figure 4. The different frequencies (in arbitrary units) are shown in different colors.

**Figure 8.**Current signal (response) for different frequencies, as obtained from the simulation. The three different frequencies are shown in different colors and correspond to the ones shown in Figure 6.

**Figure 11.**Three least significant bits of the counter (${b}_{0}$ is the least significant bit) at a specific time.

**Figure 12.**Temporal graphs of the measured response (current signals) of the realized memristor at 3 different frequencies corresponding to the simulated frequencies for driving sine voltage of (

**a**) 100 Hz, (

**b**) 200 Hz, and (

**c**) 400 Hz.

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. |

© 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

de Benito, C.; Camps, O.; Al Chawa, M.M.; Stavrinides, S.G.; Picos, R.
A Switched Capacitor Memristor Emulator Using Stochastic Computing. *Technologies* **2022**, *10*, 39.
https://doi.org/10.3390/technologies10020039

**AMA Style**

de Benito C, Camps O, Al Chawa MM, Stavrinides SG, Picos R.
A Switched Capacitor Memristor Emulator Using Stochastic Computing. *Technologies*. 2022; 10(2):39.
https://doi.org/10.3390/technologies10020039

**Chicago/Turabian Style**

de Benito, Carola, Oscar Camps, Mohamad Moner Al Chawa, Stavros G. Stavrinides, and Rodrigo Picos.
2022. "A Switched Capacitor Memristor Emulator Using Stochastic Computing" *Technologies* 10, no. 2: 39.
https://doi.org/10.3390/technologies10020039