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Article

DoubleDeck: Decoupling Complex Control Logic of Network Protocols to Facilitate Efficient Hardware Implementation

by
Yi Yang
1,*,
Wenwen Fu
1,*,
Jinli Yan
1,
Lu Tang
2 and
Zhigang Sun
1
1
Computer College, National University of Defense Technology, Changsha 410073, China
2
HuNan Hua Xin Tong Networks, Changsha 410073, China
*
Authors to whom correspondence should be addressed.
Electronics 2020, 9(10), 1647; https://doi.org/10.3390/electronics9101647
Submission received: 28 August 2020 / Revised: 5 October 2020 / Accepted: 7 October 2020 / Published: 10 October 2020
(This article belongs to the Section Computer Science & Engineering)
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Abstract

A hierarchical method is often used to simplify the design of complex logic. However, when the hierarchical method is used to implement protocol control, there is no suitable decoupling method to divide the sophisticated protocol control into a series of small control logics. For this reason, this paper designs and implements the DoubleDeck model composed of a top state machine and a set of bottom state machines. The model divides the protocol control logic into protocol state conversion logic and processing logic based on hierarchical idea. Simultaneously, DoubleDeck also provides a bottom deck mapping mechanism (BDM) for all protocol control processing logic. Based on the BDM mechanism, developers can quickly implement the bottom state machine array. Next, we present the hardware design of DoubleDeck and prototype the time synchronization protocol on an FPGA array. The results show that DoubleDeck can be used as a design model to guide the implementation of complex protocol control logic. Compared with the finite state machine (FSM), DoubleDeck uses the BDM mechanism to implement three protocols can reduce the amount of code for developers by 30%.
Keywords: hardware-accelerated; hierarchical method; protocol control logic; bottom deck mapping mechanism hardware-accelerated; hierarchical method; protocol control logic; bottom deck mapping mechanism

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MDPI and ACS Style

Yang, Y.; Fu, W.; Yan, J.; Tang, L.; Sun, Z. DoubleDeck: Decoupling Complex Control Logic of Network Protocols to Facilitate Efficient Hardware Implementation. Electronics 2020, 9, 1647. https://doi.org/10.3390/electronics9101647

AMA Style

Yang Y, Fu W, Yan J, Tang L, Sun Z. DoubleDeck: Decoupling Complex Control Logic of Network Protocols to Facilitate Efficient Hardware Implementation. Electronics. 2020; 9(10):1647. https://doi.org/10.3390/electronics9101647

Chicago/Turabian Style

Yang, Yi, Wenwen Fu, Jinli Yan, Lu Tang, and Zhigang Sun. 2020. "DoubleDeck: Decoupling Complex Control Logic of Network Protocols to Facilitate Efficient Hardware Implementation" Electronics 9, no. 10: 1647. https://doi.org/10.3390/electronics9101647

APA Style

Yang, Y., Fu, W., Yan, J., Tang, L., & Sun, Z. (2020). DoubleDeck: Decoupling Complex Control Logic of Network Protocols to Facilitate Efficient Hardware Implementation. Electronics, 9(10), 1647. https://doi.org/10.3390/electronics9101647

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