Next Article in Journal
Two-Stage Energy Management of Multi-Smart Homes With Distributed Generation and Storage
Previous Article in Journal / Special Issue
Some Structures of Parallel VLSI-Oriented Processing Units for Implementation of Small Size Discrete Fractional Fourier Transforms
Article Menu

Export Article

Open AccessArticle

An Efficient Hardware Accelerator for the MUSIC Algorithm

School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China
Authors to whom correspondence should be addressed.
Electronics 2019, 8(5), 511;
Received: 6 April 2019 / Revised: 26 April 2019 / Accepted: 6 May 2019 / Published: 8 May 2019
(This article belongs to the Special Issue VLSI Architecture Design for Digital Signal Processing)
PDF [910 KB, uploaded 8 May 2019]


As a classical DOA (direction of arrival) estimation algorithm, the multiple signal classification (MUSIC) algorithm can estimate the direction of signal incidence. A major bottleneck in the application of this algorithm is the large computation amount, so accelerating the algorithm to meet the requirements of high real-time and high precision is the focus. In this paper, we design an efficient and reconfigurable accelerator to implement the MUSIC algorithm. Initially, we propose a hardware-friendly MUSIC algorithm without the eigenstructure decomposition of the covariance matrix, which is time consuming and accounts for about 60% of the whole computation. Furthermore, to reduce the computation of the covariance matrix, this paper utilizes the conjugate symmetry property of it and the way of iterative storage, which can also lessen memory access time. Finally, we adopt the stepwise search method to realize the spectral peak search, which can meet the requirements of 1° and 0.1° precision. The accelerator can operate at a maximum frequency of 1 GHz with a 4,765,475.4 μm2 area, and the power dissipation is 238.27 mW after the gate-level synthesis under the TSMC 40-nm CMOS technology with the Synopsys Design Compiler. Our implementation can accelerate the algorithm to meet the high real-time and high precision requirements in applications. Assuming that the case is an eight-element uniform linear array, a single signal source, and 128 snapshots, the computation times of the algorithm in our architecture are 2.8 μs and 22.7 μs for covariance matrix estimation and spectral peak search, respectively. View Full-Text
Keywords: hardware-friendly MUSIC algorithm; reconfigurable accelerator; covariance matrix; conjugate symmetry; spectral peak search; stepwise search method hardware-friendly MUSIC algorithm; reconfigurable accelerator; covariance matrix; conjugate symmetry; spectral peak search; stepwise search method

Figure 1

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).

Share & Cite This Article

MDPI and ACS Style

Chen, H.; Chen, K.; Cheng, K.; Chen, Q.; Fu, Y.; Li, L. An Efficient Hardware Accelerator for the MUSIC Algorithm. Electronics 2019, 8, 511.

Show more citation formats Show less citations formats

Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Related Articles

Article Metrics

Article Access Statistics



[Return to top]
Electronics EISSN 2079-9292 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top