Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis
Abstract
:1. Introduction
2. Theory
2.1. Overlapping and Windowing
2.2. Short-Time Fourier Transform
2.3. Inverse Discrete Fourier Transform
2.4. Perfect Reconstruction
2.5. Overlap-Add Synthesis
3. FPGA Implementation
3.1. Overlapping/Windowing
3.2. STFT/ISTFT
3.3. Overlap-Add Synthesis
4. Results and Discussion
4.1. Database
4.2. Evaluation Tests
4.3. Results and Discussion
5. Conclusions
Funding
Conflicts of Interest
References
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Architecture | CLB Logic | 4-Multiplier |
---|---|---|
Resource utilization | ||
Slices (15,850) | 3972 (25.1%) | 1563 (9.9%) |
Flip Flops (126,800) | 15,822 (12.5%) | 6504 (5.3%) |
LUTs (63,400) | 14,199 (22.4%) | 4775 (7.5%) |
Bonded IOBs (210) | 33 (15.7%) | 33 (15.0%) |
RAMB18E1s (270) | 6 (2.2%) | 6 (2.2%) |
DSP48E1s (240) | 1 (0.4%) | 25 (10.4%) |
Maximum Operating Frequency | 126.920 MHz | 133.905 MHz |
Cosine Mixture | Chirp | ECG | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Window | NMSE | CC | NMSE | CC | NMSE | CC | ||||||
Hanning | 68.31 | 0.999999 | 70.10 | 0.999999 | 50.07 | 0.999995 | ||||||
Triangular | 64.13 | 0.999999 | 66.55 | 0.999999 | 50.63 | 0.999995 | ||||||
Bratlett | 65.32 | 0.999999 | 67.15 | 0.999999 | 50.34 | 0.999995 | ||||||
Hamming | 64.84 | 0.999999 | 67.03 | 0.999999 | 51.01 | 0.999996 |
Cosine Mixture | Chirp | ECG | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Window | NMSE | CC | NMSE | CC | NMSE | CC | ||||||
Hanning | 68.25 | 0.999999 | 70.31 | 0.999999 | 50.04 | 0.999995 | ||||||
Triangular | 63.98 | 0.999999 | 66.54 | 0.999999 | 50.19 | 0.999995 | ||||||
Bratlett | 65.17 | 0.999999 | 67.19 | 0.999999 | 50.33 | 0.999995 | ||||||
Hamming | 64.82 | 0.999999 | 66.98 | 0.999999 | 50.88 | 0.999995 |
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Bahoura, M. Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis. Electronics 2019, 8, 1533. https://doi.org/10.3390/electronics8121533
Bahoura M. Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis. Electronics. 2019; 8(12):1533. https://doi.org/10.3390/electronics8121533
Chicago/Turabian StyleBahoura, Mohammed. 2019. "Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis" Electronics 8, no. 12: 1533. https://doi.org/10.3390/electronics8121533
APA StyleBahoura, M. (2019). Efficient FPGA-Based Architecture of the Overlap-Add Method for Short-Time Fourier Analysis/Synthesis. Electronics, 8(12), 1533. https://doi.org/10.3390/electronics8121533