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Electronics 2019, 8(11), 1314; https://doi.org/10.3390/electronics8111314

Article
A Unified Multimode Control of a DC–DC Interlinking Converter Integrated into a Hybrid Microgrid
1
Facultad de Ingeniería, Universidad de Ibagué, 730001 Ibagué, Colombia
2
Methods and Algorithms for Control, Université de Toulouse, INSA, LAAS-CNRS, 31013 Toulouse, France
3
Departament d’Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, 43007 Tarragona, Spain
*
Author to whom correspondence should be addressed.
Received: 3 October 2019 / Accepted: 29 October 2019 / Published: 8 November 2019

Abstract

:
DC–DC interlinking converters (ILCs) allow bidirectional energy exchange between DC buses of different voltage levels in microgrids. This paper introduces a multimode control approach of a half-bridge DC–DC converter interlinking an extra-low-voltage DC (ELVDC) bus of 48 VDC and a low-voltage DC (LVDC) bus of 240 VDC within a hybrid microgrid. By using the proposed control, the converter can transfer power between the buses when the other converters regulate them, or it can ensure the voltage regulation of one of the buses, this originating from its three operation modes. The proposed control scheme is very simple and provides a uniform system response despite the dependence of the converter dynamic on the operating point and the selected mode. Simulation and experimental results validated the theoretical development and demonstrated the usefulness of the proposed scheme.
Keywords:
hybrid microgrids; DC–DC bidirectional converter; interlinking DC–DC converter; bidirectional power flow

1. Introduction

Suitable interconnection of power sources, storage elements, and loads in autonomous power systems is today a fundamental motivation in the development of power electronic converters. The concept of the microgrid has emerged because it can provide a more reliable, scalable, and flexible way to integrate these elements, generating research efforts to optimize their performance and develop their maximal functionality. Hybrid microgrids are able to interconnect elements in both DC and AC, which is the more standard version of a microgrid because majority of the known electrical sources (renewable or not) and loads can be integrated into the same structure [1,2]. In the study of microgrids as a whole, two main challenges can be identified: (i) the development of efficient and reliable power architectures [3] and (ii) the development of stable and well-performing control architectures [4]. More accepted proposals to control microgrids are related to a hierarchical management of the system that distinguishes layers or levels, which allows for optimization of several indicators of the microgrid, such as efficiency, power quality, and lifetime [5,6]. To accomplish these control objectives, some of the conversion stages of the microgrid must regulate the voltage of the DC buses, and others must ensure the interchange of power at the AC side, regulating either current or voltage and frequency. As introduced in [7], for DC coupled hybrid microgrids, interlinking converters (ILCs) are devices with the ability to transfer power between DC buses, and interfacing converters (IFCs) allow interaction of the microgrid with the main AC generator, both of which can perform the voltage regulation function.
Most of the existing DC–DC bidirectional topologies can accomplish the requirements for ILCs. Isolated topologies, such as dual-active-bridge (DAB) or resonant converters, are reliable and can provide high converter ratios and increased efficiency at the expense of higher complexity in both implementation and control [8,9,10,11,12,13]. Multiport converters constitute the most sophisticated approach of this kind of circuit. They can interconnect more than two elements through a single control, but their main disadvantage is the increased number of power semiconductor devices [14,15]. Nonisolated topologies are preferred because they are less expensive, have a lower number of elements, and facilitate organization in modular and reconfigurable architectures [16,17,18,19,20]. The clear disadvantage is the absence of galvanic isolation between input and output ports. More recently, DC–DC multilevel converter topologies have gained more attention because they provide a solution for bidirectional power flow at high-voltage DC (HVDC) levels by means of the series connection of several modules [21]. However, the latter converters are not suitable for low voltages and low power. The half-bridge converter (or bidirectional buck–boost converter [21,22,23]) is the simplest topology with a minimal counterpart (two switches and one inductor), which preserves the same electrical reference for input and output ports (negative terminal). Furthermore, due to the way in which the two switches are connected, its implementation can be modularly scaled for different power levels by using packs of bridge legs [24] and only one integrated driver module [25]. This feature is relevant because microgrids are composed of multiple converters involving bridge legs. Compared with other converters, its drawbacks are the absence of isolation and the pulsating current at the higher voltage port.
The control of isolated converters with bidirectional power flow is often carried out by means of the phase shift approach, which also involves pulse duration and transformer turn ratio as additional parameters [26]. Although this control technique is simple and can be implemented in digital controllers, the complexity of the power section in comparison with nonisolated topologies is higher. On the other hand, until now, several control techniques have been applied for the control of the basic topologies of nonisolated DC–DC converters, the majority of them operating with a constant switching frequency obtained by means of pulse width modulation (PWM) [27,28,29]. Another group of controllers corresponds to techniques operating with a variable switching frequency, such as sliding mode control (SMC) and model predictive control (MPC). Hysteresis-based sliding mode controllers can differ depending on the state variables (currents or voltages or both) involved in the sliding surface [30,31,32,33,34]. This control is usually implemented analogically by means of comparators and operational amplifiers, which has several advantages with respect to a possible digital implementation. The particular case presented in [23] studied the use of a variable hysteresis width to force the operation of a conventional buck–boost converter in boundary conduction mode (BCM) in both current flow directions, which is only desirable for converters operating during short time intervals. One relevant issue related to the sliding mode control implemented using hysteresis comparators is the transition between the two power flow directions, which can be imperceptible if the control has a seamless property. Also, MPC has been used in the control of bidirectional DC–DC converters integrating photovoltaic (PV) generation, wind generation, and batteries into an HVDC distribution bus [35]. Although this kind of control has some advantages with respect to traditional proportional integral (PI) or proportional integral derivative (PID) controllers, the computational cost can limit its application compared with sliding mode control approaches.
Some additional properties have been explored in the control of bidirectional converters looking for flexibility, improved performance, and lifetime extension. In [36], for instance, a distributed power conversion architecture allows optimizing the management of a battery array by facilitating charge equalization using a multiloop control. What is relevant to highlight in this work is that the control complexity could be considerably reduced if the modules operated in a distributed way with multimode operation capability in each mode.
In this work, a bidirectional half-bridge DC–DC converter (BHBC) was used as an interlinking element between two DC buses of a microgrid to ensure the transfer of power between them. The proposed control is able to manage the BHCB in multiple modes, providing an integral functionality from their control. Three modes are differentiated: (i) buck mode regulating the lower voltage bus; (ii) boost mode regulating the higher voltage bus; and (iii) transferring power mode, in which the converter transmits power between the buses while other devices regulate their voltages. Then, the proposed control can force the regulation of one of the voltages of the buses or facilitate transferring power between buses when they are regulated by other converters. A complete modeling of the BHBC was performed by deriving linear models to facilitate the synthesis of the simplest controllers. For this study, one of the ports of the converter was considered as the source connection point, while the other one was seen as the load connection point. In order to describe the behavior of the buses, both constant current and constant voltage representations were considered depending on whether the buses were being regulated or not by another converter. This procedure differs from the conventional resistive load approach studied for both boost and boost converters. Another particular case developed in this work is the operation of the BHCB when both ports of the converter have regulated voltage because the only free variable of the converter is the inductor current, which can be regulated to provide energy transfer. Simple integrators are proposed as controllers to ensure both accuracy in the power transfer mode and robustness in the two voltage regulation modes unifying the dynamic response. This choice leads to a simple implementation of the resulting multimode control in a discrete time equation, this facilitating the use of low-cost microcontrollers.
The rest of the paper is organized as follows: A general description of the studied converter integrated into the microgrid is given in Section 2. Derivation of the model of the converter, development of the control proposal, and the stability analysis are explained in Section 3. Section 4 presents the validation of the models and evaluation of the control performance by means of simulation results, while Section 5 presents the validation of the entire behavior of the converter using experimental results. Finally, conclusions are presented in Section 6.

2. Interlinking DC–DC Converter in the Studied Microgrid Architecture

The microgrid architecture considered here is depicted in Figure 1, wherein two DC distribution buses can be observed: one extra-low-voltage DC (ELVDC) of 48 V and another low-voltage DC (LVDC) of 240 V [37]. The ELVDC bus integrates module-oriented photovoltaic and wind generation, energy storage, and loads, while the LVDC bus integrates string-oriented photovoltaic generation and loads and feeds a bidirectional DC–AC converter for grid-connected operation of the microgrid. The interlinking DC–DC converter (highlighted in gray in Figure 1), which is the focus of this paper, allows power transfer between both DC buses.
Figure 2 depicts the schematic diagram of the BHBC that is used as the interlinking converter in the microgrid. The left side of the converter is considered as port 1, its voltage denoted as v 1 and its capacitance as C 1 , while the right side is considered as port 2, its voltage denoted as v 2 and its capacitance as C 2 . Inductor L is connected at port 1, while the parasitic resistance of the circuit is represented in series with the inductor as R S . Depending of the operation scenario, three operation modes can be identified: (a) power transfer between buses (constant voltage loads), (b) buck mode regulating ELVDC bus voltage, and (c) boost mode regulating LVDC bus voltage.

3. BHCB Converter Modeling and Control

3.1. Regulation of the LVDC Bus (Boost Mode)

The operation of the converter in this mode implies (i) being supplied by the ELVDC bus (port 1) and (ii) regulating the LVDC bus (port 2), which has a power sink behavior. Figure 3 depicts the converter circuit operating in this mode, where the load is represented by the current source i 2 . Capacitance C 1 is not included in the circuit because it has no dynamic effect when the input port has a regulated voltage.
Assuming that the converter always operates in continuous conduction mode (CCM) and applying the state space averaging method [38] lead to the dynamic system (1) and equilibrium point coordinates (2):
{ L d i ˜ L d t = v ˜ 1 R S i ˜ L + V 2   d ˜ ( 1 D )   v ˜ 2 L i n e a r + v ˜ 2 d ˜ N o n l i n e a r C 2 d v ˜ 2 d t = [ i ˜ 2 + I L   d ˜ ( 1 D ) i ˜ L ]   L i n e a r i ˜ L d ˜ N o n l i n e a r
V 2 = V 1 I L R S 1 D I L = I 2 ( 1 D )
By applying the Laplace transform to the linear part of (1) and replacing the equilibrium terms (2), Equations (3) and (4) are obtained:
I L ( s ) = I x L C 2 D ( s ) + 1 L s V 1 ( s ) + ( 1 D ) L C 2 I 2 ( s ) s 2 + R S L s + ( 1 D ) 2 L C 2
V 2 ( s ) = V x L C 2 D ( s ) + ( 1 D ) L C 2 V 1 ( s ) ( L s + R S ) L C 2 I 2 ( s ) s 2 + R S L s + ( 1 D ) 2 L C 2
where I x = V 2 C 2 s + I L ( 1 D ) and V x = L I L s + V 1 . The latter two polynomials describe a dependence of the input and output converter variables (D, I L , and V 1 ). As it can be noted, the transfer function V 2 ( s ) / D ( s ) ( V 1 ( s ) = 0 and I 2 ( s ) = 0 ) shows a nonminimum phase nature. Although we have a linear model, the nonlinearity of the converter is implicitly present because some coefficients in the polynomials of the transfer functions I L ( s ) / D ( s ) and V 2 ( s ) / D ( s ) depend on the operation point. The control objective in this mode is to enforce v 2 = V 2 r e f . To accomplish this, the controller   C V 2 ( s ) = K i V 2 / s ( K i V 2 > 0 ) is selected for a single feedback loop structure. By considering that no changes are required in the voltage reference, the performance of the control is evaluated in terms of its capacity to reject disturbances in the load and the adequate transient response when these events take place. Because of the accentuated nonlinear behavior of the converter in this mode, the main desired feature is a uniform dynamic response, irrespective of the operation point. The corresponding block diagram of the closed loop is depicted in Figure 4, where G V 2 D ( s ) = V 2 ( s ) / D ( s ) and P V 2 I 2 ( s ) = V 2 ( s ) / I 2 ( s ) , where V 1 ( s ) = 0 .
The transfer function of the output voltage to load disturbance is given by
V 2 ( s ) I 2 ( s ) = P V 2 I 2 ( s ) 1 + G V 2 D ( s )   C V 2 ( s ) = 1 C 2 s 2 + R s L C 2 s s 3 + R s L s 2 + [ ( 1 D ) 2   K i V 2 L I L L C 2 ] s +   K i V 2 V 1 L C 2 .

3.2. Regulation of the ELVDC Bus (Buck Mode)

In this mode, the converter is fed by the LVDC bus (port 2) and has the function of regulating the ELVDC bus (port 1), which has a sink behavior. Figure 5 depicts the converter equivalent circuit for this mode, where load is represented by the current source i 1 . As in the mode described above, the capacitance at the input port ( C 2 in this case) is not included in the circuit.
By applying the same procedure used when modeling the first operation mode, the system of Equation (6) and the equilibrium values (7) are obtained:
{ L d i ˜ L d t = v ˜ 1 R S i ˜ L + V 2   d ˜ ( 1 D )   v ˜ 2 L i n e a r + v ˜ 2 d ˜ N o n l i n e a r C 1 d v ˜ 1 d t = ( i ˜ 1 + i ˜ L )   L i n e a r
V 1 = V 2 ( 1 D ) I 1 R S I L = I 1
By applying the Laplace transform and replacing the equilibrium terms (7), the linear component of Equation (6) is obtained and expressed by Equations (8) and (9):
I L ( s ) = V 2 s L D ( s ) ( 1 D ) s L V 2 ( s ) 1 L C 1 I 1 ( s ) s 2 + R S L s + 1 L C 1
V 1 ( s ) = V 2 L C 1 D ( s ) + ( 1 D ) L C 1 V 2 ( s ) ( L s + R S ) L C 1 I 1 ( s ) s 2 + R S L s + 1 L C 1 .
The control objective in this mode is to enforce v 1 = V 1 r e f . As it can be noted in Equation (9), the transfer function G V 1 D = V 1 ( s ) / D ( s ) has a negative sign, and then, unlike the boost mode, the proposed controller needs to have a negative sign. Then, the following integral controller is selected   C V 1 ( s ) = K i V 1 / s ( K i V 1 > 0 ). As in the boost mode, the performance of this control is measured in terms of load disturbance rejection. The closed-loop block diagram is depicted in Figure 6, where G V 1 D = V 1 ( s ) / D ( s ) , P V 1 I 1 = V 1 ( s ) / I 1 ( s ) , and V 2 ( s ) = 0 .
The transfer function of the output voltage to load disturbance is given by
V 1 ( s ) I 1 ( s ) = P V 1 I 1 ( s ) 1 + G V 1 D ( s )   C V 1 ( s ) = 1 C 1 s 2 + R s L C 1 s s 3 + R s L s 2 + 1 L C 1 s +   K i V 1 V 2 L C 1 .
Note how the transfer function (10) is not dependent on the operation point of the converter.

3.3. Bidirectional Power Transfer without Voltage Regulation

This mode consists of transferring power from one DC bus to the other when the other converters are regulating their voltages. In this mode, the sign of the current defines which bus works as a source and which one works as a sink. The configuration of the system operating in this mode is illustrated in Figure 7.
The system of Equation (11) and equilibrium points (12) are obtained:
L d i ˜ L d t = v ˜ 1 R S i ˜ L + V 2   d ˜ ( 1 D )   v ˜ 2 L i n e a r ( v ˜ 1 v ˜ 2 R S i ˜ L ) d ˜ N o n l i n e a r
V 1 = V 2 ( 1 D ) I 1 R S .
By applying the Laplace transform to Equation (11) and replacing the equilibrium terms (12), we obtain the transfer function (13):
I L ( s ) = V 2 L D ( s ) + 1 L V 1 ( s ) ( 1 D ) L V 2 ( s ) s + R S L .
In this mode, all parameters are independent of the operation point, and then the corresponding transfer function is intrinsically linear. The control consists of forcing I L = I r e f , which is accomplished by means of the controller C I L ( s ) =   K i I L / s ( K i I L > 0 ). The resulting closed-loop block diagram is depicted in Figure 8. The performance of this control mode is measured in terms of its capacity to track the current reference, which in turn is given by an outer controller in the same layer or by a superior decision layer within the hierarchical control of the microgrid.
The closed-loop transfer function of the inductor current-to-current reference is given by
I L ( s ) I L r e f ( s ) = G I L D ( s )   C I L ( s ) 1 + G I L D ( s )   C I L ( s ) =   K i I L V 2 L s 2 + R S L s +   K i I L V 2 L .
Note how the transfer function (14) is not dependent on the operation point of the converter.

3.4. Stability Analysis

As an interlinking element between two DC buses, the BHCH always operates with regulated voltages (48 and 240 V), and then differences between the possible equilibrium points are only dependent on the inductor current, or in other words, on the converted power. Then, dynamic stability of the system can be obtained from the conventional study of the closed loop obtained from linear models of the converter. The Routh–Hurwitz theorem test was applied to the characteristic polynomials in the denominators of Expressions (5), (10), and (14). The result of this analysis can be summarized in the inequalities 0 < K i V 2 < ( 1 D ) 2 R s / ( I L R s C 2 L 2 + V 1 L ) ,   0 < K i V 1 < R s / V 2 L , and K i I L > 0 , which can be inherently satisfied from the controller gain selection. Figure 9 depicts the root loci for the three studied modes regarding the position of the closed-loop poles and the limits of the integral gain to preserve stability in boost and buck modes. Note that the third root in boost and buck modes is not shown in the diagrams to allow a clearer visualization of the dominant root trajectory as a function of the integral gain. The parameters listed in Table 1 were used for simulations.

3.5. Unified Control Proposal

As mentioned before, the main contribution of this paper is the unified way in which the control works irrespective of the operating mode. Then, considering the use of integral controllers for the three operating modes, a change of mode only represents the change of the gain of the controller. Figure 10 shows a diagram depicting in detail the implementation of the proposed control. This diagram includes the gain of the sensors measuring current and voltages ( g i ,   g v 1 ,   and   g v 2 ) and also a representation of the digital realization of the mathematical computations. The whole control approach can be classified as a gain scheduling solution, but it can be also interpreted as a kind of switched control because of the way in which discrete events define the operation mode of the converter. Mode selection is provided by an external signal or combination of signals, which is summarized in Figure 9 with the variable m ( t ) and can be understood as follows: m = 0 in nonoperation mode, m = 1 in buck mode, m = 2 in boost mode, and m = 3 in power transfer mode. The voltage references are fixed to standard levels in the studied microgrid, and only the reference for the power transfer mode is considered as a signal defined outside of the microcontroller.

4. Simulation Results

4.1. Controller Design Procedure

From the linear expressions (5), (10), and (14) and the establishment of the closed-loop behavior of the system using integral controllers for the three operation modes, the values of the corresponding integral gains can be easily synthesized. In this work, the controllers were synthesized by means of the conventional pole placement method, establishing a settling time of 0.25 s in the three cases. It is worth mentioning that the response assessed in the voltage regulation modes corresponds to disturbance rejection. A simulation of the system depicted in Figure 2 was carried out in PSIM software. Several tests were applied to assess the dynamic performance of the closed loops and validate the accomplishment of the control objectives for each operation mode. The parameters used to compute the transfer functions and configure the simulated circuits are listed in Table 1.

4.2. Regulation of the LVDC Bus (Boost Mode)

The validation test applied in this mode consisted of forcing a first steady state of the converter regulating the LVDC bus voltage ( v 2 ) to 240 V with a current load ( i 2 ) of 83.33 mA. After that, starting at 2 s, and every 500 ms, the current load was changed, introducing positive steps of 125 mA and ending with a load of 833.3 mA. As can be seen in Figure 11, the proposed control rejected these load perturbations with voltage deviations below 2 V (0.8%) and showed a settling time of about 0.5 s to recover the steady state in all cases. As was established by design, the response was uniform despite the operation point in which the disturbance took place.

4.3. Regulation of the ELVDC Bus (Buck Mode)

In this mode, the validation was performed starting from a steady state in which the output voltage ( v 1 ) was regulated to 48 V feeding a constant current load ( i 1 ) of 416 mA. Like in the previous test, starting at 2 s, and every 500 ms, the current load was changed, introducing positive steps of 625 mA and ending with a load of 4.16 A. Note that the sign of the inductor current is negative due to the power flow in this operation mode. Figure 12 depicts the ability of the converter to reject load disturbances, showing both voltage deviations below 0.4% and a settling time of about 0.5 s to recover the steady state in all cases. Like in the boost mode, a response independent of the operation point was observed.

4.4. Bidirectional Power Transfer without Voltage Regulation

Figure 13 shows the simulated results obtained when assessing the control of the circuit transferring power between regulated buses. This test started with a positive current reference of 1 A, which corresponded to transferring 48 W from the ELVDC bus to the LVDC bus. Then, at 1.25 s, a positive change was introduced in the current reference, increasing its value to 3 A. Next, three consecutive and negative changes of 2 A were introduced every 250 ms, bringing the current to −3 A. A negative value in the current represents power flow from the LVDC bus to the ELVDC bus. At 2.25 and 2.5 s, positive steps of 2 A were introduced in the current reference, returning the converter to the initial condition (1 A). Like in the two previous modes, it is possible to observe that the response was independent of the operation point.

4.5. Seamless Changing between Modes

In the test presented in Figure 14, the voltage of the ELVDC bus was considered initially constant (48 V) and a current load was connected to the LVDC bus ( i 2 ) starting with a value of 83.33 mA. During the first interval (boost mode), this current increased in steps of 125 mA every 500 ms until reaching 833 mA at 6 s. As it can be observed, uniform deviations of less than 0.2% appeared in the LVDC bus voltage, although the operation point for each disturbance was different. The desired voltage of 240 V was recovered in less than 250 ms. Then, the system entered into the second interval (power transfer mode), in which both bus voltages were constant (48 and 240 V, respectively). At the start of this interval, the converter was forced to have an inductor current of −4.16 A transferring power from the LVDC bus to the ELVDC bus. Then, 500 ms later, the current reference of the converter changed, forcing an inductor current of −0.4 A. In this mode, the inductor current showed a first order behavior with a settling time of less than 250 ms. After 8 s, the system entered into the third interval (buck mode), in which the voltage of the LVDC bus was considered as constant (240 V), feeding a current load ( i 1 ) of 416.7 mA connected to the ELVDC bus. This current increased every 500 ms in steps of 0.625 A. The test finished at 10 s with a load current of 4.1667 A. Similar to the boost mode, uniform deviations of less than 0.25% appeared in the ELVDC bus voltage, although the operation point for each disturbance was different. The desired voltage of 48 V was recovered in less than 250 ms.
As observed in the results for voltage-regulated modes, the transient response to disturbances performed well by regarding slight voltage deviations and acceptable setting times. In addition, it is worth mentioning that operating in power transfer mode resulted in no overshoot in the transient response and an acceptable setting time. Then, by considering these results, it is possible to assert that the proposed control effectively showed good dynamic performance and allowed absorbing the high nonlinearity of the converter despite of the use of very simple linear controllers.

5. Experimental Results

A prototype of the proposed system was built to obtain the experimental results. The power module was implemented using the converter parameters listed in Table 1, as well as two R6020KNZ1 MOSFETs (Alpha & Omega Semiconductor, CA, USA) and two TLP351 opto-isolated drivers (Toshiba Corporation, Tokyo, Japan). The isolated side of the drivers was fed by two regulated sources obtained using two LM337 adjustable regulators and two WSU240-1000-13 AC adapters (TRIAD Magnetics, Perris, USA). The ELVDC and LVDC capacitors were of 82.000 μF/63 V and 3300 μF/350 V (Kemet, Florida, USA), respectively. For measurements, two LV-20P isolated closed-loop Hall-effect transducers (LEM International SA, Ginebra, Switzerland) were used to measure the ELVDC and LVDC bus voltages, and one LTS 6-NP isolated closed-loop Hall-effect transducer (LEM International SA, Ginebra, Switzerland) was adopted to measure the inductor current. The measured signal conditioning was performed using a simple stage of low-pass filtering implemented with operational amplifiers.
The proposed control was implemented into the dsPIC30F4011 digital device (Microchip, AZ, USA). The programmed algorithm configured the hardware resources to perform the simultaneous acquisition of measurement signals through four 10 bit analog-to-digital conversion channels (ADC). One dual channel of the PWM module was operated using a switching frequency of 25.01 kHz, a dead time of 520 ns, and an equivalent resolution of 2320 integer levels (see [39]). The selection of the operation mode of the converter, which is denoted as m ( t ) in Figure 9, was made by means of one locking security toggle switch providing the voltage for two digital inputs of the device (00 for m = 0, 01 for m = 1, 10 for m = 2, and 11 for m = 3). Implementation of the control scheme was very simple and required only one difference equation, which was obtained from the Z transform of the integrator transfer function using the zero-order-hold (ZOH) approach (see Expression (15)). The integral gains shown in Table 2 were obtained using a value of 0.2 ms as the sampling period and separately considering the gains of the sensors g i , g v 1 , and g v 2 :
d ( k ) = k i e ( k 1 ) + d ( k 1 ) .
The laboratory setup, which is depicted in Figure 15, was composed of the programmable equipment listed in Table 3. Two thermomagnetic breakers were included for each bus to protect the power circuits and to facilitate evaluation of multimode operation.
Figure 16 shows a schematic diagram of the experimental configuration. Both programmable loads were configured to operate as current sources. Circuit breakers CB1 and CB3 allowed for connecting or disconnecting the voltage sources to their corresponding buses in order to test the voltage regulation modes. Circuit breakers CB2 and CB4 allowed for connection of the loads, but they were permanently closed during the test. To test the buck mode, the circuit breaker CB1 was turned off, while the others remained closed. To test the boost mode, the circuit breaker CB3 was turned off, while the others remained closed. To test the power transfer mode, all the breakers were closed. In the experiments, the change between modes was performed manually.

5.1. Regulation of the LVDC Bus (Boost Mode)

5.1.1. Load Regulation Test

In this test, sudden increasing and decreasing changes were applied to the load current I 2 . The experiment started from an initial value of 50% in the nominal output power connected to the LVDC bus, which corresponded to 0.5 A. After 2 s, a decreasing step was introduced, leading the load to 20% of the nominal output power. Six seconds later, an increasing change of 20%–80% of the nominal power was introduced (i.e., from 0.2 to 0.8 A), the latter being a large-signal sudden change. It can be corroborated that the bus remained regulated and the control was robust to load disturbances. As shown in Figure 17, the system recovered the regulation of the bus around 0.5 s after the disturbance penetration, showing voltage deviations lower than 5% of the nominal LVDC voltage.

5.1.2. Line Regulation Test

In this test, sudden changes were applied to the input voltage source representing the regulated ELVDC bus. The voltage started from its nominal value of 48 VDC, and 3 s later, its value decreased to 38 VDC. Three seconds later, the voltage of the source changed to 57 VDC. As shown in Figure 18, the system was able to reject input voltage disturbances rapidly, even when deviations were greater than ±20% of the nominal value. After the emergence of a disturbance, the LVDC bus took approximately 650 ms to recover its regulated voltage, showing maximum deviations of 5% of the nominal LVDC voltage.

5.2. Regulation of the ELVDC Bus (Buck Mode)

5.2.1. Load Regulation Test

The experiment started from an initial current load I 1 of 1 A, and 2 s later, a decreasing step was introduced, leading the current to 0.5 A. Three seconds later, an increasing change from 0.5 to 2 A was introduced in the load. As shown in Figure 19, the system recovered the regulation of the bus 0.2 s after the penetration of the disturbances, showing voltage deviations lower than 5% of the nominal ELVDC voltage.

5.2.2. Line Regulation Test

As shown in Figure 20, two sudden changes were applied to the voltage source representing the regulated LVDC bus. The voltage started from its nominal value of 240 VDC, and 2.6 s later, its value decreased to 216 VDC. The ELVDC voltage showed a deviation lower than 5% of its nominal value, recovering the steady state in approximately 250 ms. Five seconds later, the voltage of the power source changed to 264 VDC. For this large-signal disturbance, the system showed a voltage deviation of about 10% of the nominal value, recovering the steady state after approximately 0.8 s.

5.3. Bidirectional Power Transfer without Voltage Regulation

In this test, the power sources were permanently connected to the converter. To verify the correct operation of this mode, the current reference was suddenly changed to produce a transient response into the closed loop. As shown in Figure 21, the current started at point A with a value of −1.5 A, which corresponded to transferring 75 W from the LVDC bus to the ELVDC bus. After that, every 2 s, the current reference changed in steps of 1.5 A, twice adding 1.5 A and twice subtracting 1.5 A, then returning to the starting point (points B–E). The transient response showed the expected first-order behavior, with settling times of approximately 400 ms.

5.4. Seamless Changing between Modes

To validate the correct operation of the system during changes between modes, two experiments were designed. In both experiments, scenarios in which the system started operating in power transfer mode were considered, and one event forcing the system to operate in one of the voltage regulation modes was taken into account. After several seconds, another event forced the system to return to the power transfer mode.

5.4.1. Transition between Power Transfer and Boost Modes

The experiments started with the system operating in power transfer mode, which indicated that other converters regulated the voltage of the DC buses. For the MIREDHI microgrid described in Section 1, the interfacing converter connected to the grid regulates the LVDC bus and the energy storage units regulate the ELVDC bus voltage. This operation is typical for grid-connected operation of the microgrid at night. A change to the boost mode can appear because of a temporal absence of the grid. As shown in Figure 22, the system started transferring a power of approximately 50 W to the LVDC bus and changed to boost mode after 3 s, forcing the converter to regulate the LVDC bus voltage feeding a load with the nominal power of the converter (250 W). The transient behavior was almost imperceptible, showing the robustness of the control structure in this transition. The system remained operating in this mode for 4 s and then returned to the power transfer mode. The transient behavior in this change was less accentuated, which demonstrates the robustness of the control structure in this transition.

5.4.2. Transition between Power Transfer Mode and Buck Mode

As mentioned in the previous subsection, the system operating in power transfer mode indicates that other converters regulate the voltage of the DC buses. A change to the buck mode in the microgrid can also appear at night if the batteries are charging using a constant current regime, limiting the ability to regulate the energy storage system. Like the scenario presented before, the system started transferring approximately 50 W to the ELVDC bus. As shown in Figure 23, after 2.75 s, the system changed to buck mode, assuming completely the load connected to the ELVDC bus (240 W). Four seconds later, the system changed to operating in power transfer mode, contributing the same difference of 50 W. In this experiment, the maximum voltage deviation during transfer was lower than 10%. However, it is worth mentioning that when returning to the power transfer mode, the deviation was considerably lower (around 2%). In addition, in both transitions, the system recovered steady state after 200 ms.

6. Conclusions

An advantageous control scheme has been proposed to integrate the BHBC as an interlinking element into a hybrid microgrid. After a detailed study of the system model, a unified compensator was synthesized that allowed robust system performance when operating in its three operation modes (i.e., a power transfer mode and two bus voltage regulation modes) by only commuting an integral gain. As demonstrated by the simulation and experimental results, the proposed control provides a robust dynamic response regardless of the operation point and the possible transferences between modes.
The main contribution of this work is that the proposed multimode scheme makes the BHCB converter functional and versatile, allowing its use as an ILC in a hybrid microgrid with the minimal structure of a zero-error controller. This aspect is very important because the control can be implemented by a simple, low-cost microcontroller, such as the one used here in the experimental work, and the digital device can also be used to perform other functions, such as communication with superior layers in the hierarchical control of a microgrid.

Author Contributions

Conceptualization, O.L.-S., G.G., and L.M.-S.; Formal analysis, O.L.-S., Y.A.A.-R., G.G., and L.M.-S.; Funding acquisition, O.L.-S., Investigation, O.L.-S., Y.A.A.-R., G.G., and L.M.-S.; Methodology, O.L.-S., G.G., and L.M.-S.; Project administration, O.L.-S.; Validation, O.L.-S. and Y.A.A.-R.; Writing—Original Draft, O.L.-S.; Writing—Review and Editing, O.L.-S., G.G., and L.M.-S.

Funding

This research has been developed with the partial support of Colciencias under contract no. 018-2016 and the Spanish Agencia Estatal de Investigación under grants DPI2015-67292-R (AEI/FEDER, UE) and DPI2016-80491-R (AEI/FEDER, UE).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Hybrid microgrid architecture including extra-low-voltage DC (ELVDC) and low-voltage DC (LVDC) buses interconnected through a DC–DC bidirectional converter (MIREDHI Lab Project).
Figure 1. Hybrid microgrid architecture including extra-low-voltage DC (ELVDC) and low-voltage DC (LVDC) buses interconnected through a DC–DC bidirectional converter (MIREDHI Lab Project).
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Figure 2. Complete circuit model of the half-bridge converter as the interlinking device between microgrid DC buses.
Figure 2. Complete circuit model of the half-bridge converter as the interlinking device between microgrid DC buses.
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Figure 3. Circuit diagram of the bidirectional half-bridge DC–DC converter (BHBC) operating in boost mode.
Figure 3. Circuit diagram of the bidirectional half-bridge DC–DC converter (BHBC) operating in boost mode.
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Figure 4. Block diagram of the voltage regulation loop of the converter operating in boost mode.
Figure 4. Block diagram of the voltage regulation loop of the converter operating in boost mode.
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Figure 5. Circuit diagram of the BHBC operating in buck mode.
Figure 5. Circuit diagram of the BHBC operating in buck mode.
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Figure 6. Circuit diagram of the BHBC operating in buck mode.
Figure 6. Circuit diagram of the BHBC operating in buck mode.
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Figure 7. Circuit diagram of the BHBC operating without voltage regulation.
Figure 7. Circuit diagram of the BHBC operating without voltage regulation.
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Figure 8. Block diagram of the voltage regulation loop operating in power transfer mode.
Figure 8. Block diagram of the voltage regulation loop operating in power transfer mode.
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Figure 9. Root loci for interlinking converter (ILC) operation modes: (a) boost mode, (b) buck mode, and (c) power transfer mode.
Figure 9. Root loci for interlinking converter (ILC) operation modes: (a) boost mode, (b) buck mode, and (c) power transfer mode.
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Figure 10. Block diagram of the unified multimode control for the BHCB.
Figure 10. Block diagram of the unified multimode control for the BHCB.
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Figure 11. Simulated waveforms during validation test of the boost mode.
Figure 11. Simulated waveforms during validation test of the boost mode.
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Figure 12. Simulated waveforms during validation test of the buck mode.
Figure 12. Simulated waveforms during validation test of the buck mode.
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Figure 13. Simulated waveforms during validation test of the power transfer mode.
Figure 13. Simulated waveforms during validation test of the power transfer mode.
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Figure 14. Test validating complete operation of the unified multimode control, including changes between modes: boost mode (2–6 s) → power transfer mode (6–8 s) → buck mode (8–11 s).
Figure 14. Test validating complete operation of the unified multimode control, including changes between modes: boost mode (2–6 s) → power transfer mode (6–8 s) → buck mode (8–11 s).
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Figure 15. Prototype and experimental setup used for obtaining experimental results.
Figure 15. Prototype and experimental setup used for obtaining experimental results.
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Figure 16. Schematic electrical diagram of the configured laboratory experiment.
Figure 16. Schematic electrical diagram of the configured laboratory experiment.
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Figure 17. Experimental waveforms during validation of load disturbance regulation in boost mode.
Figure 17. Experimental waveforms during validation of load disturbance regulation in boost mode.
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Figure 18. Experimental waveforms during validation of line regulation in boost mode.
Figure 18. Experimental waveforms during validation of line regulation in boost mode.
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Figure 19. Experimental waveforms during validation of load disturbance regulation in buck mode.
Figure 19. Experimental waveforms during validation of load disturbance regulation in buck mode.
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Figure 20. Experimental waveforms during validation of line regulation in buck mode.
Figure 20. Experimental waveforms during validation of line regulation in buck mode.
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Figure 21. Experimental waveforms of IL reference changes.
Figure 21. Experimental waveforms of IL reference changes.
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Figure 22. Experimental waveforms to transition between power transfer and boost modes.
Figure 22. Experimental waveforms to transition between power transfer and boost modes.
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Figure 23. Experimental waveforms to transition between power transfer and buck modes.
Figure 23. Experimental waveforms to transition between power transfer and buck modes.
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Table 1. Parameters of the system.
Table 1. Parameters of the system.
General Operation Specifications
ParameterConventionValueUnits
Nominal power P n o m 240W
ELVDC bus voltage V 1 r e f 240V
LVDC bus voltage V 2 r e f 48V
ELVDC load current I 1 n o m 5A
LVDC load current I 2 n o m 1A
Converter Parameters
ParameterConventionValueUnits
LVDC bus capacitance C 2 3300µF
ELVDC bus capacitance C 1 82,000µF
Inductor L 660µH
Inductor series resistance R S 0.3
Switching frequency f S 25kHz
Controller Parameters
Integral gainConventionValue
Boost mode K i V 2 0.010
Buck mode K i V 1 0.053
Power transfer mode K i I L 0.023
Table 2. Parameters for digital implementation of the proposed control.
Table 2. Parameters for digital implementation of the proposed control.
Parameters of the Digital Controller
GainConventionValue
Sample time T s 0.2 ms
Controller gain buck mode k i d m o d e   1 12.5 × 10−6
Controller gain boost mode k i d m o d e   2 2.15 × 10−6
Controller gain power transfer mode k i d m o d e   3 6.50 × 10−6
Inductor current sensor gain g i 0.1048
ELVDC bus voltage sensor gain g v 1 0.0713
LVDC bus voltage sensor gain g v 2 0.0112
Table 3. Equipment used in the experimental setup.
Table 3. Equipment used in the experimental setup.
QuantityEquipmentModelManufacturerCapacity
1Programmable DC sourceXLN6024BK Precision60 V/1.44 kW
1Programmable DC sourcePVS60085BK Precision600 V/5 kW
2Programmable DC loadIT8512B+ITECH600 V/300 W
1OscilloscopeMSO2014BTektronix50 MHz
1Current probeTCP0020Tektronix20 A/50 MHz
1Power source for control circuitsGPC-3030D30 V/3 A

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