Next Article in Journal
A Controlled-Environment Quality Assessment of Android GNSS Raw Measurements
Next Article in Special Issue
Model-Based Latency Compensation for Network Controlled Modular Multilevel Converters
Previous Article in Journal
Resonant Converter with Voltage-Doubler Rectifier or Full-Bridge Rectifier for Wide-Output Voltage and High-Power Applications
Previous Article in Special Issue
Soft Switching DC Converter for Medium Voltage Applications
Article Menu
Issue 1 (January) cover image

Export Article

Open AccessArticle
Electronics 2019, 8(1), 4; https://doi.org/10.3390/electronics8010004

AC Mains Synchronization Loop for Precalculated- Based PFC Converters Using the Output Voltage Measure

HCTLab Research Group, Universidad Autonoma de Madrid, 28049 Madrid, Spain
*
Author to whom correspondence should be addressed.
Received: 13 November 2018 / Revised: 12 December 2018 / Accepted: 18 December 2018 / Published: 21 December 2018
(This article belongs to the Special Issue Advanced Power Conversion Technologies)
Full-Text   |   PDF [2937 KB, uploaded 21 December 2018]   |  

Abstract

Common implementations of power factor correction include sensors for the input and output voltages and the input current. Many alternatives have been considered to reduce the number of sensors, especially the current sensor. One strategy is to precalculate the duty cycles that must be applied to every ac main, so the system only needs to synchronize them with the input voltage, and include a simple output voltage loop. The main problem with this approach is the sensibility to any synchronization error, because the input current is not measured, so its evolution is not continuously corrected. This paper shows how the synchronization error alters the current and the power factor, and it proposes several methods to detect and correct this error. All methods use the output voltage ADC, which is already used to control the output voltage, so the cost of the system is not increased. This technique can also be applied to any current sensorless PFC converter, because they are usually affected by leading or lagging currents, so the synchronization can be modified to reduce these effects. Results show that the implementation of this synchronization loop keeps a high-power factor under a wide synchronization error range, while the added logic is not significant. View Full-Text
Keywords: digital control; power factor; field programmable gate arrays; AC-DC power conversion digital control; power factor; field programmable gate arrays; AC-DC power conversion
Figures

Figure 1

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
SciFeed

Share & Cite This Article

MDPI and ACS Style

Sanchez, A.; Yushkova, M.; De Castro, A.; Martínez-García, M.S.; Garrido, J. AC Mains Synchronization Loop for Precalculated- Based PFC Converters Using the Output Voltage Measure. Electronics 2019, 8, 4.

Show more citation formats Show less citations formats

Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Related Articles

Article Metrics

Article Access Statistics

1

Comments

[Return to top]
Electronics EISSN 2079-9292 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top