A Hybrid Current Mode Controller with Fast Response Characteristics for Super Capacitor Applications

Abstract

A wide-bandwidth current-controller is required for the fast charging and discharging of applications containing super capacitors. To accomplish this, peak current mode is generally used due to the speed of its response characteristics. On the other hand, peak current mode control must be provided with a slope compensation function to restrain sub-harmonic oscillations. However, if the controlled output voltage is varied, the slope must be changed accordingly. Nonetheless, it is not easy to change the slope for every change in output voltage. Another solution involves the slope being set at the maximum value, which results in a slow response. Therefore, in this paper, a hybrid mode controller was proposed that uses a peak current and a newly-specified valley current. Using the proposed hybrid mode control, sub-harmonic oscillation did not occur for duty cycles larger than 0.5 and response times were fast.

1. Introduction

Recently, research and development in the field of renewable energy application is becoming increasingly active due to the increase in environmental pollution and the exhaustion of fossil fuels. In response to social trends, there is a growing interest in environmentally-friendly electric vehicles and hybrid vehicles for the rail or the automotive industries. In particular, various research projects have been carried out to investigate regenerative braking, which stores wasted energy by converting kinetic energy into electric energy when the vehicle decelerates [1,2,3,4]. As research into regenerative braking becomes more active, the importance of fast storage of electric energy is increasing. Due to long charging and discharging cycles and a long lifetime, super capacitors are being increasingly used instead of batteries in many applications [5,6,7]. For energy storage system applications that use super capacitors, a voltage controller with quick response characteristics is required for fast charging of the super capacitor. It is desirable to use a combination of a peak current mode controller, an inner loop current controller, and an outer loop voltage controller to achieve fast response characteristics. However, use of the peak current mode control method causes a sub-harmonic oscillation problem to occur when the duty is 0.5 or more [8,9,10,11,12].

To prevent this sub-harmonic oscillation, the slope compensation method has been proposed along with the use of a triangular wave [13,14,15,16]. It should be noted that since the range of the slope compensation depends on the input and output voltages, the compensation slope should be changed according to these input or output voltage conditions. However, since the charging voltage of a super capacitor changes suddenly, it is not easy to change the compensation slope with the actual output voltage.

Therefore, it is common to maintain the maximum compensation slope to prevent sub-harmonic oscillation for all input and output voltage conditions. However, this leads to another problem, since as the compensation slope becomes larger, the response time of the current controller decreases [17,18]. Another method has been proposed to solve this sub-harmonic oscillation problem: the current control method using peak and valley currents [19]. Figure 1 shows the proposed current control method [19] using maximum and minimum currents. This method makes use of two upper and lower triangular waves. This method compares the peak current to the upper triangular wave and the valley current to the lower triangular wave to control current. Since the slope of the upper and lower waveforms is influenced by the input and output voltages, the compensation slope changes from time to time in hardware depending on the input and output voltage conditions. In this paper, a novel hybrid current mode controller is proposed that does not make use of slope compensation and which possesses fast response characteristics. The proposed controller makes use of the minimum current determined to maintain the maximum current and constant PWM (Pulse-Width-Modulation) frequency instead of using the slope compensation method. In Section 2, the slope compensation values are analyzed in terms of eliminating sub-harmonic oscillations and the problems associated with using the slope compensation method are discussed. In Section 3, a hybrid current mode control scheme is proposed. In Section 4 and Section 5, the proposed hybrid controller is analyzed and evaluated using Powersim (PSIM) simulations and experimental evaluation.

2. Slope Compensating Method for the Elimination of Sub-Harmonic Oscillation

2.1. Slope Value Selection Method for Slope Compensation

Figure 2 shows the operating principle of a typical peak current mode controller. In Figure 2, the PWM output signal Q is generated via an RS (Reset Set) flip-flop. The clock pulse input to the set terminal of the RS flip-flop turns the transistor on through the output signal Q every fixed period. The transistor is turned off by the reset signal when the input current and the maximum current command signal become equal. The converter current increases when the transistor is on and decreases when the transistor is off. When the duty cycle is small, the converter current increases during the on state; the current decreases sufficiently during the off state. On the contrary, when the duty cycle is large, the clock pulse—which is a set signal—turns the transistor on at regular intervals and the current does not decrease sufficiently. If the current cannot be completely reduced at every cycle, the perturbation magnitude of the converter current becomes large, resulting in sub-harmonic oscillation. Figure 3 shows the slope compensation method used to solve the sub-harmonic oscillation problem. The slope compensation method is a method of subtracting the triangular wave from the maximum current command and comparing it with the input current. Using this method, the current perturbation magnitude of the present PWM period becomes smaller than the previous PWM period, thereby eliminating the sub-harmonic oscillation. To eliminate the sub-harmonic oscillation, the current fluctuation coefficient due to the current perturbation should be less than 1.

In Figure 3, $m_1$ is the slope at which the current rises, $m_2$ is the slope at which the current falls, $m_a$ is the slope of the triangular wave, $I_p$ is the maximum current command, $∆I_n$ is the magnitude of the current perturbation at the nth period, DT is the rise time of the ideal current, and dT represents the rise time of the sub-harmonic oscillation perturbation current.

Figure 4 shows a triangular waveform comparing the ideal current and the slope compensation in the rising current period shown in Figure 3. Equation (1) represents the sum of m₁ obtained from the ideal current and m_a obtained from the slope. Figure 5 shows a triangular waveform comparing the slope compensation and the current generated by the sub-harmonic oscillation in the rising current period shown in Figure 3. Equation (2) represents the sum of m₁ obtained from the sub-harmonic oscillation current and ma obtained from the slope:

$$m_1+m_a=\frac{I_p}{DT}$$

(1)

$$m_1+m_a=\frac{I_p-∆I_o}{dT}$$

(2)

Therefore, if the Equations (1) and (2) are summarized, the relationship between $m_1$ and $m_a$ in the rising current period is expressed by Equation (3):

$$m_1+m_a=\frac{∆I_o}{T(D-d)}$$

(3)

Figure 6 shows a triangular waveform comparing the ideal current and slope compensation in the falling current period shown in Figure 3. Equation (4) represents the value obtained by subtracting m₂ obtained from the ideal current and m_a obtained from the slope. Figure 7 shows a triangular waveform comparing the slope compensation and the current generated by the sub-harmonic oscillation in the falling current period shown in Figure 3. Equation (5) represents the value obtained by subtracting m₂ obtained from the sub-harmonic oscillation current and m_a obtained from the slope.

$$m_a-m_2=\frac{-I_p+I\left(T\right)}{D^{\prime }T}$$

(4)

$$m_a-m_2=\frac{-I_p+I\left(T\right)-∆I_1}{d^{\prime }T}$$

(5)

Therefore, if Equations (4) and (5) are summarized, the relationship between $m_2$ and $m_a$ in the falling current period is expressed by Equation (6):

$$m_a-m_2=\frac{-∆I_1}{T(D-d)}$$

(6)

Equation (7) summarizes Equation (3)—which is the relationship between slope $m_1$ and slope $m_a$—and Equation6—which is the relationship between slope $m_2$ and slope $m_a$. If the slope compensation value satisfies Equation (7), the magnitude of the current perturbation becomes smaller than 1, and thus, the sub-harmonic oscillation phenomenon is eliminated.

$$∆I_1=\frac{-m_a+m_2}{m_1+m_a}∆I_0\to \frac{-m_a+m_2}{m_1+m_a}\langle 1\to m_a\rangle \frac{m_2-m_1}{2}$$

(7)

2.2. Problems with the Slope Compensation Method

Equation (8) shows the rising and falling slope of the inductor current in the boost converter; where $m_1$ is the slope of the rising inductor current, $m_2$ is the slope of the falling inductor current, $V_g$ is the input voltage, $V_o$ is the output voltage, and $L$ is the value of the boost converter inductor.

Substituting Equation (8) into Equation (7) leads to Equation (9). It can be seen that when the output voltage is changed in Equation (9), the slope must also change at the same time. However, it is not always easy to change the slope in accordance with the actual output voltage value in systems that experience sudden voltage changes, such as in super capacitor systems. Figure 8 and Figure 9 show the inductor current waveforms when the input and output voltages are changed using a fixed slope compensation method:

$$m_1=\frac{V_g}{L},m_2=\frac{V_o-V_g}{L}$$

(8)

$$m_a>\frac{V_o-V_g}{2L}$$

(9)

Section A of the graph in Figure 8 shows the inductor current waveform before the input/output voltage is changed and Section B shows the inductor current waveform after the input/output voltage is changed. Fixed slope compensation for constant input and output voltage conditions is obtained by applying Equation (9). If the input and output voltages are changed, the slope is out of range and compensation cannot be properly performed. In order to solve this problem, the slope compensation is generally set to the maximum value at which no sub-harmonic oscillation occurs. Figure 10 shows the effect on the output duty cycle when normal and maximum slope compensations are used. Since the maximum slope is higher than the normal slope, it meets the slope compensation value first and forms a small duty cycle, thus, the average current command from the voltage controller must be high to achieve the same duty cycle. Here, the current value is compensated much more than for the original value, and the current controller experiences a response delay.

3. Designing a Controller with a Fast Response Time

3.1. Features of Valley Current Mode Control

Typically, current mode control methods include: average current mode control, peak current mode control, and valley current mode control [20,21,22]. Figure 11 shows a block diagram of valley current mode control. In contrast to peak current mode control, valley current mode control turns the transistor off at regular intervals in the clock pulse, which is the reset signal. In addition, when the inductor current and the minimum current command signal become equal, a set signal is generated, and the transistor is turned on. However, in the case of the valley current mode control method, in contrast to peak current mode control, sub-harmonic oscillation occurs when the duty cycle is less than 0.5 [23]. Figure 12 shows the current waveform of the valley current mode control formed according to the operation shown in Figure 11. As shown in the figure, when the duty cycle is above 0.5, the magnitude of the current perturbation becomes small and sub-harmonic oscillation does not occur.

3.2. The Proposed Hybrid Current Mode Control

In this paper, a new hybrid current mode controller is proposed, using both maximum and minimum currents. The proposed hybrid current controller is similar to the hysteretic current mode controller. Previous hysteresis current-mode control methods make use of a fixed band-gap [24,25,26,27]. In this case, the frequency will fluctuate when the input voltage and the output voltage change, which can be due to the thermal stress of the power device and can cause the efficiency of the controller to decrease for certain input and output voltage conditions. On the other hand, the hybrid current mode control proposed in this paper changes the current band gap organically to fix the switching frequency even if the input and output voltages change.

In order to operate at a constant frequency irrespective of the input/output voltage conditions, the relationship between the input/output voltage condition and the current band gap should be known. Figure 13 shows the steady-state inductor current waveform. In Figure 13, m₁ represents the rising slope of the inductor current, and DT represents the time at which the inductor current rises. The current band gap $(∆I_L)$ is given by Equation (10), where f is the PWM frequency. In Equation (10), the current band gap ($∆I_L)$ is the product of the rising current slope and the rising time.

Therefore, the current band gap is changed by the rising current slope as shown in Equation (10), which is the input/output voltage and frequency function. The newly obtained maximum current command is then obtained as shown in Equation (11), and the minimum current command is calculated as shown in Equation (12), by subtracting the current bandgap from the maximum current command:

$$∆I_L=m_1\times DT=\frac{V_g\times DT}{L}=\frac{V_g\times \left(V_o-V_g\right)}{L\times V_g\times f}$$

(10)

$$I_{Lpeak\_ref}=I_{LAvg\_ref}+\frac{∆I_L}{2}$$

(11)

$$I_{Lvalley\_ref}=I_{Lpeak\_ref}-∆I_L$$

(12)

Here, $I_{LAvg\_ref}$ is an average current command signal derived from the voltage controller. Figure 14 shows a proposed hybrid current mode control block diagram derived using the newly obtained minimum current.

It can be seen that the inductor current is compared to the maximum and minimum current command signals. The difference between the previous method shown in Figure 1 and the proposed method shown in Figure 14 can be described as follows: in a previous paper [19], two slopes were used at the top and bottom to eliminate sub-harmonic oscillation. Since the slope of the top and bottom is affected by the input and output voltages, the slope must also be modified and changed by the changing input and output voltages. However, it is difficult to periodically change the slope initially set in hardware. In the proposed controller, the slope is used to select the band-gap in software as shown in Equation (10). Therefore, the slope of the proposed controller has the advantage of changing and adapting itself to fix the frequency when the input and output voltages are changed. Figure 15 shows the control waveform of the proposed controller when the output voltage fluctuates. When the input/output voltages are changed, the current band-gap is also changed at the same time, hence, fixing the frequency without changing.

4. Simulation

A simulation analysis was conducted to compare peak current mode control using conventional slope compensation and using the proposed hybrid current mode control.

Table 1. System parameters.

Parameter	Value
Input Voltage	10 (V)
Output Voltage	50 (V)
Inductor	500 (uH)
capacitor	440 (uF)
Max slope	80 k
Switch frequency	20 (kHz)

shows the parameters of the boost converter for simulated analysis. The input voltage is 10 V, the maximum output voltage is 50 V, the switching frequency is 20 kHz, and the maximum slope is set to 80 k. The simulation was performed using the PSIM Tool and a boost converter was constructed as shown in Figure 16. In addition, the peak current mode controller-set to use the maximum slope-and the proposed hybrid current mode controller were compared and analyzed using two different controllers.

Figure 17 shows the output voltage waveforms of the peak current mode control, including the maximum slope compensation method and the proposed hybrid current mode control. When the maximum slope was used, a time-delay problem was introduced, because the compensation was greater than the original compensation value. On the other hand, the proposed hybrid current mode controller had a faster response time. Thus, the voltage control had a quick response characteristic.

Figure 18 and Figure 19 show the inductor current waveform when the output voltage is lowered and raised, respectively, using the proposed hybrid current mode control. Section A is the inductor current waveform before the output voltage changes from high to low and Section B shows the inductor current waveform after the output voltage changes from high to low. It can also be confirmed that the current bandwidth changes with changing input/output voltage. Existing conventional hysteresis current mode control makes use of a fixed band gap, which causes the frequency to fluctuate when the output voltage is changed. However, since the proposed hybrid current mode control changes the current bandwidth at the same time that the output voltage changes, it can be seen that the controller operates stably without changing frequency.

5. Experimental Results

Figure 20 shows the experimental setup for a single-phase boost converter to verify the proposed hybrid current mode control. The experimental equipment consisted of a DC power board and a controller board. The experiment proceeded using the same parameters as the simulation analysis. To control the MCU, theTMS320F28377D microcontroller from Texas Instruments (Dallas, TX, USA) was used for digital control. Figure 21 shows a digital controller implementation of the hybrid current mode control. The proposed hybrid current mode digital controller functions as follows: when the inductor current reached the maximum current command signal, the maximum current command was changed to the minimum current command and the transistor was turned off. When the inductor current reached the minimum current command signal, the minimum current command was changed to the maximum current command and the transistor was turned on. Figure 22 shows the output voltage waveforms of the peak current mode control. Plots of both the maximum slope compensation method and the proposed hybrid current mode control are shown on the same set of axes.

It can be seen that the proposed hybrid current mode control has faster response characteristics, as shown before in the simulation analysis. Figure 23 and Figure 24 show the inductor current waveform of the proposed hybrid current mode control when the output voltage was lowered and raised, respectively. The input voltage was changed from 35 V to 25 V and the output voltage was changed from 20 V to 40 V. Figure 25 and Figure 26 show the inductor current waveform before the output voltage rose and dropped, respectively. Figure 27 and Figure 28 show the inductor current waveform after the output voltage rose and dropped, respectively. It can be confirmed that the frequency was fixed as in the simulation analysis.

6. Conclusions

In this paper, a new hybrid current mode controller was proposed and studied with fast response characteristics for high-speed charging and discharging of energy storage devices that incorporate a super capacitor. Typically, for fast response characteristics, peak current mode control and slope compensation methods are used. When the voltage suddenly changes, the slope value is typically set to the maximum, which causes a response time delay. Through simulation and experimental analysis, it was confirmed that the proposed hybrid current mode controller had faster response characteristics than the peak current mode controller using maximum slope compensation. In addition, it was confirmed that when the output voltage was changed, the frequency did not change and the controller operated stably.